The FacetedDBLP logo    Search for: in:

Disable automatic phrases ?     Syntactic query expansion: ?

Publications of "Emre Salman" ( http://dblp.L3S.de/Authors/Emre_Salman )

  Author page on DBLP  Author page in RDF  Community of Emre Salman in ASPL-2

Publication years (Num. hits)
2006-2010 (15) 2011-2015 (22) 2016-2018 (19) 2019 (8)
Publication types (Num. hits)
article(20) inproceedings(44)
GrowBag graphs for keyword ? (Num. hits/coverage)

Group by:
The graphs summarize 9 occurrences of 7 keywords

Results
Found 65 publication records. Showing 64 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Tutu Wan, Yasha Karimi, Milutin Stanacevic, Emre Salman AC Computing Methodology for RF-Powered IoT Devices. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Weicheng Liu, Can Sitik, Emre Salman, Baris Taskin, Savithri Sundareswaran, Benjamin Huang SLECTS: Slew-Driven Clock Tree Synthesis. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Manav Jain, Alwathiqbellah Ibrahim, Emre Salman, Milutin Stanacevic, Ryan Willing, Shahrzad Towfighian Frontend Electronic System for Triboelectric Harvester in a Smart Knee Implant. Search on Bibsonomy MWSCAS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Tasnuva Noor, Emre Salman A Novel Glitch-Free Integrated Clock Gating Cell for High Reliability. Search on Bibsonomy ISCAS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Ivan Miketic, Emre Salman Power and Data Integrity in Monolithic 3D Integrated SIMON Core. Search on Bibsonomy ISCAS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Yuanfei Huang, Tutu Wan, Emre Salman, Milutin Stanacevic Signal Shaping at Interface of Wireless Power Harvesting and AC Computational Logic. Search on Bibsonomy ISCAS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Prachi Shukla, Ayse K. Coskun, Vasilis F. Pavlidis, Emre Salman An Overview of Thermal Challenges and Opportunities for Monolithic 3D ICs. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Can Sitik, Weicheng Liu, Baris Taskin, Emre Salman Low Voltage Clock Tree Synthesis with Local Gate Clusters. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Chen Yan, Emre Salman Mono3D: Open Source Cell Library for Monolithic 3-D Integrated Circuits. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Chen Yan, Jaya Dofe, Scott Kontak, Qiaoyan Yu, Emre Salman Hardware-Efficient Logic Camouflaging for Monolithic 3-D ICs. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Mallika Rathore, Emre Salman Error Probability Models to Facilitate Approximate Computing in TFET based Circuits. Search on Bibsonomy ISCAS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Tutu Wan, Emre Salman Ultra Low Power SIMON Core for Lightweight Encryption. Search on Bibsonomy ISCAS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Emre Salman, Milutin Stanacevic, Samir Ranjan Das, Petar M. Djuric Leveraging RF Power for Intelligent Tag Networks. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Tutu Wan, Yasha Karimi, Milutin Stanacevic, Emre Salman Perspective Paper - Can AC Computing Be an Alternative for Wirelessly Powered IoT Devices? Search on Bibsonomy Embedded Systems Letters The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Hailang Wang, Emre Salman Closed-Form Expressions for I/O Simultaneous Switching Noise Revisited. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Chen Yan, Zhihua Gan, Emre Salman Package-embedded spiral inductor characterization with application to switching buck converters. Search on Bibsonomy Microelectronics Journal The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Tutu Wan, Yasha Karimi, Milutin Stanacevic, Emre Salman Energy efficient AC computing methodology for wirelessly powered IoT devices. Search on Bibsonomy ISCAS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Chen Yan, Zhihua Gan, Emre Salman In-package spiral inductor characterization for high efficiency buck converters. Search on Bibsonomy ISCAS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Chen Yan, Scott Kontak, Hailang Wang, Emre Salman Open source cell library Mono3D to develop large-scale monolithic 3D integrated circuits. Search on Bibsonomy ISCAS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Jaya Dofe, Zhiming Zhang, Qiaoyan Yu, Chen Yan, Emre Salman Impact of Power Distribution Network on Power Analysis Attacks in Three-Dimensional Integrated Circuits. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Chen Yan, Emre Salman Routing Congestion Aware Cell Library Development for Monolithic 3D ICs. Search on Bibsonomy ICRC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Can Sitik, Weicheng Liu, Baris Taskin, Emre Salman Design Methodology for Voltage-Scaled Clock Distribution Networks. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Weicheng Liu, Emre Salman, Can Sitik, Baris Taskin Exploiting useful skew in gated low voltage clock trees. Search on Bibsonomy ISCAS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Tutu Wan, Emre Salman, Milutin Stanacevic A new circuit design framework for IoT devices: Charge-recycling with wireless power harvesting. Search on Bibsonomy ISCAS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Yongwan Park, Emre Salman On-chip hybrid regulator topology for portable SoCs with near-threshold operation. Search on Bibsonomy ISCAS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Jaya Dofe, Qiaoyan Yu, Hailang Wang, Emre Salman Hardware Security Threats and Potential Countermeasures in Emerging 3D ICs. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Jaya Dofe, Chen Yan, Scott Kontak, Emre Salman, Qiaoyan Yu Transistor-level camouflaged logic locking method for monolithic 3D IC security. Search on Bibsonomy AsianHOST The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Hailang Wang, Emre Salman Decoupling Capacitor Topologies for TSV-Based 3-D ICs With Power Gating. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Zhihua Gan, Emre Salman, Milutin Stanacevic Figures-of-Merit to Evaluate the Significance of Switching Noise in Analog Circuits. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Can Sitik, Emre Salman, Leo Filippini, Sung-Jun Yoon, Baris Taskin FinFET-Based Low-Swing Clocking. Search on Bibsonomy JETC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Peirong Ji, Emre Salman Quantifying the effect of local interconnects on on-chip power distribution. Search on Bibsonomy Microelectronics Journal The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Leo Filippini, Emre Salman, Baris Taskin A wirelessly powered system with charge recovery logic. Search on Bibsonomy ICCD The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Shiwei Fang, Emre Salman Low swing TSV signaling using novel level shifters with single supply voltage. Search on Bibsonomy ISCAS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Weicheng Liu, Emre Salman, Can Sitik, Baris Taskin Enhanced level shifter for multi-voltage operation. Search on Bibsonomy ISCAS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Mallika Rathore, Weicheng Liu, Emre Salman, Can Sitik, Baris Taskin A Novel Static D-Flip-Flop Topology for Low Swing Clocking. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Weicheng Liu, Emre Salman, Can Sitik, Baris Taskin Clock Skew Scheduling in the Presence of Heavily Gated Clock Networks. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Hailang Wang, Emre Salman Enhancing system-wide power integrity in 3D ICs with power gating. Search on Bibsonomy ISQED The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Hailang Wang, Emre Salman Resource allocation methodology for through silicon vias and sleep transistors in 3D ICs. Search on Bibsonomy ISQED The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Hailang Wang, Mohammad H. Asgari, Emre Salman Compact model to efficiently characterize TSV-to-transistor noise coupling in 3D ICs. Search on Bibsonomy Integration The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Can Sitik, Leo Filippini, Emre Salman, Baris Taskin High Performance Low Swing Clock Tree Synthesis with Custom D Flip-Flop Design. Search on Bibsonomy ISVLSI The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Hailang Wang, Emre Salman Power gating topologies in TSV based 3D integrated circuits. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Hailang Wang, Mohammad H. Asgari, Emre Salman Efficient characterization of TSV-to-transistor noise coupling in 3D ICs. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Suhas M. Satheesh, Emre Salman Effect of TSV fabrication technology on power distribution in 3D ICs. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Emre Salman, Eby G. Friedman Utilizing interdependent timing constraints to enhance robustness in synchronous circuits. Search on Bibsonomy Microelectronics Journal The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Suhas M. Satheesh, Emre Salman Power Distribution in TSV-Based 3-D Processor-Memory Stacks. Search on Bibsonomy IEEE J. Emerg. Sel. Topics Circuits Syst. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Zhihua Gan, Emre Salman, Milutin Stanacevic Methodology to determine dominant noise source in a system-on-chip based implantable device. Search on Bibsonomy SoCC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Suhas M. Satheesh, Emre Salman Design space exploration for robust power delivery in TSV based 3-D systems-on-chip. Search on Bibsonomy SoCC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Selçuk Köse, Emre Salman, Eby G. Friedman Shielding Methodologies in the Presence of Power/Ground Noise. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Emre Salman Noise coupling due to through silicon vias (TSVs) in 3-D integrated circuits. Search on Bibsonomy ISCAS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Renatas Jakushokas, Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin, Cynthia L. Recker Compact substrate models for efficient noise coupling and signal isolation analysis. Search on Bibsonomy ISCAS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Emre Salman, Eby G. Friedman Methodology to achieve higher tolerance to delay variations in synchronous circuits. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF delay uncertainty, environmental variation, robust circuit, process variation, tolerance
1Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin Identification of Dominant Noise Source and Parameter Sensitivity for Substrate Coupling. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Emre Salman, Renatas Jakushokas, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin Methodology for Efficient Substrate Noise Analysis in Large-Scale Mixed-Signal Circuits. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin Worst Case Power/Ground Noise Estimation Using an Equivalent Transition Time for Resonance. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Selçuk Köse, Emre Salman, Eby G. Friedman Shielding Methodologies in the Presence of Power/Ground Noise. Search on Bibsonomy ISCAS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Emre Salman, Renatas Jakushokas, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin Contact merging algorithm for efficient substrate noise analysis in large scale circuits. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF noise coupling, substrate modeling, signal integrity, mixed-signal circuits, substrate noise, noise analysis
1Emre Salman, Renatas Jakushokas, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin Input port reduction for efficient substrate extraction in large scale IC's. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin Equivalent rise time for resonance in power/ground noise estimation. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Selçuk Köse, Emre Salman, Zeljko Ignjatovic, Eby G. Friedman Pseudo-random clocking to enhance signal integrity. Search on Bibsonomy SoCC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin Dominant Substrate Noise Coupling Mechanism for Multiple Switching Gates. Search on Bibsonomy ISQED The full citation details ... 2008 DBLP  DOI  BibTeX  RDF signal integrity, mixed-signal circuits, Substrate coupling
1Emre Salman, Ali Dasdan, Feroze Taraporevala, Kayhan Küçükçakar, Eby G. Friedman Exploiting Setup-Hold-Time Interdependence in Static Timing Analysis. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin Substrate Noise Reduction Based On Noise Aware Cell Design. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Emre Salman, Eby G. Friedman, Radu M. Secareanu Substrate and Ground Noise Interactions in Mixed-Signal Circuits. Search on Bibsonomy SoCC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Emre Salman, Eby G. Friedman, Ali Dasdan, Feroze Taraporevala, Kayhan Küçükçakar Pessimism Reduction In Static Timing Analysis Using Interdependent Setup and Hold Times. Search on Bibsonomy ISQED The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
Displaying result #1 - #64 of 64 (100 per page; Change: )
Valid XHTML 1.1! Valid CSS! [Valid RSS]
Maintained by Jörg Diederich.
Based upon DBLP by Michael Ley.
open data data released under the ODC-BY 1.0 license