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Publications at "FCCM"( http://dblp.L3S.de/Venues/FCCM )

URL (DBLP): http://dblp.uni-trier.de/db/conf/fccm

Publication years (Num. hits)
1995 (27) 1996 (25) 1997 (33) 1998 (66) 1999 (51) 2000 (57) 2001 (47) 2002 (45) 2003 (48) 2004 (59) 2005 (61) 2006 (67) 2007 (58) 2008 (52) 2009 (48) 2010 (42) 2011 (49) 2012 (45) 2013 (53) 2014 (71) 2015 (62) 2016 (54) 2017 (57) 2018 (54)
Publication types (Num. hits)
inproceedings(1207) proceedings(24)
Venues (Conferences, Journals, ...)
FCCM(1231)
GrowBag graphs for keyword ? (Num. hits/coverage)

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The graphs summarize 275 occurrences of 168 keywords

Results
Found 1231 publication records. Showing 1231 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Bjorn Gottschall, Thomas PreuBer, Akash Kumar 0001 Reloc - An Open-Source Vivado Workflow for Generating Relocatable End-User Configuration Tiles. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Md Jubaer Hossain Pantho, Joel Mandebi Mbongue, Christophe Bobda, David Andrews, Marjan Asadinia Enabling Transparent Acceleration of OpenCV Library Kernels on a Hybrid Memory Cube Computer. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Xiaofan Zhang, Junsong Wang, Chao Zhu, Yonghua Lin, Jinjun Xiong, Wen-Mei W. Hwu, Deming Chen AccDNN: An IP-Based DNN Generator for FPGAs. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Erwei Wang, James J. Davis, Peter Y. K. Cheung A PYNQ-Based Framework for Rapid CNN Prototyping. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1José Luis Imaña Efficient FPGA Implementation of Binary Field Multipliers Based on Irreducible Trinomials. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jieming Xu, Miriam Leeser Cross Component Optimization for Modern LTE Downlink Shared Channel Implementation. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Ryota Yasudo, Ana Lucia Varbanescu, José Gabriel F. Coutinho, Wayne Luk, Hideharu Amano Performance Prediction for Large-Scale Heterogeneous Platforms. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Festus Hategekimana, Joel Mandebi Mbongue, Md Jubaer Hossain Pantho, Christophe Bobda Inheriting Software Security Policies within Hardware IP Components. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Nadesh Ramanathan, George A. Constantinides, John Wickerson Concurrency-Aware Thread Scheduling for High-Level Synthesis. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Omar Ragheb, Jason Helge Anderson High-Level Synthesis of FPGA Circuits with Multiple Clock Domains. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Deshya Wijesundera, Alok Prakash, Thilina Perera, Kalindu Herath, Thambipillai Srikanthan Wibheda: Framework for Data Dependency-Aware Multi-Constrained Hardware-Software Partitioning in FPGA-Based SoCs for IoT Devices. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Weikang Qiao, Jieqiong Du, Zhenman Fang, Michael Lo, Mau-Chung Frank Chang, Jason Cong High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Siddhartha 0001, Nachiket Kapre Hoplite-Q: Priority-Aware Routing in FPGA Overlay NoCs. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Steve Dai, Yuan Zhou, Hang Zhang 0010, Ecenur Ustun, Evangeline F. Y. Young, Zhiru Zhang Fast and Accurate Estimation of Quality of Results in High-Level Synthesis with Machine Learning. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Shivukumar B. Patil, Tianqi Liu, Russell Tessier A Bandwidth-Optimized Routing Algorithm for Hybrid FPGA Networks-on-Chip. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Zhuolun He, Hanxian Huang, Ming Jiang 0001, Yuanchao Bai, Guojie Luo FPGA-Based Real-Time Super-Resolution System for Ultra High Definition Videos. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Denis Matousek, Jirí Matousek 0002, Jan Korenek High-Speed Regular Expression Matching with Pipelined Memory-Based Automata. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Eric Matthews, Zavier Aguila, Lesley Shannon Evaluating the Performance Efficiency of a Soft-Processor, Variable-Length, Parallel-Execution-Unit Architecture for FPGAs Using the RISC-V ISA. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Sajjad Taheri, Jin Heo, Payman Behnam, Jeffrey Chen, Alexander V. Veidenbaum, Alexandru Nicolau Acceleration Framework for FPGA Implementation of OpenVX Graph Pipelines. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Chris Lavin, Alireza Kaviani RapidWright: Enabling Custom Crafted Implementations for FPGAs. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Dimitris Agiakatsikas, Ganghee Lee, Thomas Mitchell, Ediz Cetin, Oliver Diessel From C to Fault-Tolerant FPGA-Based Systems. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jiayi Sheng, Chen Yang, Tianqi Wang, Martin C. Herbordt High Performance Dynamic Communication on Reconfigurable Clusters. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Matthew Cannon, Andrew M. Keller, Michael J. Wirthlin Improving the Effectiveness of TMR Designs on FPGAs with SEU-Aware Incremental Placement. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Abdul-Amir Yassine, Yasmin Afsharnejad, Omar Ragheb, Vaughn Betz, Paul Chow A High-Level Synthesis Case Study on Light Propagation Simulation in Turbid Media. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jason Cong, Peng Wei, Cody Hao Yu, Peipei Zhou Latte: Locality Aware Transformation for High-Level Synthesis. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jason Cong, Licheng Guo, Po-Tsang Huang, Peng Wei, Tianhe Yu SMEM++: A Pipelined and Time-Multiplexed SMEM Seeding Accelerator for DNA Sequencing. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Sunwoong Kim, Rob A. Rutenbar Accelerator Design with Effective Resource Utilization for Binary Convolutional Neural Networks on an FPGA. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Sam Skalicky, Joshua S. Monson, Andrew G. Schmidt, Matthew French Hot & Spicy: Improving Productivity with Python and HLS for FPGAs. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2018, Boulder, CO, USA, April 29 - May 1, 2018 Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  BibTeX  RDF
1Farnoud Farahmand, William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj Improved Lightweight Implementations of CAESAR Authenticated Ciphers. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jason Cong, Zhenman Fang, Michael Lo, Hanrui Wang, Jingxian Xu, Shaochong Zhang Understanding Performance Differences of FPGAs and GPUs. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Asif Islam, Nachiket Kapre LegUp-NoC: High-Level Synthesis of Loops with Indirect Addressing. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Chethan Ramesh, Shivukumar B. Patil, Siva Nishok Dhanuskodi, George Provelengios, Sébastien Pillement, Daniel Holcomb, Russell Tessier FPGA Side Channel Attacks without Physical Access. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Dongyang Li, Fei Wu 0005, Yang Weng, Qing Yang, Changsheng Xie HODS: Hardware Object Deserialization Inside SSD Storage. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jialiang Zhang, Jing Li PQ-CNN: Accelerating Product Quantized Convolutional Neural Network on FPGA. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Abhishek Kumar Jain, G. Scott Lloyd, Maya Gokhale Microscope on Memory: MPSoC-Enabled Computer Memory System Assessments. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jason Cong, Jie Wang Automatic Interior I/O Elimination in Systolic Array Architecture. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Minghua Shen, Guojie Luo, Nong Xiao Exploiting Box Expansion and Grid Partitioning for Parallel FPGA Routing. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Tong Geng, Tianqi Wang, Ahmed Sanaullah, Chen Yang, Rui Xu, Rushi Patel, Martin C. Herbordt FPDeep: Acceleration and Load Balancing of CNN Training on FPGA Clusters. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Zhong Guan EM-Aware Memory Mapping Algorithms for SRAM Based FPGA. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Philip Colangelo, Nasibeh Nasiri, Eriko Nurvitadhi, Asit K. Mishra, Martin Margala, Kevin Nealis Exploration of Low Numeric Precision Deep Learning Inference Using Intel® FPGAs. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Nele Mentens, Edoardo Charbon, Francesco Regazzoni Rethinking Secure FPGAs: Towards a Cryptography-Friendly Configurable Cell Architecture and Its Automated Design Flow. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Liang Feng, Sharad Sinha, Wei Zhang, Yun Liang 0001 CAMAS: Static and Dynamic Hybrid Cache Management for CPU-FPGA Platforms. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Katayoun Neshatpour, Hosein Mohammadi Makrani, Avesta Sasan, Hassan Ghasemzadeh, Setareh Rafatirad, Houman Homayoun Design Space Exploration for Hardware Acceleration of Machine Learning Applications in MapReduce. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Madison N. Emas, Austin Baylis, Greg Stitt High-Frequency Absorption-FIFO Pipelining for Stratix 10 HyperFlex. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Abhi D. R., Ron Sass, Andrew G. Schmidt, Matthew French Bridging the Gap between Advanced Memory and Heterogeneous Architectures. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Tobias Kenter, Gopinat Mahale, Samer Alhaddad, Yevgen Grynko, Christian Schmitt 0003, Ayesha Afzal, Frank Hannig, Jens Förstner, Christian Plessl OpenCL-Based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Guohao Dai, Tianhao Huang, Yu Wang 0002, Huazhong Yang, John Wawrzynek NewGraph: Balanced Large-Scale Graph Processing on FPGAs with Low Preprocessing Overheads. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Ciro Ceissler, Ramon Nepomuceno, Marcio Machado Pereira, Guido Araujo Automatic Offloading of Cluster Accelerators. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Makoto Saitoh, Elsayed A. Elsayed, Thiem Van Chu, Susumu Mashimo, Kenji Kise A High-Performance and Cost-Effective Hardware Merge Sorter without Feedback Datapath. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Mohammad Ghasemzadeh 0002, Mohammad Samragh, Farinaz Koushanfar ReBNet: Residual Binarized Neural Network. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Amir Yazdanbakhsh, Michael Brzozowski, Behnam Khaleghi, Soroush Ghodrati, Kambiz Samadi, Nam Sung Kim, Hadi Esmaeilzadeh FlexiGAN: An End-to-End Solution for FPGA Acceleration of Generative Adversarial Networks. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Zhenyuan Ruan, Tong He, Bojie Li, Peipei Zhou, Jason Cong ST-Accel: A High-Level Programming Platform for Streaming Applications on FPGA. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jeffrey Goeders, Tanner Gaskin, Brad L. Hutchings Demand Driven Assembly of FPGA Configurations Using Partial Reconfiguration, Ubuntu Linux, and PYNQ. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Fubing Mao, Wei Zhang, Bingsheng He, SiewKei Lam Dynamic Module Partitioning for Library Based Placement on Heterogeneous FPGAs. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Susumu Mashimo, Thiem Van Chu, Kenji Kise High-Performance Hardware Merge Sorter. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Ashutosh Dhar, Deming Chen Efficient GPGPU Computing with Cross-Core Resource Sharing and Core Reconfiguration. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Almomany Abedalmuhdi, B. Earl Wells, Ken-ichi Nishikawa Efficient Particle-Grid Space Interpolation of an FPGA-Accelerated Particle-in-Cell Plasma Simulation. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Liqiang Lu, Yun Liang 0001, Qingcheng Xiao, Shengen Yan Evaluating Fast Algorithms for Convolutional Neural Networks on FPGAs. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Jeffrey Goeders Enabling Long Debug Traces of HLS Circuits Using Bandwidth-Limited Off-Chip Storage Devices. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Raghid Morcel, Haitham Akkary, Hazem M. Hajj, Mazen A. R. Saghir, Anil Keshavamurthy, Rahul Khanna, Hassan Artail Minimalist Design for Accelerating Convolutional Neural Networks for Low-End FPGA Platforms. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Ian J. Barge, Cristinel Ababei A Network-on-Chip Based H.264 Video Decoder Prototype Implemented on FPGAs. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Andrew G. Schmidt, Gabriel Weisz, Matthew French Evaluating Rapid Application Development with Python for Heterogeneous Processor-Based FPGAs. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Youngsoo Kim, Hossein Shahdoost, Shrikant Jadhav, Clay S. Gloster Jr. Improving the Accuracy of Arctan for Face Detection. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Sam M. H. Ho, C.-H. Dominic Hung, Ho-Cheung Ng, Maolin Wang, Hayden Kwok-Hay So A Parameterizable Activation Function Generator for FPGA-Based Neural Network Applications. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Emmanouil Kousanakis, Apostolos Dollas, Euripides Sotiriades, Ioannis Papaefstathiou, Dionisios N. Pnevmatikatos, Athanasia Papoutsi, Panagiotis C. Petrantonakis, Panayiota Poirazi, Spyridon Chavlis, George Kastellakis An Architecture for the Acceleration of a Hybrid Leaky Integrate and Fire SNN on the Convey HC-2ex FPGA-Based Processor. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Philip Colangelo, Randy Huang, Enno Lübbers, Martin Margala, Kevin Nealis Fine-Grained Acceleration of Binary Neural Networks Using Intel® Xeon® Processor with Integrated FPGA. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Chin Hau Hoo, Akash Kumar 0001 ParaDiMe: A Distributed Memory FPGA Router Based on Speculative Parallelism and Path Encoding. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Morteza Hosseini, Rashidul Islam, Amey M. Kulkarni, Tinoosh Mohsenin A Scalable FPGA-Based Accelerator for High-Throughput MCMC Algorithms. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Haohuan Fu, Conghui He, Wayne Luk, Weijia Li, Guangwen Yang A Nanosecond-Level Hybrid Table Design for Financial Market Data Generators. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1John Mawer, Oscar Palomar, Cosmin Gorgovan, Andy Nisbet, Will Toms, Mikel Luján The Potential of Dynamic Binary Modification and CPU-FPGA SoCs for Simulation. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Naveen Kumar Dumpala, Shivukumar B. Patil, Daniel E. Holcomb, Russell Tessier Energy Efficient Loop Unrolling for Low-Cost FPGAs. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Nguyen T. H. Nguyen, Ediz Cetin, Oliver Diessel Scheduling Considerations for Voter Checking in TMR-MER Systems. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Muhsen Owaida, David Sidler, Kaan Kara, Gustavo Alonso Centaur: A Framework for Hybrid CPU-FPGA Databases. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Ganghee Lee, Dimitris Agiakatsikas, Tong Wu, Ediz Cetin, Oliver Diessel TLegUp: A TMR Code Generation Tool for SRAM-Based FPGA Applications Using HLS. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Minghua Shen, Guojie Luo Megrez: Parallelizing FPGA Routing with Strictly-Ordered Partitioning. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Lana Josipovic, Philip Brisk, Paolo Ienne An Out-of-Order Load-Store Queue for Spatial Computing. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Ali Jafari, Maysam Ghovanloo, Tinoosh Mohsenin A Real-Time Embedded FPGA Processor for a Stand-Alone Dual-Mode Assistive Device. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Shuanglong Liu, Christos-Savvas Bouganis Communication-Aware MCMC Method for Big Data Applications on FPGAs. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Adewale Adetomi, Godwin Enemali, Tughrul Arslan Relocating Encrypted Partial Bitstreams by Advance Task Address Loading. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Le Tu, Yuelai Yuan, Kan Huang, Xiaoqiang Zhang, Zixin Wang, Dihu Chen Improved Synthesis of Compressor Trees on FPGAs in High-Level Synthesis. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Shane T. Fleming, David B. Thomas Using Runahead Execution to Hide Memory Latency in High Level Synthesis. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Qian Wu, Yongxin Zhu 0001, Xu Wang 0010, Mengjun Li, Junjie Hou, Ali Masoumi Exploring High Efficiency Hardware Accelerator for the Key Algorithm of Square Kilometer Array Telescope Data Processing. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Sicheng Li, Wei Wen, Yu Wang, Song Han, Yiran Chen, Hai Li 0001 An FPGA Design Framework for CNN Sparsification and Acceleration. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Xuzhi Zhang, Xiaozhe Shao, George Provelengios, Naveen Kumar Dumpala, Lixin Gao 0001, Russell Tessier Scalable Network Function Virtualization for Heterogeneous Middleboxes. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Ahmed M. Abdelsalam, J. M. Pierre Langlois, Farida Cheriet A Configurable FPGA Implementation of the Tanh Function Using DCT Interpolation. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Yongming Shen, Michael Ferdman, Peter A. Milder Escher: A CNN Accelerator with Flexible Buffering to Minimize Off-Chip Transfer. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Dimitris Theodoropoulos, Nikolaos Alachiotis, Dionisios N. Pnevmatikatos Multi-FPGA Evaluation Platform for Disaggregated Computing. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1David Ojika, Piotr Majcher, Wojciech Neubauer, Suchit Subhaschandra, Darin Acosta SWiF: A Simplified Workload-Centric Framework for FPGA-Based Computing. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Kaan Kara, Dan Alistarh, Gustavo Alonso, Onur Mutlu, Ce Zhang FPGA-Accelerated Dense Linear Machine Learning: A Precision-Convergence Trade-Off. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Nathaniel McVicar, Chih-Ching Lin, Scott Hauck K-Mer Counting Using Bloom Filters with an FPGA-Attached HMC. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Festus Hategekimana, Christophe Bobda Applying the Flask Security Architecture to Secure SoC Design. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Sang Woo Jun, Shuotao Xu, Arvind Terabyte Sort on FPGA-Accelerated Flash Storage. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Soroosh Khoram, Jialiang Zhang, Maxwell Strange, Jing Li Accelerating Large-Scale Graph Analytics with FPGA and HMC. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Baptiste Roux, Matthieu Gautier, Olivier Sentieys, Jean-Philippe Delahaye Fast and Energy-Driven Design Space Exploration for Heterogeneous Architectures. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Nachiket Kapre On Bit-Serial NoCs for FPGAs. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Taylor J. L. Whitaker, Christophe Bobda CAPSL: A Tool for Automatic Generation of Hardware Sandboxes for IP Security. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Yohann Uguen, Florent de Dinechin, Steven Derrien A High-Level Synthesis Approach Optimizing Accumulations in Floating-Point Programs Using Custom Formats and Operators. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Hoang Gia Vu, Shinya Takamaeda-Yamazaki, Takashi Nakada, Yasuhiko Nakashima CPRring: A Structure-Aware Ring-Based Checkpointing Architecture for FPGA Computing. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Reza Nakhjavani, Jianwen Zhu A Case for Common-Case: On FPGA Acceleration of Erasure Coding. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
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