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Publications of "Guido Masera" ( http://dblp.L3S.de/Authors/Guido_Masera )

  Author page on DBLP  Author page in RDF  Community of Guido Masera in ASPL-2

Publication years (Num. hits)
1989-2002 (17) 2003-2006 (23) 2007-2008 (16) 2009-2010 (17) 2011-2012 (20) 2013-2014 (18) 2015-2017 (18) 2018-2019 (9)
Publication types (Num. hits)
article(73) inproceedings(65)
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The graphs summarize 21 occurrences of 21 keywords

Results
Found 139 publication records. Showing 138 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Maurizio Capra, Riccardo Peloso, Guido Masera, Massimo Ruo Roch, Maurizio Martina Edge Computing: A Survey On the Hardware Requirements in the Internet of Things World. Search on Bibsonomy Future Internet The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Muhammad Awais 0004, Anas Razzaq, Ashfaq Ahmed, Guido Masera LDPC check node implementation using reversible logic. Search on Bibsonomy IET Circuits, Devices & Systems The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Alberto Marchisio, Beatrice Bussolino, Alessio Colucci, Muhammad Abdullah Hanif, Maurizio Martina, Guido Masera, Muhammad Shafique 0001 X-TrainCaps: Accelerated Training of Capsule Nets through Lightweight Software Optimizations. Search on Bibsonomy CoRR The full citation details ... 2019 DBLP  BibTeX  RDF
1Alberto Paltrinieri, Riccardo Peloso, Guido Masera, Muhammad Shafique 0001, Maurizio Martina On the Effect of Approximate-Computing in Motion Estimation. Search on Bibsonomy J. Low Power Electronics The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Gabriele Coppolino, Carlo Condo, Guido Masera, Warren J. Gross A Multi-Kernel Multi-Code Polar Decoder Architecture. Search on Bibsonomy CoRR The full citation details ... 2018 DBLP  BibTeX  RDF
1Gabriele Coppolino, Carlo Condo, Guido Masera, Warren J. Gross A Multi-Kernel Multi-Code Polar Decoder Architecture. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Gabriele Coppolino, Carlo Condo, Guido Masera, Warren J. Gross Efficient Operation Scheduling in Successive-Cancellation-based polar decoders. Search on Bibsonomy SiPS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Alberto Paltrinieri, Riccardo Peloso, Guido Masera, Muhammad Shafique 0001, Maurizio Martina Approximate-Computing Architectures for Motion Estimation in HEVC. Search on Bibsonomy NGCAS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Paolo Selvo, Maurizio Masera, Riccardo Peloso, Guido Masera, Muhammad Shafique 0001, Maurizio Martina An Optimized Partial-Distortion-Elimination Based Sum-of-Absolute-Differences Architecture for High-Efficiency-Video-Coding. Search on Bibsonomy ApplePies The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Maurizio Masera, Maurizio Martina, Guido Masera Adaptive Approximated DCT Architectures for HEVC. Search on Bibsonomy IEEE Trans. Circuits Syst. Video Techn. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Maurizio Masera, Lorenzo Re Fiorentin, Enrico Masala, Guido Masera, Maurizio Martina Analysis of HEVC transform throughput requirements for hardware implementations. Search on Bibsonomy Sig. Proc.: Image Comm. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Maurizio Masera, Maurizio Martina, Guido Masera Odd type DCT/DST for video coding: Relationships and low-complexity implementations. Search on Bibsonomy SiPS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Giovanni Renda, Maurizio Masera, Maurizio Martina, Guido Masera Approximate Arai DCT Architecture for HEVC. Search on Bibsonomy NGCAS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Simone Aiassa, Paolo Motto Ros, Guido Masera, Maurizio Martina A low power architecture for AER event-processing microcontroller. Search on Bibsonomy BioCAS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Lorenzo Guerrieri, Guido Masera, Igor S. Stievano, Paola Bisaglia, Williams Richard Garcia Valverde, Mara Concolato Automotive Power-Line Communication Channels: Mathematical Characterization and Hardware Emulator. Search on Bibsonomy IEEE Trans. Industrial Electronics The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Syed Azhar Ali Zaidi, Abuduwaili Tuoheti, Maurizio Martina, Guido Masera FPGA Accelerator of Algebraic Quasi Cyclic LDPC Codes for nand Flash Memories. Search on Bibsonomy IEEE Design & Test The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Waqar Ahmad, Javed Iqbal, Maurizio Martina, Guido Masera High Level Synthesis based FPGA Implementation of H.264/AVC Sub-Pixel Luma Interpolation Filters. Search on Bibsonomy EMS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Lorenzo Re Fiorentin, Maurizio Masera, Sabino Mantovano, Paola Sunna, Guido Masera, Maurizio Martina Comparison between HEVC and Thor based on objective and subjective assessments. Search on Bibsonomy IWSSIP The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Carlo Condo, Maurizio Martina, Massimo Ruo Roch, Guido Masera Exploiting generalized de-Bruijn/Kautz topologies for flexible iterative channel code decoder architectures. Search on Bibsonomy Integration The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Carlo Condo, Amer Baghdadi, Guido Masera Reducing the Dissipated Energy in Multi-standard Turbo and LDPC Decoders. Search on Bibsonomy CSSP The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Carlo Condo, Guido Masera, Paolo Montuschi Unequal Error Protection of Memories in LDPC Decoders. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Muhammad Usman Shahid, Ashfaq Ahmed, Maurizio Martina, Guido Masera, Enrico Magli Parallel H.264/AVC Fast Rate-Distortion Optimized Motion Estimation by Using a Graphics Processing Unit and Dedicated Hardware. Search on Bibsonomy IEEE Trans. Circuits Syst. Video Techn. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Maurizio Martina, Guido Masera, Massimo Ruo Roch, Gianluca Piccinini Result-Biased Distributed-Arithmetic-Based Filter Architectures for Approximately Computing the DWT. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Stylianos Papaharalabos, P. Takis Mathiopoulos, Maurizio Martina, Guido Masera Comments on "Bitwise Log-Likelihood Ratios for Quadrature Amplitude Modulations". Search on Bibsonomy IEEE Communications Letters The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Masoud Shahshahani Amirhossein, Paolo Motto Ros, Alberto Bonanno, Marco Crepaldi, Maurizio Martina, Danilo Demarchi, Guido Masera An all-digital spike-based ultra-low-power IR-UWB dynamic average threshold crossing scheme for muscle force wireless transmission. Search on Bibsonomy DATE The full citation details ... 2015 DBLP  BibTeX  RDF
1Maurizio Masera, Lorenzo Re Fiorentin, Maurizio Martina, Guido Masera, Enrico Masala Optimizing the transform complexity-quality tradeoff for hardware-accelerated HEVC video coding. Search on Bibsonomy DASIP The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Waqar Ahmad, Maurizio Martina, Guido Masera Complexity and implementation analysis of synthesized view distortion estimation architecture in 3D High Efficiency Video Coding. Search on Bibsonomy IC3D The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Maurizio Martina, Carlo Condo, Guido Masera, Maurizio Zamboni A Joint Source/Channel Approach to Strengthen Embedded Programmable Devices against Flash Memory Errors. Search on Bibsonomy Embedded Systems Letters The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Carlo Condo, Guido Masera Unified turbo/LDPC code decoder architecture for deep-space communications. Search on Bibsonomy IEEE Trans. Aerospace and Electronic Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Maurizio Martina, Stylianos Papaharalabos, P. Takis Mathiopoulos, Guido Masera Simplified Log-MAP Algorithm for Very Low-Complexity Turbo Decoder Hardware Architectures. Search on Bibsonomy IEEE Trans. Instrumentation and Measurement The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Carlo Condo, Maurizio Martina, Gianluca Piccinini, Guido Masera Variable Parallelism Cyclic Redundancy Check Circuit for 3GPP-LTE/LTE-Advanced. Search on Bibsonomy IEEE Signal Process. Lett. The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Carlo Condo, Amer Baghdadi, Guido Masera Energy-efficient multi-standard early stopping criterion for low-density-parity-check iterative decoding. Search on Bibsonomy IET Communications The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Maurizio Awais, Guido Masera, Maurizio Martina, Guido Montorsi VLSI Implementation of a Non-Binary Decoder Based on the Analog Digital Belief Propagation. Search on Bibsonomy IEEE Trans. Signal Processing The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Guoping Xiao, Maurizio Martina, Guido Masera, Gianluca Piccinini A Parallel Radix-Sort-Based VLSI Architecture for Finding the First W Maximum/Minimum Values. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Carlo Condo, Maurizio Martina, Massimo Ruo Roch, Guido Masera Rediscovering Logarithmic Diameter Topologies for Low Latency Network-on-Chip-Based Applications. Search on Bibsonomy PDP The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Ali Zahir, Syed Azhar Ali Zaidi, Azzurra Pulimeno, Mariagrazia Graziano, Danilo Demarchi, Guido Masera, Gianluca Piccinini Molecular transistor circuits: From device model to circuit simulation. Search on Bibsonomy NANOARCH The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Simone Zezza, Guido Masera, Saeid Nooshabadi A novel decoder architecture for error resilient JPEG2000 applications based on MQ arithmetic. Search on Bibsonomy ISCAS The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Andrea Bianco, Paolo Giaccone, Guido Masera, Marco Ricca Power Control for Crossbar-Based Input-Queued Switches. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Bin Wu, Guido Masera Analysis on parallel implementations of fixed-complexity sphere decoder. Search on Bibsonomy SCIENCE CHINA Information Sciences The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Maurizio Martina, Guido Masera Improving Network-on-Chip-based Turbo Decoder Architectures. Search on Bibsonomy Signal Processing Systems The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Carlo Condo, Maurizio Martina, Guido Masera VLSI Implementation of a Multi-Mode Turbo/LDPC Decoder Architecture. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Simone Zezza, Saeid Nooshabadi, Guido Masera A 2.63 Mbit/s VLSI Implementation of SISO Arithmetic Decoders for High Performance Joint Source Channel Codes. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Carlo Condo, Amer Baghdadi, Guido Masera A Joint Communication and Application Simulator for NoC-Based Custom SoCs: LDPC and Turbo Codes Parallel Decoding Case Study. Search on Bibsonomy DSD The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Ashfaq Ahmed, Muhammad Usman Shahid, Maurizio Martina, Enrico Magli, Guido Masera VLSI Architecture for Low-Complexity Motion Estimation in H.264 Multiview Video Coding. Search on Bibsonomy DSD The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Syed Azhar Ali Zaidi, Muhammad Awais 0004, Carlo Condo, Maurizio Martina, Guido Masera FPGA accelerator of Quasi cyclic EG-LDPC codes decoder for NAND flash memories. Search on Bibsonomy DASIP The full citation details ... 2013 DBLP  BibTeX  RDF
1Guido Masera, Amer Baghdadi, Frank Kienle, Christophe Moy Flexible Radio Design: Trends and Challenges in Digital Baseband Implementation. Search on Bibsonomy VLSI Design The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Christina Gimmler-Dumont, Frank Kienle, Bin Wu, Guido Masera A System View on Iterative MIMO Detection: Dynamic Sphere Detection versus Fixed Effort List Detection. Search on Bibsonomy VLSI Design The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Luca Gaetano Amarù, Maurizio Martina, Guido Masera High Speed Architectures for Finding the First two Maximum/Minimum Values. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Maurizio Martina, Guido Masera, Stylianos Papaharalabos, P. Takis Mathiopoulos, Fotios Gioulekas On Practical Implementation and Generalizations of max* Operator for Turbo and LDPC Decoders. Search on Bibsonomy IEEE Trans. Instrumentation and Measurement The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1M. Tamagnone, Maurizio Martina, Guido Masera An application specific instruction set processor based implementation for signal detection in multiple antenna systems. Search on Bibsonomy Microprocessors and Microsystems - Embedded Hardware Design The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Stylianos Papaharalabos, Panayiotis Takis Mathiopoulos, Guido Masera, Maurizio Martina Non-recursive max* operator with reduced implementation complexity for turbo decoding. Search on Bibsonomy IET Communications The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Bin Wu, Guido Masera Efficient VLSI implementation of soft-input soft-output fixed-complexity sphere decoder. Search on Bibsonomy IET Communications The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Andrea Dario Giancarlo Biroli, Maurizio Martina, Guido Masera An LDPC Decoder Architecture for Wireless Sensor Network Applications. Search on Bibsonomy Sensors The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Carlo Condo, Maurizio Martina, Guido Masera A Network-on-Chip-based turbo/LDPC decoder architecture. Search on Bibsonomy DATE The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Muhammad Awais 0004, Marco Vacca, Mariagrazia Graziano, Guido Masera FFT implementation using QCA. Search on Bibsonomy ICECS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Lorenzo Guerrieri, Paola Bisaglia, Maurizio Martina, Guido Masera Reducing the memory for iteration-exchanged information and border future metrics in the HomePlug AV turbo decoder implementation. Search on Bibsonomy ISTC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Maurizio Martina, Guido Masera Multiplierless Mumford and Shah Functional Implementation. Search on Bibsonomy CSSP The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Maurizio Martina, Guido Masera, Hazem Moussa, Amer Baghdadi On chip interconnects for multiprocessor turbo decoding architectures. Search on Bibsonomy Microprocessors and Microsystems - Embedded Hardware Design The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Maurizio Martina, Guido Masera Improving Network-on-Chip-based turbo decoder architectures Search on Bibsonomy CoRR The full citation details ... 2011 DBLP  BibTeX  RDF
1Carlo Condo, Guido Masera A Flexible LDPC code decoder with a Network on Chip as underlying interconnect architecture Search on Bibsonomy CoRR The full citation details ... 2011 DBLP  BibTeX  RDF
1Micaela Troglia Gamba, Guido Masera Look-ahead sphere decoding: algorithm and VLSI architecture. Search on Bibsonomy IET Communications The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Maurizio Martina, Guido Masera State Metric Compression Techniques for Turbo Decoder Architectures. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Muhammad Awais 0004, Ashwani Singh, Emmanuel Boutillon, Guido Masera A Novel Architecture for Scalable, High Throughput, Multi-standard LDPC Decoder. Search on Bibsonomy DSD The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Muhammad Awais 0004, Ashwani Singh, Guido Masera Scalable, High Throughput LDPC Decoder for WiMAX (802.16e) Applications. Search on Bibsonomy ACC (2) The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Carlo Condo, Guido Masera A flexible NoC-based LDPC code decoder implementation and bandwidth reduction methods. Search on Bibsonomy DASIP The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Maurizio Martina, Guido Masera, Gianluca Piccinini Scalable low-complexity B-spline discrete wavelet transform architecture. Search on Bibsonomy IET Circuits, Devices & Systems The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Maurizio Martina, Michele Casula, Luca Fanucci, Guido Masera Motion estimation and CABAC VLSI co-processors for real-time high-quality H.264/AVC video coding. Search on Bibsonomy Microprocessors and Microsystems - Embedded Hardware Design The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Maurizio Martina, Guido Masera VLSI Architectures for WIMAX Channel Decoders Search on Bibsonomy CoRR The full citation details ... 2010 DBLP  BibTeX  RDF
1Bin Wu, Guido Masera A Novel VLSI Architecture of Fixed-complexity Sphere Decoder Search on Bibsonomy CoRR The full citation details ... 2010 DBLP  BibTeX  RDF
1Maurizio Martina, Guido Masera Turbo NOC: A Framework for the Design of Network-on-Chip-Based Turbo Decoder Architectures. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Bin Wu, Guido Masera A Novel VLSI Architecture of Fixed-Complexity Sphere Decoder. Search on Bibsonomy DSD The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Ismael Gómez, Massimo Camatel, Jordi Bracke, Vuk Marojevic, Antoni Gelonch, Fabrizio Vacca, Guido Masera ALOE-Based Flexible LDPC Decoder. Search on Bibsonomy DSD The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Andrea Bianco, Paolo Giaccone, Guido Masera, Marco Ricca Thermal Control for Crossbar-Based Input-Queued Switches. Search on Bibsonomy GLOBECOM The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Barbara Cerato, Guido Masera, Emanuele Viterbo Decoding the Golden Code: A VLSI Design. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Simone Zezza, Saeid Nooshabadi, Maurizio Martina, Guido Masera Efficient Implementation Techniques for Maximum Likelihood-Based Error Correction for JPEG2000. Search on Bibsonomy IEEE Trans. Circuits Syst. Video Techn. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Andrea Molino, Maurizio Martina, Fabrizio Vacca, Guido Masera, Andrea Terreno, Giorgio Pasquettaz, Giuseppe D'Angelo FPGA implementation of time-frequency analysis algorithms for laser welding monitoring. Search on Bibsonomy Microprocessors and Microsystems - Embedded Hardware Design The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Maurizio Martina, Mario Nicola, Guido Masera Vlsi Implementation of WiMAX Convolutional Turbo Code Encoder and Decoder. Search on Bibsonomy Journal of Circuits, Systems, and Computers The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Maurizio Martina, Guido Masera Turbo NOC: a framework for the design of Network On Chip based turbo decoder architectures Search on Bibsonomy CoRR The full citation details ... 2009 DBLP  BibTeX  RDF
1Stylianos Papaharalabos, P. Takis Mathiopoulos, Guido Masera, Maurizio Martina On Optimal and Near-Optimal Turbo Decoding Using Generalized max* Operator. Search on Bibsonomy IEEE Communications Letters The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Ashwani Singh, Ali Al Ghouwayel, Guido Masera, Emmanuel Boutillon A new performance evaluation metric for sub-optimal iterative decoders. Search on Bibsonomy IEEE Communications Letters The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Simone Zezza, Guido Masera, Saeid Nooshabadi A feasible VLSI engine for soft-input-soft-output for joint source channel codes. Search on Bibsonomy ICIP The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Fabrizio Vacca, Guido Masera, Hazem Moussa, Amer Baghdadi, Michel Jézéquel Flexible Architectures for LDPC Decoders Based on Network on Chip Paradigm. Search on Bibsonomy DSD The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Barbara Cerato, Guido Masera, Emanuele Viterbo Enabling VLSI Processing Blocks for MIMO-OFDM Communications. Search on Bibsonomy VLSI Design The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Fabrizio Vacca, Libero Dinoi, Guido Masera Design of a VLSI Decoder for Partially Structured LDPC Codes. Search on Bibsonomy Int. J. Digital Multimedia Broadcasting The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Maurizio Martina, Mario Nicola, Guido Masera A Flexible UMTS-WiMax Turbo Decoder Architecture. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Maurizio Martina, Guido Masera Corrections to "Multiplierless, Folded 9/7-5/3 Wavelet VLSI Architecture" [Sep 07 770-774]. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Barbara Cerato, Guido Masera, Emanuele Viterbo Decoding the golden space-time trellis coded modulation. Search on Bibsonomy IEEE Communications Letters The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Maurizio Martina, Mario Nicola, Guido Masera Hardware design of a low complexity, parallel interleaver for WiMax duo-binary turbo decoding. Search on Bibsonomy IEEE Communications Letters The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Simone Zezza, Maurizio Martina, Guido Masera, Saeid Nooshabadi Error resilient JPEG2000 decoding for wireless applications. Search on Bibsonomy ICIP The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Simone Zezza, Guido Masera VLSI implementation of SISO arithmetic decoders for joint source channel coding. Search on Bibsonomy DATE The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Paolo Bernardi, Guido Masera, Federico Quaglio, Matteo Sonza Reorda Testing Logic Cores using a BIST P1500 Compliant Approach: A Case of Study Search on Bibsonomy CoRR The full citation details ... 2007 DBLP  BibTeX  RDF
1Barbara Cerato, Guido Masera, Emanuele Viterbo Decoding the Golden Code: a VLSI design Search on Bibsonomy CoRR The full citation details ... 2007 DBLP  BibTeX  RDF
1Maurizio Martina, Guido Masera Multiplierless, Folded 9/7- 5/3 Wavelet VLSI Architecture. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Guido Masera, Federico Quaglio, Fabrizio Vacca Implementation of a Flexible LDPC Decoder. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Barbara Cerato, Guido Masera, Peter Nilsson Hardware architecture for matrix factorization in mimo receivers. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF MIMO systems, QR decomposition, space-time codes
1Maurizio Martina, Andrea Terreno, Fabrizio Vacca, Andrea Molino, Guido Masera, Giuseppe D'Angelo, Giorgio Pasquettaz Real-time implementation of a time-frequency analysis scheme. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF time-frequency analysis, FPGA design
1Maurizio Martina, Guido Masera Flexible blocks for high throughput serially concatenated convolutional codes. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF serially concatenated convolutional codes, design, flexibility
1Alberto Dassatti, Simone Zezza, Mario Nicola, Guido Masera Beyond 3G wireless communication system prototype. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF FPGA, prototype, OFDM
1Maurizio Martina, Guido Masera Mumford and Shah Functional: VLSI Analysis and Implementation. Search on Bibsonomy IEEE Trans. Pattern Anal. Mach. Intell. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Mumford and Shah, performance evaluation, Image segmentation, VLSI implementation
1Maurizio Martina, Guido Masera Low-Complexity, Efficient 9/7 Wavelet Filters VLSI Implementation. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
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