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Publications of "Harold Ishebabi" ( http://dblp.L3S.de/Authors/Harold_Ishebabi )

  Author page on DBLP  Author page in RDF  Community of Harold Ishebabi in ASPL-2

Publication years (Num. hits)
2006 (3) 2008 (5) 2009 (4) 2010 (2) 2018 (1)
Publication types (Num. hits)
article(5) inproceedings(9) phdthesis(1)
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Found 16 publication records. Showing 15 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Christophe Bobda, Franck Yonga, Martin Gebser, Harold Ishebabi, Torsten Schaub High-level synthesis of on-chip multiprocessor architectures based on answer set programming. Search on Bibsonomy J. Parallel Distrib. Comput. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Harold Ishebabi, Christophe Bobda Heuristics for Flexible CMP Synthesis. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2010 DBLP  DOI  BibTeX  RDF chip multiprocessor systems, parallel programs, Reconfigurable computing
1Christophe Bobda, Philipp Mahr, Benjamin Andres, Harold Ishebabi Application-driven architecture synthesis of on-chip Multiprocessor systems. Search on Bibsonomy HPCS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Harold Ishebabi, Philipp Mahr, Christophe Bobda, Martin Gebser, Torsten Schaub Answer Set versus Integer Linear Programming for Automatic Synthesis of Multiprocessor Systems from Real-Time Parallel Programs. Search on Bibsonomy Int. J. Reconfig. Comp. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Harold Ishebabi, Christophe Bobda Automated architecture synthesis for parallel programs on FPGA multiprocessor systems. Search on Bibsonomy Microprocessors and Microsystems - Embedded Hardware Design The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Harold Ishebabi, Philipp Mahr, Christophe Bobda, Martin Gebser, Torsten Schaub Application of ASP for Automatic Synthesis of Flexible Multiprocessor Systems from Parallel Programs. Search on Bibsonomy LPNMR The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Harold Ishebabi Architecture synthesis for adaptive multiprocessor systems on chip. Search on Bibsonomy 2009   RDF
1Anupam Chattopadhyay, Harold Ishebabi, Xiaolin Chen, Zoltan Endre Rakosi, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr Prefabrication and postfabrication architecture exploration for partially reconfigurable VLIW processors. Search on Bibsonomy ACM Trans. Embedded Comput. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF coarse-grained FPGA, VLIW, ASIP
1Anupam Chattopadhyay, Xiaolin Chen, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr High-level Modelling and Exploration of Coarse-grained Re-configurable Architectures. Search on Bibsonomy DATE The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Harold Ishebabi, Philipp Mahr, Christophe Bobda Automatic Synthesis of Multiprocessor Systems from Parallel Programs under Preemptive Scheduling. Search on Bibsonomy ReConFig The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Parallel Computing, Reconfigurable Computing, Multiprocessor Systems
1Philipp Mahr, Christian Lorchner, Harold Ishebabi, Christophe Bobda SoC-MPI: A Flexible Message Passing Library for Multiprocessor Systems-on-Chips. Search on Bibsonomy ReConFig The full citation details ... 2008 DBLP  DOI  BibTeX  RDF FPGA, communication, networks, MPI, MPSoC
1Harold Ishebabi, Philipp Mahr, Christophe Bobda Makespan minimization in automatic synthesis of multiprocessor systems from parallel programs. Search on Bibsonomy FPT The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Anupam Chattopadhyay, B. Geukes, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr Automatic ADL-based operand isolation for embedded processors. Search on Bibsonomy DATE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Oguzhan Atak, Abdullah Atalar, Erdal Arikan, Harold Ishebabi, David Kammler, Gerd Ascheid, Heinrich Meyr, Mario Nicola, Guido Masera Design of Application Specific Processors for the Cached FFT Algorithm. Search on Bibsonomy ICASSP (3) The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Harold Ishebabi, Gerd Ascheid, Heinrich Meyr, Oguzhan Atak, Abdullah Atalar, Erdal Arikan An efficient parallelization technique for high throughput FFT-ASIPs. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
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