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Publications at "ISVLSI"( http://dblp.L3S.de/Venues/ISVLSI )

URL (DBLP): http://dblp.uni-trier.de/db/conf/isvlsi

Publication years (Num. hits)
2002 (26) 2003 (57) 2004 (71) 2005 (72) 2006 (88) 2007 (94) 2008 (96) 2009 (53) 2010 (110) 2011 (83) 2012 (74) 2013 (50) 2014 (109) 2015 (121) 2016 (128) 2017 (119) 2018 (134)
Publication types (Num. hits)
inproceedings(1468) proceedings(17)
Venues (Conferences, Journals, ...)
ISVLSI(1485)
GrowBag graphs for keyword ? (Num. hits/coverage)

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The graphs summarize 79 occurrences of 73 keywords

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Found 1485 publication records. Showing 1485 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1S. Dinesh Kumar, Carson Labrado, Riasad Badhan, Himanshu Thapliyal, Vijay Singh Solar Cell Based Physically Unclonable Function for Cybersecurity in IoT Devices. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yuting Cao, Hernan M. Palombo, Sandip Ray, Hao Zheng Enhancing Observability for Post-Silicon Debug with On-chip Communication Monitors. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Karen Khachikyan, Abraham Balabanyan, Hrachya Gumroyan Precise Duty Cycle Variation Detection and Self-Calibration System for High-Speed Data Links. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Liuyang Zhang, Wang Kang, Hao Cai, Peng Ouyang, Lionel Torres, Youguang Zhang, Aida Todri-Sanial, Weisheng Zhao A Robust Dual Reference Computing-in-Memory Implementation and Design Space Exploration Within STT-MRAM. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Zhiming Zhang, Qiaoyan Yu Exploiting Principle of Moving Target Defense to Secure FPGA Systems. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Hao Geng, Haoyu Yang, Bei Yu 0001, Xingquan Li, Xuan Zeng 0001 Sparse VLSI Layout Feature Extraction: A Dictionary Learning Approach. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yunxi Guo, Timothy Dee, Akhilesh Tyagi Multi-block APUF with 2-Level Voltage Supply. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Chang Song, Hsin-Pai Cheng, Huanrui Yang, Sicheng Li, Chunpeng Wu, Qing Wu, Yiran Chen, Hai Li 0001 MAT: A Multi-strength Adversarial Training Method to Mitigate Adversarial Attacks. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Renzo Andri, Lukas Cavigelli, Davide Rossi, Luca Benini Hyperdrive: A Systolically Scalable Binary-Weight CNN Inference Engine for mW IoT End-Nodes. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Tomas Grimm, Djones Lettnin, Michael Hübner ARCHVerifyr: An Embedded Software-Driven Approach for Architecture Verification. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Mohammad Baharloo, Ahmad Khonsari, Pouya Shiri, Iman Namdari, Dara Rahmati High-Average and Guaranteed Performance for Wireless Networks-on-Chip Architectures. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Ankit Rehani, Sujay Deb, Pydi Ganga Bahubalindruni, Bhavin Odedara, Srikanth Bojja A High-Efficient Current-Mode PWM DC-DC Buck Converter Using Dynamic Frequency Scaling. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Suraj Paul, Navonil Chatterjee, Prasun Ghosal A Dynamic Resource Allocation Strategy for NoC Based Multicore Systems with Permanent Faults. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yung-Chun Lei, Tien-Kuo Lin, Juinn-Dar Huang Multi-target Many-Reactant Sample Preparation for Reactant Minimization on Microfluidic Biochips. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1S. R. Swamy Saranam, Madhu Mutyam TDC: Tagless DRAM Cache. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Hadi Mardani Kamali, Kimia Zamiri Azar, Kris Gaj, Houman Homayoun, Avesta Sasan LUT-Lock: A Novel LUT-Based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Nicholas Jao, Akshay Krishna Ramanathan, Srivatsa Rangachar Srinivasa, Sumitha George, John Sampson, Vijaykrishnan Narayanan Harnessing Emerging Technology for Compute-in-Memory Support. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Sai Li, Wang Kang, Xing Chen, Jinyu Bai, Biao Pan, Youguang Zhang, Weisheng Zhao Emerging Neuromorphic Computing Paradigms Exploring Magnetic Skyrmions. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Junchao Wang, Lingxuan Fu, Liyang Yu, Xiwei Huang, Philip Brisk, William H. Grover Accelerating Simulation of Particle Trajectories in Microfluidic Devices by Constructing a Cloud Database. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Sudeendra Kumar K, Saurabh Seth, Sauvagya Ranjan Sahoo, Abhishek Mahapatra, Ayas Kanta Swain, Kamalakanta Mahapatra PUF-Based Secure Test Wrapper for SoC Testing. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Masanori Hashimoto, Yuki Nakazawa, Ryutaro Doi, Jaehoon Yu Interconnect Delay Analysis for RRAM Crossbar Based FPGA. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Zhezhi He, Shaahin Angizi, Adnan Siraj Rakin, Deliang Fan BD-NET: A Multiplication-Less DNN with Binarized Depthwise Separable Convolution. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Ryutaro Doi, Masanori Hashimoto SAT Encoding-Based Verification of Sneak Path Problem in Via-Switch FPGA. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Satyajit Mohapatra, Hari Shanker Gupta, Nihar Ranjan Mohapatra Mismatch Resilient 3.5-Bit MDAC with MCS-CFCS. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1M. K. Jayaram Reddy, Sreenivasulu Polineni, Laxminidhi Tonse 91dB Dynamic Range 9.5nW Low Pass Filter for Bio-Medical Applications. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Hiroyuki Baba, Tongxin Yang, Masahiro Inoue, Kaori Tajima, Tomoaki Ukezono, Toshinori Sato A Low-Power and Small-Area Multiplier for Accuracy-Scalable Approximate Computing. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Sagarvarma Sayyaparaju, Ryan Weiss, Garrett S. Rose A Mixed-Mode Neuron with On-chip Tunability for Generic Use in Memristive Neuromorphic Systems. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Ajinkya Kale, Johannes Sturm, Vijaya Sankara Rao Pasupureddi 0.9 to 2.5 GHz Sub-Sampling Receiver Architecture for Dynamically Reconfigurable SDR. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jinhang Choi, Srivatsa Rangachar Srinivasa, Yasuki Tanabe, Jack Sampson, Vijaykrishnan Narayanan A Power-Efficient Hybrid Architecture Design for Image Recognition Using CNNs. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Wenshuo Li, Jincheng Yu, Xuefei Ning, Pengjun Wang, Qi Wei 0001, Yu Wang 0002, Huazhong Yang Hu-Fu: Hardware and Software Collaborative Attack Framework Against Neural Networks. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Anirban Sengupta, Shubha Neema, Pallabi Sarkar, Sri Harsha P, Saraju P. Mohanty, Mrinal Kanti Naskar Obfuscation of Fault Secured DSP Design Through Hybrid Transformation. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Md Jubaer Hossain Pantho, Pankaj Bhowmik, Christophe Bobda Pixel-Parallel Architecture for Neuromorphic Smart Image Sensor with Visual Attention. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Atsushi Takahashi 0001, Shimpei Sato, Hiroki Ogura, Yu-Min Sung, Ting-Chi Wang Pattern Similarity Metrics for Layout Pattern Classification and Their Validity Analysis by Lithographic Responses. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1David Berend, Bernhard Jungk, Shivam Bhasin Guessing Your PIN Right: Unlocking Smartphones with Publicly Available Sensor Data. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Donel Anto, Abhijeet D. Taralkar, Kumar Y. B. Nithin, M. H. Vasantha Performance Enhancement of Split Length Compensated Operational Amplifiers. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Dongqin Zhou, Keni Qiu, Yuanchao Xu, Xin Shi, Yongpan Liu A Dual-Threshold Scheme Along with Security Reinforcement for Energy Efficient Nonvolatile Processors. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Nan Wang 0003, Manting Yao, Dongxu Jiang, Song Chen 0001, Yu Zhu Security-Driven Task Scheduling for Multiprocessor System-on-Chips with Performance Constraints. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Fangxuan Sun, Jun Lin, Zhongfeng Wang An Optimized Architecture For Decomposed Convolutional Neural Networks. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Ritu Ranjan Shrivastwa, Vikramkumar Pudi, Anupam Chattopadhyay An FPGA-Based Brain Computer Interfacing Using Compressive Sensing and Machine Learning. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Prasanna Kansakar, Arslan Munir A Two-Tiered Heterogeneous and Reconfigurable Application Processor for Future Internet of Things. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Marjan Asadinia, Christophe Bobda Enhancing Lifetime of PCM-Based Main Memory with Efficient Recovery of Stuck-at Faults. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Koichiro Ishibashi, Shiho Takahashi A 375 nA Input Off Current Schmitt Triger LDO for Energy Harvesting IoT Sensors. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1R. K. Siddharth, Sunil R., Nithin Y. B. Kumar, M. H. Vasantha, Edoardo Bonizzoni An Asynchronous Analog to Digital Converter for Surveillance Camera Applications. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Xin Shi, Tongda Wu, Keni Qiu, Huazhong Yang, Yongpan Liu Time Stamp Based Scheduling for Energy Harvesting Systems with Hybrid Nonvolatile Hardware Support. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Qiaoyan Yu, Zhiming Zhang, Jaya Dofe Investigating Reliability and Security of Integrated Circuits and Systems. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Somayeh Kashi, Ahmad Patooghy, Dara Rahmatiy, Mahdi Fazeli, Michel A. Kinsy Application Specific Networks-on-Chip Synthesis: An Energy Efficient Approach. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Zhe Li 0001, Ji Li 0006, Ao Ren, Caiwen Ding, Jeffrey Draper, Qinru Qiu, Bo Yuan 0001, Yanzhi Wang Towards Budget-Driven Hardware Optimization for Deep Convolutional Neural Networks Using Stochastic Computing. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Florian Kriebel, Semeen Rehman, Muhammad Abdullah Hanif, Faiq Khalid, Muhammad Shafique 0001 Robustness for Smart Cyber Physical Systems and Internet-of-Things: From Adaptive Robustness Methods to Reliability and Security for Machine Learning. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Shin Miyamoto, Nobuaki Kobayashi Development of High-Stability, Low-Leakage 6Tr-SRAM with Single Data Line and Single Power Supply Using SOTB Process. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Changcheng Tang, Zuochang Ye, Yan Wang Parametric Circuit Optimization with Reinforcement Learning. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Nishchay H. Sule, Troy Powell, Sameer Hemmady, Payman Zarkesh-Ha Predicting the Tolerance of Extreme Electromagnetic Interference on MOSFETs. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Zhezhi He, Shaahin Angizi, Deliang Fan Accelerating Low Bit-Width Deep Convolution Neural Network in MRAM. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Atul Prasad Deb Nath, Swarup Bhunia, Sandip Ray ArtiFact: Architecture and CAD Flow for Efficient Formal Verification of SoC Security Policies. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Haeyoon Cho, Joonho Kong, Arslan Munir, Naresh Kumar Giri CT-Cache: Compressed Tag-Driven Cache Architecture. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Hao Cai, You Wang, Wang Kang, Lirida A. B. Naviner, Xinning Liu, Jun Yang 0006, Weisheng Zhao MRAM-on-FDSOI Integration: A Bit-Cell Perspective. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Debapriya Basu Roy, Debdeep Mukhopadhyay Minimalistic Perspective to Public Key Implementations on FPGA. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Luca Stornaiuolo, Marco D. Santambrogio, Donatella Sciuto On How to Efficiently Implement Deep Learning Algorithms on PYNQ Platform. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Tsung-Yi Ho Design Automation and Test for Flow-Based Biochips: Past Successes and Future Challenges. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Chia-Cheng Wu, Kung-Han Ho, Juinn-Dar Huang, Chun-Yao Wang Architecture Exploration and Delay Minimization Synthesis for SET-Based Programmable Gate Arrays. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Manoj Kumar JYV, Ayas Kanta Swain, Sudeendra Kumar K, Sauvagya Ranjan Sahoo, Kamalakanta Mahapatra Run Time Mitigation of Performance Degradation Hardware Trojan Attacks in Network on Chip. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Mahmoud A. Elmohr, Sachin Kumar, Mustafa Khairallah, Anupam Chattopadhyay A Hardware-Efficient Implementation of CLOC for On-chip Authenticated Encryption. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Soroush Khaleghi, Wenjing Rao Hardware Obfuscation Using Strong PUFs. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Meng Yang, Bingzhe Li, David J. Lilja, Bo Yuan 0001, Weikang Qian Towards Theoretical Cost Limit of Stochastic Number Generators for Stochastic Computing. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Islam Badreldin, Ann Gordon-Ross, Tosiron Adegbija, Mohamad Hammam Alsafrjalani Realizing Closed-Loop, Online Tuning and Control for Configurable-Cache Embedded Systems: Progress and Challenges. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Anirban Sengupta, Saraju P. Mohanty Functional Obfuscation of DSP Cores Using Robust Logic Locking and Encryption. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Anirban Bhattacharjee, Chandan Bandyopadhyay, Robert Wille, Rolf Drechsler, Hafizur Rahaman A Novel Approach for Nearest Neighbor Realization of 2D Quantum Circuits. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1 2018 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2018, Hong Kong, China, July 8-11, 2018 Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  BibTeX  RDF
1Kenneth Schmitz, Oliver Keszöcze, Jurij Schmidt, Daniel Große, Rolf Drechsler Towards Dynamic Execution Environment for System Security Protection Against Hardware Flaws. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Shao-Yun Fang, Kuo-Hao Wu Guiding Template-Induced Design Challenges in DSA-MP Lithography. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Sri Harsha Gade, Hemanta Kumar Mondal, Sujay Deb High Bandwidth Off-Chip Memory Access Through Hybrid Switching and Inter-Chip Wireless Links. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Subhendu Kumar Sahoo, Krishna Dhoot, Rasmita Sahoo High Performance Ternary Multiplier Using CNTFET. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yang Nan, Chenchang Zhan, Guanhua Wang, Linjun He, Han Li Replica-Based Low Drop-Out Voltage Regulator with Assistant Power Transistors for Digital VLSI Systems. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1James Shey, Naghmeh Karimi, Ryan Robucci, Chintan Patel Design-Based Fingerprinting Using Side-Channel Power Analysis for Protection Against IC Piracy. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jan Nevoral, Richard Ruzicka, Vaclav Simek CMOS Gates with Second Function. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Chenghong Wang, Zeinab S. Jalali, Caiwen Ding, Yanzhi Wang, Sucheta Soundarajan A Fast and Effective Memristor-Based Method for Finding Approximate Eigenvalues and Eigenvectors of Non-negative Matrices. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Hui Zhao 0013, Xianwei Cheng, Saraju P. Mohanty, Juan Fang Designing Scalable Hybrid Wireless NoC for GPGPUs. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Subrata Das, Debesh Kumar Das Floorplanning in Graphene Nanoribbon (GNR) Based Circuits. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Sukanta Dey, Satyabrata Dash, Sukumar Nandi, Gaurav Trivedi PGIREM: Reliability-Constrained IR Drop Minimization and Electromigration Assessment of VLSI Power Grid Networks Using Cooperative Coevolution. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Alireza Mahzoon, Daniel Große, Rolf Drechsler Combining Symbolic Computer Algebra and Boolean Satisfiability for Automatic Debugging and Fixing of Complex Multipliers. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Siqi Wang, Alok Prakash, Tulika Mitra Software Support for Heterogeneous Computing. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Kenneth O'Neal, Philip Brisk Predictive Modeling for CPU, GPU, and FPGA Performance and Power Consumption: A Survey. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yu Zou, Mingjie Lin Very Large-Scale and Node-Heavy Graph Analytics with Heterogeneous FPGA+CPU Computing Platform. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Kalindu Herath, Alok Prakash, Udaree Kanewala, Thambipillai Srikanthan Communication-Aware Module Placement for Power Reduction in Large FPGA Designs. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Iris Hui-Ru Jiang, Pei-Yu Lee Timing Macro Modeling for Efficient Hierarchical Timing Analysis. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Saeideh Shirinzadeh, Rolf Drechsler Logic Synthesis for In-memory Computing Using Resistive Memories. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Harsha M. V., B. P. Harish An Integrated MaxFit Genetic Algorithm-SPICE Framework for 2-Stage Op-Amp Design Automation. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Luca Marchetti, Yngvar Berg, Mehdi Azadmehr A Low Power, High Gain Semi-Floating Gate Amplifier for Resonating Sensors Front-End. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Zihao Liu, Tao Liu, Jie Guo 0002, Nansong Wu, Wujie Wen An ECC-Free MLC STT-RAM Based Approximate Memory Design for Multimedia Applications. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Qian Chen, Sheqin Dong A Novel Mixed-Size Fixed-Outline Floorplacement Algorithm. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1George Provelengios, Arman Pouraghily, Russell Tessier, Tilman Wolf A Hardware Monitor to Protect Linux System Calls. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Senwen Kan, Jennifer Dworak Can Soft Errors be Handled Securely? Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Ankita Porwal, Chitrakant Sahu Biosensing Performance Optimization of DMFET for Fully Filled and Partially Filled Cavity. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yongfu Li, I-Lun Tseng, Zhao Chuan Lee, Valerio Perez, Vikas Tripathi, Yoong Seang Jonathan Ong Identifying Lithography Weak-Points of Standard Cells with Partial Pattern Matching. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Xiaobang Liu, Ranga Vemuri Fast Heuristics for Near-Optimal Signal Restoration in Post-Silicon Validation. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Ankit Jindal, Binod Kumar 0001, Nitish Jindal, Masahiro Fujita, Virendra Singh Silicon Debug with Maximally Expanded Internal Observability Using Nearest Neighbor Algorithm. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Faqiang Mei, Lei Zhang, Chongyan Gu, Yuan Cao, Chenghua Wang, Weiqiang Liu A Highly Flexible Lightweight and High Speed True Random Number Generator on FPGA. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Iris Hui-Ru Jiang, Hua-Yu Chang Recent Research and Challenges in Multiple Patterning Layout Decomposition. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Bi Wu, Xiaolong Zhang, Yuanqing Cheng, Zhaohao Wang, Dijun Liu, Youguang Zhang, Weisheng Zhao Write Energy Optimization for STT-MRAM Cache with Data Pattern Characterization. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Lakshmi N. S, Bhaskar M Gyrator-C Based Bandpass Filter with Improved Dynamic Range for Fully Integrated RF Front-End. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Cunxi Yu, Heinz Riener, Francesca Stradolini, Giovanni De Micheli Generating Safety Guidance for Medical Injection with Three-Compartment Pharmacokinetics Model. Search on Bibsonomy ISVLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
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