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Publications at "ISVLSI"( http://dblp.L3S.de/Venues/ISVLSI )

URL (DBLP): http://dblp.uni-trier.de/db/conf/isvlsi

Publication years (Num. hits)
2002 (26) 2003 (57) 2004 (71) 2005 (72) 2006 (88) 2007 (94) 2008 (96) 2009 (53) 2010 (110) 2011 (83) 2012 (74) 2013 (50) 2014 (109) 2015 (121) 2016 (128) 2017 (119) 2018 (134) 2019 (116)
Publication types (Num. hits)
inproceedings(1583) proceedings(18)
Venues (Conferences, Journals, ...)
ISVLSI(1601)
GrowBag graphs for keyword ? (Num. hits/coverage)

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The graphs summarize 79 occurrences of 73 keywords

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Found 1601 publication records. Showing 1601 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Xiaoru Xie, Fangxuan Sun, Jun Lin, Zhongfeng Wang Fast-ABC: A Fast Architecture for Bottleneck-Like Based Convolutional Neural Networks. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Mimi Xie, Yawen Wu, Zhenge Jia, Jingtong Hu In-memory AES Implementation for Emerging Non-Volatile Main Memory. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Anup Gangwar, Zheng Xu, Nitin Kumar Agarwal, Ravishankar Sreedharan, Ambica Prasad Traffic Driven Automated Synthesis of Network-on-Chip from Physically Aware Behavioral Specification. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Ruizhe Cai, Xiaolong Ma, Olivia Chen, Ao Ren, Ning Liu, Nobuyuki Yoshikawa, Yanzhi Wang IDE Development, Logic Synthesis and Buffer/Splitter Insertion Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Renjie Yao, Yaoyao Ye, Weichen Liu Design of a Hierarchical Clos-Benes Optical Network-on-Chip Architecture. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Adarsha Balaji, Anup Das 0001 A Framework for the Analysis of Throughput-Constraints of SNNs on Neuromorphic Hardware. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Arash Fayyazi, Souvik Kundu, Shahin Nazarian, Peter A. Beerel, Massoud Pedram CSrram: Area-Efficient Low-Power Ex-Situ Training Framework for Memristive Neuromorphic Circuits Based on Clustered Sparsity. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Xinyi Zhang, Weiwen Jiang, Yiyu Shi, Jingtong Hu When Neural Architecture Search Meets Hardware Implementation: from Hardware Awareness to Co-Design. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Surajeet Ghosh, Shaon Dasgupta, Sanchita Saha Ray A Comparison-free Hardware Sorting Engine. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Shaahin Angizi, Zhezhi He, Dayane Reis, Xiaobo Sharon Hu, Wilman Tsai, Shy Jay Lin, Deliang Fan Accelerating Deep Neural Networks in Processing-in-Memory Platforms: Analog or Digital Approach? Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Jing Zeng, Yangcan Zhou, Jun Lin, Zhongfeng Wang Hardware Implementation of Improved Fast-SSC-Flip Decoder for Polar Codes. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Sreeja Chowdhury, Hao-Ting Shen, Beomsoo Park, Nima Maghari, Domenic Forte Aging Analysis of Low Dropout Regulator for Universal Recycled IC Detection. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Sudipta Paul 0001, Pritha Banerjee, Susmita Sur-Kolay Minimization of Flare in EUVL by Simultaneous Wire Segment Perturbation and Dummification. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Shubham Rai, Ansh Rupani, Pallab Nath, Akash Kumar 0001 Hardware Watermarking Using Polymorphic Inverter Designs Based On Reconfigurable Nanotechnologies. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Alberto Marchisio, Muhammad Abdullah Hanif, Faiq Khalid, George Plastiras, Christos Kyrkou, Theocharis Theocharides, Muhammad Shafique 0001 Deep Learning for Edge Computing: Current Trends, Cross-Layer Optimizations, and Open Research Challenges. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Nicolás Wainstein, Tamir Tsabari, Yarden Goldin, Eilam Yalon, Shahar Kvatinsky A Dual-Band CMOS Low-Noise Amplifier using Memristor-Based Tunable Inductors. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Pinchen Cui, Ujjwal Guin Countering Botnet of Things using Blockchain-Based Authenticity Framework. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1 2019 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019, Miami, FL, USA, July 15-17, 2019 Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  BibTeX  RDF
1Süleyman Savas, Yassin Atwa, Tomas Nordström, Zain Ul-Abdin Using Harmonized Parabolic Synthesis to Implement a Single-Precision Floating-Point Square Root Unit. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Mehrnoosh Raoufi, Quan Deng, Youtao Zhang, Jun Yang 0002 PageCmp: Bandwidth Efficient Page Deduplication through In-memory Page Comparison. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Shichao Yu, Weiqiang Liu, Máire O'Neill An Improved Automatic Hardware Trojan Generation Platform. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Adnan Siraj Rakin, Deliang Fan Defense-Net: Defend Against a Wide Range of Adversarial Attacks through Adversarial Detector. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Zheng Xu, Jacob Abraham Design of a Safe Convolutional Neural Network Accelerator. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Ashutosh Dhar, Sitao Huang, Jinjun Xiong, Damir Jamsek, Bruno Mesnet, Jian Huang 0006, Nam Sung Kim, Wen-Mei W. Hwu, Deming Chen Near-Memory and In-Storage FPGA Acceleration for Emerging Cognitive Computing Workloads. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Salma Hesham, Diana Goehringer, Mohamed A. Abd El Ghany Dark-Silicon Inspired Energy Efficient Hierarchical TDM NoC. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Khanh N. Dang, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran TSV-IaS: Analytic Analysis and Low-Cost Non-Preemptive on-Line Detection and Correction Method for TSV Defects. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Timothy Baker, John Hayes Impact of Autocorrelation on Stochastic Circuit Accuracy. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Hao Cai, Honglan Jiang, Menglin Han, Zhaohao Wang, You Wang, Jun Yang 0006, Jie Han 0001, Leibo Liu, Weisheng Zhao Pj-AxMTJ: Process-in-memory with Joint Magnetization Switching for Approximate Computing in Magnetic Tunnel Junction. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Alexandros Kouris, Stylianos I. Venieris, Christos-Savvas Bouganis Towards Efficient On-Board Deployment of DNNs on Intelligent Autonomous Systems. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Yuntao Liu 0001, Dana Dachman-Soled, Ankur Srivastava Mitigating Reverse Engineering Attacks on Deep Neural Networks. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Arman Roohi, Ronald F. DeMara IRC Cross-Layer Design Exploration of Intermittent Robust Computation Units for IoTs. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Ann Gordon-Ross, Saleh Abdel-Hafeez, Mohamad Hammam Alsafrjalani A One-Cycle FIFO Buffer for Memory Management Units in Manycore Systems. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Osman Elgawi, A. M. Mutawa, Afaq Ahmad 0001 Energy-Efficient Embedded Inference of SVMs on FPGA. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Pankaj Bhowmik, Md Jubaer Hossain Pantho, Sujan Saha, Christophe Bobda A Reconfigurable Layered-Based Bio-Inspired Smart Image Sensor. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Yao Chen, Kai Zhang, Cheng Gong, Cong Hao, Xiaofan Zhang, Tao Li, Deming Chen T-DLA: An Open-source Deep Learning Accelerator for Ternarized DNN Models on Embedded FPGA. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Jingyan Fu, Zhiheng Liao, Na Gong, Jinhui Wang Linear Optimization for Memristive Device in Neuromorphic Hardware. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Michael Zuzak, Ankur Srivastava Memory Locking: An Automated Approach to Processor Design Obfuscation. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Brett Mathis, James E. Stine A Novel Single/Double Precision Normalized IEEE 754 Floating-Point Adder/Subtracter. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Johan Marconot, David Hély, Florian Pebay-Peyroula SPN-DPUF: Substitution-Permutation Network Based Secure Circuit for Digital PUF. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Yiming Hu, Shuang Liang, Jincheng Yu, Yu Wang 0002, Huazhong Yang On-Chip Instruction Generation for Cross-Layer CNN Accelerator on FPGA. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Yasaswy Kasarabada, Sudheer Ram Thulasi Raman, Ranga Vemuri Deep State Encryption for Sequential Logic Circuits. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Yasuhiro Takahashi, Hiroki Koyasu, S. Dinesh Kumar, Himanshu Thapliyal Post-Layout Simulation of Quasi-Adiabatic Logic Based Physical Unclonable Function. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Abhishek Chakraborty 0001, Ankur Srivastava Hardware-Software Co-Design Based Obfuscation of Hardware Accelerators. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Jong Bin Lim, Deming Chen Automated Communication and Floorplan-Aware Hardware/Software Co-Design for SoC. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Ali Ozdemir, Mshabab Alrizah, Kyusun Choi Optimization of Comparator Selection Algorithm for TIQ Flash ADC Using Dynamic Programming Approach. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Sunil R., R. K. Siddharth, Nithin Y. B. Kumar, M. H. Vasantha An Asynchronous Analog to Digital Converter for Video Camera Applications. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Walter Lau Neto, Xifan Tang, Max Austin, Luca G. Amarù, Pierre-Emmanuel Gaillardon Improving Logic Optimization in Sequential Circuits using Majority-inverter Graphs. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Yang Sun, Spencer K. Millican Test Point Insertion Using Artificial Neural Networks. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Soheil Nazar Shahsavani, Massoud Pedram A Hyper-Parameter Based Margin Calculation Algorithm for Single Flux Quantum Logic Cells. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Feng Xiong, Fengbin Tu, Shouyi Yin, Shaojun Wei Towards Efficient Compact Network Training on Edge-Devices. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Luciano L. Caimi, Fernando Gehm Moraes Security in Many-Core SoCs Leveraged by Opaque Secure Zones. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Prashansa Mukim, Aditya Dalakoti, David McCarthy, Brandon Pon, Carrie Segal, Merritt Miller, James F. Buckwalter, Forrest Brewer Distributed Pulse Rotary Traveling Wave VCO: Architecture and Design. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Xinzhe Liu, Fupeng Chen, Yajun Ha Area Efficient Box Filter Acceleration by Parallelizing with Optimized Adder Tree. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Zengchao Yan, Jun Lin, Zhongfeng Wang A Low-Complexity RS Decoder for Triple-Error-Correcting RS Codes. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Kevin Vaca, Archit Gajjar, Xiaokun Yang Real-Time Automatic Music Transcription (AMT) with Zync FPGA. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Pampa Howladar, Pranab Roy, Hafizur Rahaman 0001 Micro-electrode-dot Array Based Biochips : Advantages of Using Different Shaped CMAs. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Sébastien Ollivier, Donald Kline Jr., Roxy A. Kawsher, Rami G. Melhem, Sanjukta Bhanja, Alex K. Jones The Power of Orthogonality. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Md Jubaer Hossain Pantho, Pankaj Bhowmik, Christophe Bobda Neuromorphic Image Sensor Design with Region-Aware Processing. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Saman Fröhlich, Saeideh Shirinzadeh, Rolf Drechsler Logic Synthesis for Hybrid CMOS-ReRAM Sequential Circuits. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Vishalini R. Laguduva, Sheikh Ariful Islam, Sathyanarayanan N. Aakur, Srinivas Katkoori, Robert Karam Machine Learning Based IoT Edge Node Security Attack and Countermeasures. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Amin Rezaei, Jie Gu, Hi Zhou Hybrid Memristor-CMOS Obfuscation Against Untrusted Foundries. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Ugo Mureddu, Brice Colombier, Nathalie Bochard, Lilian Bossuet, Viktor Fischer Transient Effect Ring Oscillators Leak Too. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Yier Jin Towards Hardware-Assisted Security for IoT Systems. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Yu Zou, Mingjie Lin FAST: A Frequency-Aware Skewed Merkle Tree for FPGA-Secured Embedded Systems. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Dimitrios Stathis 0001, Yu Yang, Saurabh Tewari, Ahmed Hemani, Kolin Paul, Manfred Grabherr, Rafi Ahmad Approximate Computing Applied to Bacterial Genome Identification using Self-Organizing Maps. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Bryson Shannon, Spandana Etikala, Yutian Gui, Ali Shuja Siddiqui, Fareena Saqib Blockchain Based Distributed Key Provisioning and Secure Communication over CAN FD. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Amro Awad, Suboh Suboh, Mao Ye, Kazi Abu Zubair, Mazen Al-Wadi Persistently-Secure Processors: Challenges and Opportunities for Securing Non-Volatile Memories. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Ning-Chi Huang, Yu-Guang Chen, Kai-Chiang Wu Exploration and Exploitation of Dual Timing Margins for Improving Power Efficiency of Variable-Latency Designs. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Zheyu Liu, Erxiang Ren, Li Luo, Qi Wei 0001, Xing Wu, Xueqing Li, Fei Qiao, Xin-Jun Liu, Huazhong Yang A 1.8mW Perception Chip with Near-Sensor Processing Scheme for Low-Power AIoT Applications. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Zheyu Liu, Zichen Fan, Qi Wei 0001, Xing Wu, Fei Qiao, Ping Jin, Xinjun Liu, Chengliang Liu, Huazhong Yang Design of Switched-Current Based Low-Power PIM Vision System for IoT Applications. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Siva Nishok Dhanuskodi, Daniel Holcomb Enabling Microarchitectural Randomization in Serialized AES Implementations to Mitigate Side Channel Susceptibility. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Xunzhao Yin, Dayane Reis, Michael T. Niemier, Xiaobo Sharon Hu Ferroelectric FET Based TCAM Designs for Energy Efficient Computing. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Mohammed Alawad, Georgia D. Tourassi Computationally Efficient Learning of Quality Controlled Word Embeddings for Natural Language Processing. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Amina Annagrebah, E. Bechetoille, I. B. Laktineh, H. Chanal, P. Russo, H. Mathez A Multi-phase Time-to-Digital Converter Differential Vernier Ring Oscillato. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Henrique Placido, Ricardo Reis 0001 Tackling the Drawbacks of a Lagrangian Relaxation Based Discrete Gate Sizing Algorithm. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Weiguang Chen, Zheng Wang, Shanliao Li, Zhibin Yu, Huijuan Li Accelerating Compact Convolutional Neural Networks with Multi-threaded Data Streaming. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Alex Ayling, Satya Venkata Sandeep Avvaru, Keshab K. Parhi Not All Feed-Forward MUX PUFs Generate Unique Signatures. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Yinglin Zhao, Jianlei Yang, Xiaotao Jia, Xueyan Wang, Zhaohao Wang, Wang Kang, Youguang Zhang, Weisheng Zhao Exploiting Near-Memory Processing Architectures for Bayesian Neural Networks Acceleration. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Sarit Chakraborty, Susanta Chakraborty Routing Performance Optimization for Homogeneous Droplets on MEDA-based Digital Microfluidic Biochips. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1M. Mohamed Asan Basiri, Sandeep K. Shukla Formal Hardware Verification of InfoSec Primitives. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Sebastian Pointner, Oliver Frank, Christoph Hazott, Robert Wille Test Your Test Programs Pre-Silicon: A Virtual Test Methodology for Industrial Design Flows. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Robert Wille, Marcel Walter, Frank Sill Torres, Daniel Große, Rolf Drechsler Ignore Clocking Constraints: An Alternative Physical Design Methodology for Field-Coupled Nanotechnologies. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Changlu Liu, Tianxiang Lan, Qin Li, Kaige Jia, Yidian Fan, Xing Wu, Fei Qiao, Wei Qi, Xin-Jun Liu, Huazhong Yang Energy-efficient Analog Processing Architecture for Direction of Arrival with Microphone Array. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Shivam Swami, Kartik Mohanram ASSET: Architectures for Smart Security of Non-Volatile Memories. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Nooshin Nosrati, Katayoon Basharkhah, Rezgar Sadeghi, Zainalabedin Navabi An ESL Environment for Modeling Electrical Interconnect Faults. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Abhishek Vashist, Andrew Keats, Sai Manoj Pudukotai Dinakarrao, Amlan Ganguly Securing a Wireless Network-on-Chip Against Jamming Based Denial-of-Service Attacks. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Ruben Vazquez, Islam Badreldin, Mohamad Hammam Alsafrjalani, Ann Gordon-Ross Machine Learning-based Prediction for Phase-Based Dynamic Architectural Specialization. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Chi Fung Brian Fong, Jiandong Mu, Wei Zhang 0012 A Cost-Effective CNN Accelerator Design with Configurable PU on FPGA. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Ling-Yen Song, Yu-Ying Li, Yung-Chun Lei, Juinn-Dar Huang Time-Constrained Sample Preparation Algorithm for Reactant Minimization on Digital Microfluidic Biochips. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Karthikeyan Nagarajan, Sina Sayyah Ensan, Swagata Mandal, Swaroop Ghosh, Anupam Chattopadhyay iMACE: In-Memory Acceleration of Classic McEliece Encoder. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Cheng-Wei Tai, Rung-Bin Lin Morphed Standard Cell Layouts for Pin Length Reduction. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Fatemeh Serajeh-hassani, Mohammad Sadrosadati, Sebastian Pointner, Robert Wille, Hamid Sarbazi-Azad Focus on What is Needed: Area and Power Efficient FPGAs Using Turn-Restricted Switch Boxes. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Edgard Muñoz-Coreas, Himanshu Thapliyal Design of Quantum Circuits for Cryptanalysis and Image Processing Applications. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Xiangyu Chen, Yasuhiro Takahashi Design of a CMOS Broadband Transimpedance Amplifier with Floating Active Inductor. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Himanshu Thapliyal, Zachary Kahleifeh Approximate Energy Recovery 4-2 Compressor for Low-Power Sub-GHz IoT Applications. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Vamsee Reddy Kommareddy, Clayton Hughes, Simon D. Hammond, Amro Awad Investigating Fairness in Disaggregated Non-Volatile Memories. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Anderson Luiz Sartor, Pedro Henrique Exenberger Becker, Stephan Wong, Radu Marculescu, Antonio Carlos Schneider Beck Machine Learning-Based Processor Adaptability Targeting Energy, Performance, and Reliability. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Soheil Salehi, Alireza Zaeemzadeh, Adrian Tatulian, Nazanin Rahnavard, Ronald F. DeMara MRAM-Based Stochastic Oscillators for Adaptive Non-Uniform Sampling of Sparse Signals in IoT Applications. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Joel Ortiz Sosa, Olivier Sentieys, Christian Roland Adaptive Transceiver for Wireless NoC to Enhance Multicast/Unicast Communication Scenarios. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Siavoosh Payandeh Azad, Gert Jervan, Michael Tempelmeier, Johanna Sepúlveda CAESAR-MPSoC: Dynamic and Efficient MPSoC Security Zones. Search on Bibsonomy ISVLSI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
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