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Publications at "Integration"( http://dblp.L3S.de/Venues/Integration )

URL (DBLP): http://dblp.uni-trier.de/db/journals/integration

Publication years (Num. hits)
1983 (21) 1984 (20) 1985 (23) 1986 (26) 1987 (23) 1988 (17) 1989 (40) 1990 (28) 1991 (49) 1992 (26) 1993 (39) 1994 (18) 1995 (19) 1996 (17) 1997 (30) 1998 (22) 1999 (16) 2000 (20) 2001-2002 (27) 2003 (26) 2004 (32) 2005 (21) 2006 (22) 2007 (50) 2008 (46) 2009 (49) 2010 (32) 2011 (28) 2012 (41) 2013 (42) 2014 (51) 2015 (69) 2016 (108) 2017 (120) 2018 (118) 2019 (19)
Publication types (Num. hits)
article(1355)
Venues (Conferences, Journals, ...)
Integration(1355)
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Found 1355 publication records. Showing 1355 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Xin-Yu Shih, Hong-Ru Chou Flexible design and implementation of QC-Based LDPC decoder architecture for on-line user-defined matrix downloading and efficient decoding. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Trio Adiono, Khilda Afifah, Suksmandhira Harimurti, Prasetiyo, Amy Hamidah Salman Fully integrated transceiver module with a temperature compensation for high bit rate contactless smart card. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Hesong Xu, Nicola Massari, Leonardo Gasparini, Alessio Meneghetti, Alessandro Tomasi A SPAD-based random number generator pixel based on the arrival time of photons. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Jiangwei Zhang, Donald Kline Jr., Liang Fang, Rami G. Melhem, Alex K. Jones Yielding optimized dependability assurance through bit inversion. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Anushree Mahapatra, Benjamin Carrión Schäfer VeriIntel2C: Abstracting RTL to C to maximize High-Level Synthesis Design Space Exploration. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Rasoul Moradi, Ebrahim Farshidi, Mohammad Soroosh A low power passive-active ΔΣ modulator with high-resolution employing an integrator with open-loop unity-gain buffer. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Qingli Guo, Jing Ye, Bing Li, Yu Hu, Xiaowei Li 0001, Yazhu Lan, Guohe Zhang PUFPass: A password management mechanism based on software/hardware codesign. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Azad Mahmoudi, Pooya Torkzadeh, Massoud Dousti A study of analog decision feedback equalization for ADC-Based serial link receivers. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Heechun Park, Taewhan Kim Hybrid asynchronous circuit generation amenable to conventional EDA flow. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Jiaji He, Xiaolong Guo, Travis Meade, Raj Gautam Dutta, Yiqiang Zhao, Yier Jin SoC interconnection protection through formal verification. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1A. Tengfei Wang, B. Wei Guo, C. Jizeng Wei Highly-parallel hardware implementation of optimal ate pairing over Barreto-Naehrig curves. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Abderrazak Arabi, Nacerdine Bourouba, Abdesslam Belaout, Mouloud Ayad An accurate classifier based on adaptive neuro-fuzzy and features selection techniques for fault classification in analog circuits. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Muhammed Ceylan Morgül, Mustafa Altun Optimal and heuristic algorithms to synthesize lattices of four-terminal switches. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Soraya Aghnout, Gholamreza Karimi Modeling triplet spike timing dependent plasticity using a hybrid TFT-memristor neuromorphic synapse. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Remigiusz Wisniewski, Grzegorz Bazydlo, Pawel Szczesniak SVM algorithm oriented for implementation in a low-cost Xilinx FPGA. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Raffaele De Rose, Paul Romero, Marco Lanuzza Double-precision Dual Mode Logic carry-save multiplier. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Dev Narayan Yadav, Phrangboklang Lyngton Thangkhiew, Kamalika Datta Look-ahead mapping of Boolean functions in memristive crossbar array. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Sri Harsha Gade, Shobha Sundar Ram, Sujay Deb Millimeter wave wireless interconnects in deep submicron chips: Challenges and opportunities. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Eric Schneider, Hans-Joachim Wunderlich Multi-level timing and fault simulation on GPUs. Search on Bibsonomy Integration The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Yanbin Li, Ming Tang, Yuguang Li, Huanguo Zhang Several weaknesses of the implementation for the theoretically secure masking schemes under ISW framework. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Xin-Yu Shih, Po-Chun Huang, Hong-Ru Chou VLSI design and implementation of a reconfigurable hardware-friendly Polar encoder architecture for emerging high-speed 5G system. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Dominik Macko, Katarina Jelemenska, Pavel Cicak Simplifying low-power SoC top-down design using the system-level abstraction and the increased automation. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Govinda Sannena, Bishnu Prasad Das Metastability immune and area efficient error masking flip-flop for timing error resilient designs. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yiming Ouyang, Jianfeng Yang, Kun Xing, Zhengfeng Huang, Huaguo Liang An improved communication scheme for non-HOL-blocking wireless NoC. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Niccolo Lacaita, Matteo Bassi, Andrea Mazzanti, Francesco Svelto A K-band low-noise bipolar class-C VCO for 5G backhaul systems in 55 nm BiCMOS technology. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Even Låte, Trond Ytterdal, Snorre Aunet A loadless 6T SRAM cell for sub- & near- threshold operation implemented in 28 nm FD-SOI CMOS technology. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Axel Hald, Pekka Herzogenrath, Jürgen Scheible, Jens Lienig, Johannes Seelhorst, Peter Brandl Full custom MEMS design: A new method for the analysis of motion-dependent parasitics. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Mohammad Radpour, Sayed Masoud Sayedi SystemC-AMS modeling of photodiode based on PWL technique to be used in energy harvesting CMOS image sensor. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Valerio Tenace, Andrea Calimera Quasi-exact logic functions through classification trees. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Fábio Passos, Ricardo Martins 0003, Nuno Lourenço 0003, Elisenda Roca, Ricardo Povoa, António Canelas, R. Castro-López, Nuno Horta, Francisco V. Fernández Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Qiang Han, Qiang Xu 0001, Wen-Ben Jone SERA: statistical error rate analysis for profit-oriented performance binning of resilient circuits. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Xingquan Li, Jianli Chen, Wenxing Zhu Discrete relaxation method for contact layer decomposition of DSA with triple patterning. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Cuauhtémoc R. Aguilera-Galicia, Omar Longoria-Gandara, Luis Pizano-Escalante, Javier Vázquez Castillo, Manuel Salim Maza On-chip implementation of a low-latency bit-accurate reciprocal square root unit. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Mohamed Abbas, Ashraf Ramadan Low-cost methodology for fault diagnosis and localization in pipelined ADCs. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Ioannis A. Papistas, Vasilis F. Pavlidis Contactless Heterogeneous 3-D ICs for Smart Sensing Systems. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Hitesh Pahuja, Mintu Tyagi, Sudhakar Panday, Balwinder Singh A novel single-ended 9T FinFET sub-threshold SRAM cell with high operating margins and low write power for low voltage operations. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Mohammad Abdel-Majeed, Waleed Dweik Low overhead online periodic testing for GPGPUs. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Sachin Maheshwari, Vivian A. Bartlett, Izzet Kale Energy efficient implementation of multi-phase quasi-adiabatic Cyclic Redundancy Check in near field communication. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Tuotian Liao, Lihong Zhang Efficient parasitic-aware hybrid sizing methodology for analog and RF integrated circuits. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Rupam Bhattacharya, Pranab Roy, Hafizur Rahaman Homogeneous droplet routing in DMFB: An enhanced technique for high performance bioassay implementation. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Farzaneh Nakhaee, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram, Sied Mehdi Fakhraie, Hamed Dorosti Lifetime improvement by exploiting aggressive voltage scaling during runtime of error-resilient applications. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Habib Rastegar, Saeid Zare, Jee-Youl Ryu A low-voltage low-power capacitive-feedback voltage controlled oscillator. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1M. Mohamed Asan Basiri, Sandeep K. Shukla Low power hardware implementations for network packet processing elements. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Tze Sin Tan, Bakhtiar Affendi Rosdi Hardware-assisted Verilog simulation system using an application specific microprocessor. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Mitesh Limachia, Rajesh Thakker, Nikhil Kothari A near-threshold 10T differential SRAM cell with high read and write margins for tri-gated FinFET technology. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Taeyoung Kim 0001, Sheldon X.-D. Tan, Chase Cook, Zeyu Sun Detection of counterfeited ICs via on-chip sensor and post-fabrication authentication policy. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Muharrem Orkun Saglamdemir, Günhan Dündar, Alper Sen 0001 Analog behavioral equivalence boundary computation under the effect of process variations. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Siavash Mowlavi, Aram Baharmast, Jafar Sobhi, Ziaddin Daei Koozehkanani A novel current-mode low-power adjustable wide input range four-quadrant analog multiplier. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Mohamed Khairy Bahry, Mohamed El-Nozahi, Emad Hegazi An all-digital low ripples capacitive DC-DC converter with load tracking controller. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Arindrajit Ghosh, Uddalak Bhattacharya, Swapna Banerjee Contention free delayed keeper for high density large signal sensing memory compiler. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Federica Resta, Simone Gerardin, S. Mattiazzo, Alessandro Paccagnella, Marcello De Matteis, Christian C. Enz, Andrea Baschirotto 1GigaRad TID impact on 28 nm HEP analog circuits. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Sefa Özbek, Golzar Alavi, Johannes Digel, Markus Grözing, Joachim N. Burghartz, Manfred Berroth 3-Path SiGe BiCMOS power amplifier on thinned substrate for IoT applications. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jun-Da Chen, Wen-Jun Wang A 1.5 ∼ 5 GHz CMOS broadband low-power high-efficiency power amplifier for wireless communications. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1A. R. Ghorbani, M. B. Ghaznavi-Ghoushchi A low-area, 43.5% PAE, 0.9 W, Class-E differential power amplifier in 2.4 GHz for IoT applications. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Sana Arshad, Rashad Ramzan, Qamar-ul-Wahab 50-830 MHz noise and distortion canceling CMOS low noise amplifier. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Faiq Khalid, Syed Rafay Hasan, Osman Hasan, Falah R. Awwad Runtime hardware Trojan monitors through modeling burst mode communication using formal verification. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Ailin Zhang, Guoyong Shi A fast symbolic SNR computation method and its Verilog-A implementation for Sigma-Delta modulator design optimization. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Georg Gläser, Martin Grabmann, Gerrit Kropp, Andreas Furtig There is a limit to everything: Automating AMS operating condition check generation on system-level. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Sarang Kazeminia, Khayrollah Hadidi A foreground-liked continuous-time offset cancellation strategy for open-loop inter-stage amplifiers in high-resolution ADCs. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Chang Liu 0019, Xu He, Bin Liang, Yang Guo Detailed placement for pulse quenching enhancement in anti-radiation combinational circuit design. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Philipp Tertel, Lars Hedrich Real-time emulation of block-based analog circuits on an FPGA. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Nunzio Greco, Alessandro Parisi, Nunzio Spina, Egidio Ragonese, Giuseppe Palmisano Scalable lumped models of integrated transformers for galvanically isolated power transfer systems. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Sangmin Kim, Youngsoo Shin Module grouping to reduce the area of test wrappers in SoCs. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1M. Kiruba, V. Sumathy Register Pre-Allocation based Folded Discrete Tchebichef Transformation Technique for Image Compression. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Austin Lancaster, Manish Keswani Integrated circuit packaging review with an emphasis on 3D packaging. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Saiyd Ahyoune, Javier J. Sieiro, Tomás Carrasco Carrillo, Neus Vidal, José María López-Villegas, Elisenda Roca, Francisco V. Fernández Quasi-static PEEC planar solver using a weighted combination of 2D and 3D analytical Green's functions and a predictive meshing generator. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Lennart Bamberg, Amir Najafi, Alberto García Ortiz Edge effects on the TSV array capacitances and their performance influence. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Anushree Mahapatra, Yidi Liu, Benjamin Carrión Schäfer Accelerating cycle-accurate system-level simulations through behavioral templates. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Roberto Sanchez Correa, Jean-Pierre David Ultra-low latency communication channels for FPGA-based HPC cluster. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1J. Ahmadi-Farsani, H. Sadjedi, M. B. Ghaznavi-Ghoushchi An ultra low-power current-mode clock and data recovery design with input bit-rate adaptability for biomedical applications in CMOS 90 nm. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Adam Opara, Marcin Kubica, Dariusz Kania Strategy of logic synthesis using MTBDD dedicated to FPGA. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Dimitrios Balobas, Nikos Konofaos High-performance and energy-efficient 64-bit incrementer/decrementer using Multiple-Output Monotonic CMOS. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Etienne Lepercq, Yves Blaquière, Yvon Savaria A pattern-based routing algorithm for a novel electronic system prototyping platform. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Ismail Bayram, Yiran Chen NV-TCAM: Alternative designs with NVM devices. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Mohammad Asyaei A new low-power dynamic circuit for wide fan-in gates. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Kan Xu, Ravi Patel, Praveen Raghavan, Eby G. Friedman Exploratory design of on-chip power delivery for 14, 10, and 7 nm and beyond FinFET ICs. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1S. Panarello, C. Triolo, F. Garesci, S. Patanè, R. Denaro Improving ICs reliability with high speed thermal mapping. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Navonil Chatterjee, Priyajit Mukherjee, Santanu Chattopadhyay Reliability-aware application mapping onto mesh based Network-on-Chip. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yi Xiang, Sudeep Pasricha Mixed-criticality scheduling on heterogeneous multicore systems powered by energy harvesting. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Murat Pak, Francisco V. Fernández, Günhan Dündar A novel design methodology for the mixed-domain optimization of a MEMS accelerometer. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Zeinab Hijazi, Marco Grassi, Daniele D. Caviglia, Maurizio Valle Time-based calibration-less read-out circuit for interfacing wide range MOX gas sensors. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Ahmad Karimi, Abdalhossein Rezai, Mohammad Mahdi Hajhashemkhani A novel design for ultra-low power pulse-triggered D-Flip-Flop with optimized leakage power. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Priyajit Mukherjee, Sandeep D'Souza, Santanu Chattopadhyay Area Constrained Performance Optimized ASNoC Synthesis with Thermal‐aware White Space Allocation and Redistribution. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Umberto Garlando, Fabrizio Riente, Giovanna Turvani, A. Ferrara, Giulia Santoro, Marco Vacca, M. Graziano Architectural exploration of perpendicular Nano Magnetic Logic based circuits. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Xiaolong Lv, Xiao Zhao, Yongqing Wang, Dawei Jia Super class AB-AB bulk-driven folded cascode OTA. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Francesca Stradolini, Abuduwaili Tuoheti, Tugba Kilic, Danilo Demarchi, Sandro Carrara Raspberry-Pi based system for propofol monitoring. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yongsuk Choi, Gyunam Jeon, Yong-Bin Kim Transceiver design for LVSTL signal interface with a low power on-chip self calibration scheme. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jen-Cheng Ying, Wang-Dauh Tseng, Wen-Jiin Tsai Asymmetry dual-LFSR reseeding for low power BIST. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yun Fang, Xiaopeng Yu, Zheng Shi, Kiat Seng Yeo A 2.4 mW 2.5 GHz multi-phase clock generator with duty cycle imbalance correction in 0.13 µm CMOS. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Armineh Arasteh, Mohammad Hossein Moaiyeri, MohammadReza Taheri, Keivan Navi, Nader Bagherzadeh An energy and area efficient 4: 2 compressor based on FinFETs. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Fabrizio Riente, Andrea Giordano, Marco Vacca, Mariagrazia Graziano Exploring N3ASIC technology for microwave imaging architectures. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Desheng Zheng, Xiaoyu Li, Guowu Yang, Hai Wang, Lulu Tian An assertion graph based abstraction algorithm in GSTE and Its application. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yoritaka Ishiguchi, Daishi Isogai, Takuma Osawa, Shigetoshi Nakatake Analog perceptron circuit with DAC-based multiplier. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yufei Ma, Naveen Suda, Yu Cao 0001, Sarma B. K. Vrudhula, Jae-sun Seo ALAMO: FPGA acceleration of deep learning algorithms with a modularized RTL compiler. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Nadia Nedjah, Heloisa Dina Bezerra, Luiza de Macedo Mourelle Automatic generation of harmonious music using cellular automata based hardware design. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Mitesh Limachia, Dixit Vyas, Rajesh Thakker, Nikhil Kothari Hybrid offset compensated latch-type sense amplifier for tri-gated FinFET technology. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Stefan Kristofik, Peter Malík Enhancement of fault collection for embedded RAM redundancy analysis considering intersection and orphan faults. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Vlastimil Kote, Adam Kubacak, Patrik Vacula, Jiri Jakovenko, Miroslav Husak Automated pre-placement phase as a part of robust analog-mixed signal physical design flow. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Giulia Di Capua, Nuno Horta, Francisco V. Fernández, Günhan Dündar, Salvatore Pennisi, Gaetano Palumbo, Massimo Alioto, Gianluca Giustolisi Guest Editorial Special Issue on Selected Papers from PRIME 2017 and SMACD 2017. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Paria Jamshidi, Mohammad Maymandi-Nejad Analysis of the impact of interferers on VCO-based continuous time delta-sigma modulators. Search on Bibsonomy Integration The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
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