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Publications of "Lukás Nagy" ( http://dblp.L3S.de/Authors/Lukás_Nagy )

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Publication years (Num. hits)
2010-2018 (18) 2019 (4)
Publication types (Num. hits)
article(4) inproceedings(18)
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Found 23 publication records. Showing 22 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Viera Stopjaková Ultra Low-Voltage Rail-to-Rail Comparator Design in 130 nm CMOS Technology. Search on Bibsonomy DDECS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Lukas Kohutka, Lukás Nagy, Viera Stopjaková Low Latency Hardware-Accelerated Dynamic Memory Manager for Hard Real-Time and Mixed-Criticality Systems. Search on Bibsonomy DDECS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Martin Kovác, Daniel Arbet, Viera Stopjaková, Michal Sovcik, Lukás Nagy Investigation of Low-Voltage, Sub-threshold Charge Pump with Parasitics Aware Design Methodology. Search on Bibsonomy DDECS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Ales Chvála, Lukás Nagy, Juraj Marek, Juraj Priesol, Daniel Donoval, Alexander Satka Neural Network for Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Gates. Search on Bibsonomy DTIS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Lukás Kohutka, Lukás Nagy, Viera Stopjaková A Novel Hardware-Accelerated Priority Queue for Real-Time Systems. Search on Bibsonomy DSD The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Viera Stopjaková Design and Performance Analysis of Ultra-Low Voltage Rail-to-Rail Comparator in 130 nm CMOS Technology. Search on Bibsonomy DDECS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Michal Sovcik Two-Stage Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. Search on Bibsonomy DDECS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Ales Chvála, Lukás Nagy, Juraj Marek, Juraj Priesol, Daniel Donoval, Alexander Satka, Michal Blaho, Dagmar Gregusová, Jan Kuzmik Device and circuit models of InAlN/GaN D- and dual-gate E-mode HEMTs for design and characterisation of monolithic NAND logic cell. Search on Bibsonomy DTIS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Daniel Arbet, Viera Stopjaková, Martin Kovác, Lukás Nagy, Matej Rakus, Michal Sovcik 130 nm CMOS Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. Search on Bibsonomy Journal of Circuits, Systems, and Computers The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Juraj Brenkus, Viera Stopjaková, Viera Cernanová, Daniel Arbet, Lukás Nagy, Vladimír Sedlák A Novel Method Towards Time-Efficient Fault Analysis of Analog and Mixed-Signal Circuits. Search on Bibsonomy Journal of Circuits, Systems, and Computers The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Michal Sovcik Variable-gain amplifier for ultra-low voltage applications in 130nm CMOS technology. Search on Bibsonomy MIPRO The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Juraj Brenkus, Viera Stopjaková, Lukás Nagy, Daniel Arbet Impedance calculation based method for AC fault analysis of mixed-signal circuits. Search on Bibsonomy DDECS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Juraj Brenkus Low-voltage bulk-driven variable gain amplifier in 130 nm CMOS technology. Search on Bibsonomy DDECS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Lukás Nagy, Viera Stopjaková, Alexander Satka Design of In AlN/GaN Heterostructure-Based Logic Cells. Search on Bibsonomy DDECS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Daniel Arbet, Gabriel Nagy, Martin Kovác, Viera Stopjaková, Lukás Nagy Readout interface for capacitive MEMS microphone in CMOS technology. Search on Bibsonomy MIXDES The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Lukás Nagy, Viera Stopjaková, Juraj Brenkus Current Sensing Completion Detection in Single-Rail Asynchronous Systems. Search on Bibsonomy Computing and Informatics The full citation details ... 2014 DBLP  BibTeX  RDF
1Ales Chvála, Daniel Donoval, Lukás Nagy, Juraj Marek, Patrik Pribytny, Marian Molnar 3-D electrothermal device/circuit simulation of DC-DC converter module in multi-die IC. Search on Bibsonomy ESSDERC The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Roman Záluský, Daniela Durackova, Viera Stopjaková, Lukás Nagy, Vladimír Sedlák Novel architecture of a digital neuron for FFNN employing special multiplication. Search on Bibsonomy ECAI The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Lukás Nagy, Viera Stopjaková, Roman Záluský Completion detection in dual-rail asynchronous systems by current-sensing. Search on Bibsonomy Microelectronics Journal The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Lukás Nagy, Viera Stopjaková Current sensing completion detection in dual-rail asynchronous systems. Search on Bibsonomy DDECS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Lukás Nagy, Viera Stopjaková Current sensing methodology for completion detection in self-timed systems. Search on Bibsonomy DDECS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Lukás Nagy, Viera Stopjaková Current Sensing Completion Detection in deep sub-micron technologies. Search on Bibsonomy DDECS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
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