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Publications at "MTV"( http://dblp.L3S.de/Venues/MTV )

URL (DBLP): http://dblp.uni-trier.de/db/conf/mtv

Publication years (Num. hits)
2003 (18) 2004 (21) 2005 (25) 2006 (19) 2007 (18) 2008 (18) 2009 (19) 2010-2011 (27) 2012 (15) 2013 (22) 2014 (22) 2015-2016 (30) 2017 (15) 2018 (18)
Publication types (Num. hits)
inproceedings(271) proceedings(16)
Venues (Conferences, Journals, ...)
MTV(287)
GrowBag graphs for keyword ? (Num. hits/coverage)

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The graphs summarize 18 occurrences of 18 keywords

Results
Found 287 publication records. Showing 287 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Yanhua Cao, Osama Shoubber, Pallavi Jesrani Automatic Debug Quantification for Workload Balance and Progress Tracking. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Asif Jafri, Jung-Wook Kim Proving the Capability of Arm IP for Functional Safety Applications. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Mikhail M. Chupilko, Alexander Kamkin, Artem Kotsynyak, Alexander Protsenko, Sergey A. Smolov, Andrei Tatarnikov Test Program Generator MicroTESK for RISC-V. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Chetas Mapara, Priti Nagarajan Transaction Based Speedup for Simulation Replay. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Rekha Bangalore Bangalore, Adeosun luwatosin Oluwatosin, Kelvin K. Lam Schmoo Data Analysis Using Machine Language Algorithms. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jigar Savla Getting Started on Co-Emulation: Transition your Design and Testbench to an Emulator. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Siroos Madani, Mohammad R. Madani, Magdy Bayoumi A Perceptron-Inspired Technique for Hardware Obfuscation. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Abdelfattah Munir, Mina Magdy, Samer Ahmed, Sherouk Nasr, Sameh El-Ashry, Ahmed Shalaby Fast Reliable Verification Methodology for RISC-V Without a Reference Model. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Manish Kumar Agarwal, Amandeep Sharan, Mohammad Asif Khan, Atul Gupta Multi-Master Validation Framework for Next Generation Automotive SOCs. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1 19th International Workshop on Microprocessor and SOC Test and Verification, MTV 2018, Austin, TX, USA, December 9-10, 2018 Search on Bibsonomy MTV The full citation details ... 2018 DBLP  BibTeX  RDF
1Rekha Bangalore, Raji M. Bandanapudi Application of Combinatorial Test (CT) Algorithm for Protocol and Hardware Feature Validation. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Ayushi Agarwal, Pankaj Gupta, Atul Gupta Advanced Regression Management for Post-Silicon Validation of Automotive SOCs. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Shelly Henry, Nirabh Regmi How to Close Coverage 10x Faster using Portable Stimulus Standard - A Case Study. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Pratheema Mohandoss, Archana Rengaraj Pre-Silicon DFT Verification on SOC Slim Model. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Calvin Deutschbein, Cynthia Sturton Mining Security Critical Linear Temporal Logic Specifications for Processors. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Sameh El-Ashry, Ahmed Adel Efficient Methodology of Sampling UVM RAL During Simulation for SoC Functional Coverage. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Harry Foster 2018 FPGA Functional Verification Trends. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Amr Moursi, Romaisaa Samhoud, Yaseen Kamal, Mazen Magdy, Sameh El-Ashry, Ahmed Shalaby Different Reference Models for UVM Environment to Speed Up the Verification Time. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Wei Hu, Armaiti Ardeshiricham, Ryan Kastner Identifying and Measuring Security Critical Path for Uncovering Circuit Vulnerabilities. Search on Bibsonomy MTV The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Ahmed Wahba, Justin Hohnerlein, Farhan Rahman, Li-C. Wang Dynamic Exerciser Template Weighting in x86 Processor Verification. Search on Bibsonomy MTV The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Martin Fajcik, Pavel Smrz, Marcela Zachariásová Automation of Processor Verification Using Recurrent Neural Networks. Search on Bibsonomy MTV The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Mark Nelson, Peter-Michael Seidel Modeling and Analysis of Secure Processor Extensions Based on Actor Networks. Search on Bibsonomy MTV The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Khaled Salah A Unified UVM Architecture for Flash-Based Memory. Search on Bibsonomy MTV The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1 18th International Workshop on Microprocessor and SOC Test and Verification, MTV 2017, Austin, TX, USA, December 11-12, 2017 Search on Bibsonomy MTV The full citation details ... 2017 DBLP  BibTeX  RDF
1Jack Lawrence Mason Validation of Context Preserving Thread-Level Speculative Execution Using N-Queens: Comparison of Non-CPSE and CPSE-enabled Applications. Search on Bibsonomy MTV The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Anand Raman, Yorgos Koutsoyannopoulos, Magdy Abadir Electromagnetic (EM) Crosstalk Failures and Symptoms in SoC Designs. Search on Bibsonomy MTV The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Mikhail M. Chupilko, Alexander Kamkin, Artem Kotsynyak, Alexander Protsenko, Sergey A. Smolov, Andrei Tatarnikov Maintaining ISA Specifications in MicroTESK Test Program Generator. Search on Bibsonomy MTV The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Madhukarreddy Pappireddy, Bipin Ravi SequenceLanguage: A Constraint Random MP-RIS Generation Framework. Search on Bibsonomy MTV The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Ahmed Abdel-Haleem, Magdy A. El-Moursy TLM Virtual Platform for Fast and Accurate Power Estimation. Search on Bibsonomy MTV The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Liting Yu, Xiaoxiao Wang, Fahim Rahman, Mark Tehranipoor iPUF: Interconnect PUF with Self-Masking Circuit for Performance Enhancement. Search on Bibsonomy MTV The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Kaushik Gopalakrishnan, Bipin Ravi Anvil: Best in Class Multiprocessor Coherency Verification Tool. Search on Bibsonomy MTV The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Fahim Rahman, Mohammad Farmani, Mark Tehranipoor, Yier Jin Hardware-Assisted Cybersecurity for IoT Devices. Search on Bibsonomy MTV The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Siroos Madani, Magdy Bayoumi A Security-Aware Pre-partitioning Technique for 3D Integrated Circuits. Search on Bibsonomy MTV The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Omar Amin, Youssef Ramzy, Omar Ibrahem, Ahmed Fouad, Khaled Mohamed, Mohamed Abdelsalam System Verilog Assertions Synthesis Based Compiler. Search on Bibsonomy MTV The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Senwen Kan, Matthew Lam, Tyler Porter, Jennifer Dworak A Case Study: Pre-Silicon SoC RAS Validation for NoC Server Processor. Search on Bibsonomy MTV The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Xiaolong Guo, Raj Gautam Dutta, Prabhat Mishra, Yier Jin Automatic RTL-to-Formal Code Converter for IP Security Formal Verification. Search on Bibsonomy MTV The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Ahmed El-Yamany, Sameh El-Ashry, Khaled Salah Coverage Closure Efficient UVM Based Generic Verification Architecture for Flash Memory Controllers. Search on Bibsonomy MTV The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Sainath Karlapalem, Shashank Venugopal Scalable, Constrained Random Software Driven Verification. Search on Bibsonomy MTV The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Yang Xie, Chongxi Bao, Yuntao Liu 0001, Ankur Srivastava 2.5D/3D Integration Technologies for Circuit Obfuscation. Search on Bibsonomy MTV The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Vibarajan Viswanathan, Juliet Runhaar, Doug Reed, Jun Zhao Tough Bugs vs. Smart Tools - L2/L3 Cache Verification Using System Verilog, UVM and Verdi Transaction Debugging. Search on Bibsonomy MTV The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Khaled Fathy, Khaled Salah An Efficient Scenario Based Testing Methodology Using UVM. Search on Bibsonomy MTV The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Haytham Saafan, M. Watheq El-Kharashi, Ashraf Salem Formal Based Methodology for Inferring Memory Mapped Registers. Search on Bibsonomy MTV The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Amr B. Darwish, Magdy A. El-Moursy, Mohamed Dessouky Transaction Level Power Modeling (TLPM) Methodology. Search on Bibsonomy MTV The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Liwei Zhou, Yiorgos Makris Hardware-Based Workload Forensics and Malware Detection in Microprocessors. Search on Bibsonomy MTV The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Wei Hu 0008, Alric Althoff, Armita Ardeshiricham, Ryan Kastner Towards Property Driven Hardware Security. Search on Bibsonomy MTV The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Saddam Jamil Quirem, Prasad Krishna Saravu Fake CPU: A Flexible and Simulation Cost-Effective UVC for Testing Shared Caches. Search on Bibsonomy MTV The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016 Search on Bibsonomy MTV The full citation details ... 2016 DBLP  BibTeX  RDF
1Prasad Krishna Saravu Multi-processor Memory Scoreboard: A Multi-processor Memory Ordering and Data Consistency Checker. Search on Bibsonomy MTV The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Ahmed El-Yamany Echoing the "Generality Concept" through the Bus Functional Model Architecture in Universal Verification Environments. Search on Bibsonomy MTV The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Amandeep Sharan, Ashish Gupta Hybrid Post Silicon Validation Methodology for Layerscape SoCs involving Secure Boot: Boot (Secure & Non-secure) and Kernel Integration with Randomized Test. Search on Bibsonomy MTV The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Mikhail M. Chupilko, Alexander S. Kamkin, Artem Kotsynyak, Alexander Protsenko, Sergey A. Smolov, Andrei Tatarnikov Specification-Based Test Program Generation for ARM VMSAv8-64 Memory Management Units. Search on Bibsonomy MTV The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Xiaolong Guo, Raj Gautam Dutta, Yier Jin Hierarchy-Preserving Formal Verification Methods for Pre-silicon Security Assurance. Search on Bibsonomy MTV The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Mark Nelson, Peter-Michael Seidel Modeling and Analysis of Trusted Boot Processes Based on Actor Network Procedures. Search on Bibsonomy MTV The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Harshit Goyal, Vishwani D. Agrawal Characterizing Processors for Energy and Performance Management. Search on Bibsonomy MTV The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Sourav Roy, Nikhil Jain, Sandeep Jain, Robert Page Leveraging Virtual Prototype Models for Hardware Verification of an Accelerated Network Packet Processing Engine. Search on Bibsonomy MTV The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Bicky Shakya, Fahim Rahman, Mark Tehranipoor, Domenic Forte Harnessing Nanoscale Device Properties for Hardware Security. Search on Bibsonomy MTV The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Jeremy Ridgeway Performance of a SystemVerilog Sudoku Solver with VCS. Search on Bibsonomy MTV The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Taylor Holmes, Andrew Passerelli, John Connor SoC Development and Prototype with VDK. Search on Bibsonomy MTV The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1John Hudson, Gunaranjan Kurucheti Enhancing the Stress and Efficiency of RIS Tools Using Coverage Metrics. Search on Bibsonomy MTV The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1 16th International Workshop on Microprocessor and SOC Test and Verification, MTV 2015, Austin, TX, USA, December 3-4, 2015 Search on Bibsonomy MTV The full citation details ... 2015 DBLP  BibTeX  RDF
1Daniel Hansson Automatic Bug Fixing. Search on Bibsonomy MTV The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Mohamed A. Salem, Kerstin I. Eder Novel MC/DC Coverage Test Sets Generation Algorithm, and MC/DC Design Fault Detection Strength Insights. Search on Bibsonomy MTV The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Rico Angell, Ben Oztalay, Andrew DeOrio A Topological Approach to Hardware Bug Triage. Search on Bibsonomy MTV The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Zdenek Prikryl Fast Simulation of Pipeline in ASIP Simulators. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Deepak Venkatesan, Pradeep Nagarajan A Case Study of Multiprocessor Bugs Found Using RIS Generators and Memory Usage Techniques. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Michele Lora, Francesco Martinelli, Franco Fummi Hardware Synthesis from Software-Oriented UML Descriptions. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Michael Mefenza, Franck Yonga, Christophe Bobda Automatic UVM Environment Generation for Assertion-Based and Functional Verification of SystemC Designs. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Mohamed O. Kayed, Mohamed Abdelsalam, Rafik Guindi A Novel Approach for SVA Generation of DDR Memory Protocols Based on TDML. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Weihua Han Improve the Verification Productivity: Some Best Practices from SoC and Processor Projects. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1John Hudson, Gunaranjan Kurucheti A Configurable Random Instruction Sequence (RIS) Tool for Memory Coherence in Multi-processor Systems. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Daniel Hansson Continuous Linting with Automatic Debug. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Parikshit Pritam Dhodapkar Synthesizable Memory Models for Virtual Prototyping. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Ganesh Venkatakrishnan, Naresh Kumar Kadali 'Dump What You Need' - A Coverage Methodology to Accelerate SoC Verification. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Somnath Banerjee, Tushar Gupta Optimized Simulation Acceleration with Partial Testbench Evaluation. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Moaz Mostafa, Mona Safar, M. Watheq El-Kharashi, Mohamed Dessouky System Verilog Assertion Debugging Based on Visualization, Simulation Results, and Mutation. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Nitin Gupta, Chethan Harakchand Embracing the FPGA Challenge for Processor Design Verification. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Peter-Michael Seidel Directed Test Case Generation for x86 Instruction Decoding. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1 15th International Microprocessor Test and Verification Workshop, MTV 2014, Austin, TX, USA, December 15-16, 2014 Search on Bibsonomy MTV The full citation details ... 2014 DBLP  BibTeX  RDF
1Jan Malburg, Emmanuelle Encrenaz-Tiphène, Görschwin Fey Mutation Based Feature Localization. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Lukás Charvát, Ales Smrcka, Tomás Vojnar Using Formal Verification of Parameterized Systems in RAW Hazard Analysis in Microprocessors. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Shajid Thiruvathodi, Deepak Yeggina A Random Instruction Sequence Generator for ARM Based Systems. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Andrea Höller, Gerhard Schonfelder, Nermin Kajtazovic, Tobias Rauter, Christian Kreiner FIES: A Fault Injection Framework for the Evaluation of Self-Tests for COTS-Based Safety-Critical Systems. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Maneesh Kumar Pandey, Shwetank Shekhar, Amit Sinha, Arun Mishra An FPGA Based Ecosystem for USBPHY Validation. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Peter-Michael Seidel A Case for Multi-level Combination of Theorem Proving and Model Checking Tools. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Mrugesh Walimbe JTAG-AXI Debug IP with Performance Meter Mode. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Maneesh Kumar Pandey, Shwetank Shekhar, Nitin Saxena 0003, Gaurav Kumar Agarwal, Amersh Kumar An Approach for In-House USB2.0 Electrical Compliance Testing on Nanoscale SoC. Search on Bibsonomy MTV The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Emad Samuel Malki Ebeid, Franco Fummi, Davide Quaglia Communication Alternatives Exploration in Model-Driven Design of Networked Embedded Systems. Search on Bibsonomy MTV The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Christian Miller, Christoph Scholl, Bernd Becker 0001 Proving QBF-hardness in Bounded Model Checking for Incomplete Designs. Search on Bibsonomy MTV The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Emad Samuel Malki Ebeid, Franco Fummi, Davide Quaglia, Francesco Stefanni Automatic Network Protocol Synthesis from UML Sequence Diagrams. Search on Bibsonomy MTV The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Narendra Kamat IP Testing for Heterogeneous SOCs. Search on Bibsonomy MTV The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Mohamed A. Salem, Kerstin I. Eder Modified Condition Decision Coverage: A Hardware Verification Perspective. Search on Bibsonomy MTV The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Kanad Basu, Prabhat Mishra, Priyadarsan Patra, Amir Nahir, Allon Adir Dynamic Selection of Trace Signals for Post-Silicon Debug. Search on Bibsonomy MTV The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Paolo Bernardi, Riccardo Cantoro, Lyl M. Ciganda Brasca, Boyang Du, Ernesto Sánchez 0001, Matteo Sonza Reorda, Michelangelo Grosso, Oscar Ballan On the Functional Test of the Register Forwarding and Pipeline Interlocking Unit in Pipelined Processors. Search on Bibsonomy MTV The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Maneesh Kumar Pandey, Atul Gupta, Shwetank Shekhar USB Validation Challenges on C45SOI & C28NM Technology Products. Search on Bibsonomy MTV The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Jack L. Mason, Gregory E. Simco Target Environment Simulation and its Impact on Architecture Validation: A Case Study of Thread-Level Speculative Execution. Search on Bibsonomy MTV The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Vinayak Kamath, Farhan Rahman, Li-C. Wang Analyzing Efficacy of Constrained Test Program Generators - A Case Study. Search on Bibsonomy MTV The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Matthew L. King Practical Security Validation. Search on Bibsonomy MTV The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Brian Kahne, Jim Holt Functional Validation of a New Network Switch Architecture Using Rapid Prototyping Techniques. Search on Bibsonomy MTV The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Daniel Hansson, Heli Uronen-Hansson Measuring the Gain of Automatic Debug. Search on Bibsonomy MTV The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Rama Venkatasubramanian, Oluleye Olorode, Abhishek Arun State Retention Validation of C66X DSP Core. Search on Bibsonomy MTV The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
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