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Publications of "Malgorzata Chrzanowska-Jeske" ( http://dblp.L3S.de/Authors/Malgorzata_Chrzanowska-Jeske )

  Author page on DBLP  Author page in RDF  Community of Malgorzata Chrzanowska-Jeske in ASPL-2

Publication years (Num. hits)
1990-2002 (17) 2003-2006 (18) 2007-2013 (15) 2014-2019 (10)
Publication types (Num. hits)
article(12) inproceedings(48)
Venues (Conferences, Journals, ...)
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The graphs summarize 14 occurrences of 14 keywords

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Found 61 publication records. Showing 60 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Muhammad Ali, Mohammad A. Ahmed, Malgorzata Chrzanowska-Jeske Logical Effort Framework for CNFET-Based VLSI Circuits for Delay and Area Optimization. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Satya K. Vendra, Malgorzata Chrzanowska-Jeske Buffered-Interconnect Performance and Power Dissipation in 3D ICs with Temperature Profile. Search on Bibsonomy ISCAS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Mohammad A. Ahmed, Sucheta Mohapatra, Malgorzata Chrzanowska-Jeske Buffered Interconnects in 3D IC Layout Design. Search on Bibsonomy SLIP The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Mohammad A. Ahmed, Sucheta Mohapatra, Malgorzata Chrzanowska-Jeske Performance optimization and power efficiency in 3D IC with buffer insertion scheme. Search on Bibsonomy SoCC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Malgorzata Chrzanowska-Jeske, Jürgen Becker 0001 Tutorial 2A: 3D integration - challenges and advantages. Search on Bibsonomy SoCC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Mohammad A. Ahmed, S. Mohapatra, Malgorzata Chrzanowska-Jeske Dynamic nets-to-TSVs assignment in 3D floorplanning. Search on Bibsonomy ISCAS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Mohammad A. Ahmed, Malgorzata Chrzanowska-Jeske TSVs in early layout design exploration for 3D ICs. Search on Bibsonomy LASCAS The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Muhammad Ali, Mohammad A. Ahmed, Malgorzata Chrzanowska-Jeske Stochastic analysis of CNFET circuits using enhanced logical effort model in the presence of metallic tubes. Search on Bibsonomy ICECS The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Mohammad A. Ahmed, S. Mohapatra, Malgorzata Chrzanowska-Jeske 3D floorplanning with nets-to-TSVs assignment. Search on Bibsonomy ICECS The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Mohammad A. Ahmed, Malgorzata Chrzanowska-Jeske Delay and power optimization with TSV-aware 3D floorplanning. Search on Bibsonomy ISQED The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Mohammad A. Ahmed, Malgorzata Chrzanowska-Jeske TSV capacitance aware 3-D floorplanning. Search on Bibsonomy 3DIC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Branimir Pejcinovic, Melinda Holtzman, Malgorzata Chrzanowska-Jeske, Phillip K. Wong Just because we teach it does not mean they use it: Case of programming skills. Search on Bibsonomy FIE The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Mohammad A. Ahmed, Shantesh Pinge, Malgorzata Chrzanowska-Jeske Fast floorplanning for fixed-outline and nonrectangular regions. Search on Bibsonomy ICECS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Muhammad Ali, Mohammad A. Ahmed, Malgorzata Chrzanowska-Jeske TSV stress-aware performance and reliability analysis. Search on Bibsonomy ICECS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Malgorzata Chrzanowska-Jeske, Rehman Ashraf, Rajeev K. Nain, Siva G. Narendra Performance analysis of CNFET based circuits in the presence of fabrication imperfections. Search on Bibsonomy ISCAS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Rajeev K. Nain, Malgorzata Chrzanowska-Jeske Fast Placement-Aware 3-D Floorplanning Using Vertical Constraints on Sequence Pairs. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Rehman Ashraf, Rajeev K. Nain, Malgorzata Chrzanowska-Jeske, Siva G. Narendra Yield enhancement by tube redundancy in CNFET-based circuits. Search on Bibsonomy ICECS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Rehman Ashraf, Rajeev K. Nain, Malgorzata Chrzanowska-Jeske, Siva G. Narendra Design methodology for Carbon Nanotube based circuits in the presence of metallic tubes. Search on Bibsonomy NANOARCH The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Rajeev K. Nain, Shantesh Pinge, Malgorzata Chrzanowska-Jeske Yield improvement of 3D ICs in the presence of defects in through signal vias. Search on Bibsonomy ISQED The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Rajeev K. Nain, Malgorzata Chrzanowska-Jeske Placement-aware 3D Floorplanning. Search on Bibsonomy ISCAS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Rajeev K. Nain, Rajarshi Ray 0003, Malgorzata Chrzanowska-Jeske Rectangular 3D wirelength distribution models. Search on Bibsonomy ICECS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Grzegorz Blakiewicz, Malgorzata Chrzanowska-Jeske Optimization of active circuits for substrate noise suppression. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Rehman Ashraf, Malgorzata Chrzanowska-Jeske, Siva G. Narendra Carbon nanotube circuit design choices in the presence of metallic tubes. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Tao Wan, Malgorzata Chrzanowska-Jeske A novel net-degree distribution model and its application to floorplanning benchmark generation. Search on Bibsonomy Integration The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Grzegorz Blakiewicz, Malgorzata Chrzanowska-Jeske Supply current spectrum estimation of digital cores at early design. Search on Bibsonomy IET Circuits, Devices & Systems The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Jin S. Zhang, Malgorzata Chrzanowska-Jeske, Alan Mishchenko, Jerry R. Burch Linear cofactor relationships in Boolean functions. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Alan Mishchenko, Jin S. Zhang, Subarnarekha Sinha, Jerry R. Burch, Robert K. Brayton, Malgorzata Chrzanowska-Jeske Using simulation and satisfiability to compute flexibilities in Boolean networks. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Grzegorz Blakiewicz, Malgorzata Chrzanowska-Jeske Estimation of supply current spectrum for early noise evaluation. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Jin S. Zhang, Alan Mishchenko, Robert K. Brayton, Malgorzata Chrzanowska-Jeske Symmetry detection for large Boolean functions using circuit representation, simulation, and satisfiability. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF and-inverter graphs, classical symmetries, simulation, boolean functions, boolean satisfiability
1Jin S. Zhang, Malgorzata Chrzanowska-Jeske, Alan Mishchenko, Jerry R. Burch Detecting support-reducing bound sets using two-cofactor symmetries. Search on Bibsonomy ASP-DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Grzegorz Blakiewicz, Marcin Jeske, Malgorzata Chrzanowska-Jeske, Jin S. Zhang Substrate noise modeling in early floorplanning of MS-SOCs. Search on Bibsonomy ASP-DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Yu Xia, Malgorzata Chrzanowska-Jeske Considering layout for test scheduling of core-based SoCs. Search on Bibsonomy ICECS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Malgorzata Chrzanowska-Jeske, Alan Mishchenko Synthesis for regularity using decision diagrams [logic IC synthesis and layout]. Search on Bibsonomy ISCAS (5) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Grzegorz Blakiewicz, Malgorzata Chrzanowska-Jeske Modeling of substrate noise block properties for early prediction. Search on Bibsonomy ISCAS (3) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Tao Wan, Malgorzata Chrzanowska-Jeske Prediction of interconnect net-degree distribution based on Rent's rule. Search on Bibsonomy SLIP The full citation details ... 2004 DBLP  DOI  BibTeX  RDF net-degree distribution, Rent's rule, interconnect prediction
1Marcin Jeske, Grzegorz Blakiewicz, Malgorzata Chrzanowska-Jeske, Benyi Wang Substrate noise-aware floorplanning for mixed-signal SOCs. Search on Bibsonomy ISCAS (2) The full citation details ... 2004 DBLP  BibTeX  RDF
1Tao Wan, Malgorzata Chrzanowska-Jeske Generating random benchmark circuits for floorplanning. Search on Bibsonomy ISCAS (5) The full citation details ... 2004 DBLP  BibTeX  RDF
1Grzegorz Blakiewicz, Marcin Jeske, Malgorzata Chrzanowska-Jeske Substrate noise optimization in early floorplanning for mixed signal SOCs. Search on Bibsonomy SoCC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
1Xiaoyu Song, William N. N. Hung, Alan Mishchenko, Malgorzata Chrzanowska-Jeske, Andrew A. Kennings, Alan J. Coppola Board-level multiterminal net assignment for the partial cross-bar architecture. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Faran Rafiq, Malgorzata Chrzanowska-Jeske, Hannah Honghua Yang, Marcin Jeske, Naveed A. Sherwani Integrated floorplanning with buffer/channel insertion for bus-based designs. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Yu Xia, Malgorzata Chrzanowska-Jeske, Benyi Wang, Marcin Jeske Using a Distributed Rectangle Bin-Packing Approach for Core-based SoC Test Scheduling with Power Constraints. Search on Bibsonomy ICCAD The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Malgorzata Chrzanowska-Jeske, Benyi Wang, G. Greenwood Floorplanning with performance-based clustering. Search on Bibsonomy ISCAS (4) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Niwat Waropus, Rajendar Koltur, Malgorzata Chrzanowska-Jeske Graph-based approach to evaluate net routability of a floorplan. Search on Bibsonomy ISCAS (5) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Marek A. Perkowski, Bogdan J. Falkowski, Malgorzata Chrzanowska-Jeske, Rolf Drechsler Efficient Algorithms for Creation of Linearly-independent Decision Diagrams and their Mapping to Regular Layouts. Search on Bibsonomy VLSI Design The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
1Malgorzata Chrzanowska-Jeske, Alan Mishchenko, Marek A. Perkowski Generalized Inclusive Forms - New Canonical Reed-Muller Forms Including Minimum ESOPs. Search on Bibsonomy VLSI Design The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
1Faran Rafiq, Malgorzata Chrzanowska-Jeske, Hannah Honghua Yang, Naveed A. Sherwani Integrated floorplanning with buffer/channel insertion for bus-based microprocessor designs. Search on Bibsonomy ISPD The full citation details ... 2002 DBLP  DOI  BibTeX  RDF floorplanning, routability, interconnect estimation
1Xiaoyu Song, William N. N. Hung, Alan Mishchenko, Malgorzata Chrzanowska-Jeske, Alan J. Coppola, Andrew A. Kennings Board-level multiterminal net assignment. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
1Marek A. Perkowski, Malgorzata Chrzanowska-Jeske, Alan Mishchenko, Xiaoyu Song, Anas Al-Rabadi, Bart Massey, Pawel Kerntopf, Andrzej Buller, Lech Józwiak, Alan J. Coppola Regular Realization of Symmetric Functions Using Reversible Logic. Search on Bibsonomy DSD The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
1Wei Wang, Malgorzata Chrzanowska-Jeske A global approach to the variable ordering problem in PSBDDs. Search on Bibsonomy ISCAS (5) The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
1Malgorzata Chrzanowska-Jeske, Yang Xu, Marek A. Perkowski Logic Synthesis for a Regular Layout. Search on Bibsonomy VLSI Design The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
1Malgorzata Chrzanowska-Jeske Regular symmetric arrays for non-symmetric functions. Search on Bibsonomy ISCAS (1) The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
1Naveen Buddi, Malgorzata Chrzanowska-Jeske, Charles L. Saxe Layout synthesis for datapath designs. Search on Bibsonomy EURO-DAC The full citation details ... 1995 DBLP  DOI  BibTeX  RDF routing, placement, layout, channel, datapath, bit-slice
1Naveen Ramineni, Malgorzata Chrzanowska-Jeske, Naveen Buddi Tree restructuring approach to mapping problem in cellular-architecture FPGAs. Search on Bibsonomy EURO-DAC The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
1Marek A. Perkowski, Malgorzata Chrzanowska-Jeske, Edmund Pierzchala, Alan J. Coppola An Exact Solution to the Fitting Problem in the Application Specific State Machine Device. Search on Bibsonomy Journal of Circuits, Systems, and Computers The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Marek A. Perkowski, Malgorzata Chrzanowska-Jeske Multiple-Valued-Input TANT Networks. Search on Bibsonomy ISMVL The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Ning Song, Malgorzata Chrzanowska-Jeske Output Column Folding for Cellular-Architecture FPGAs. Search on Bibsonomy ISCAS The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Andisheh Sarabi, Ning Song, Malgorzata Chrzanowska-Jeske, Marek A. Perkowski A Comprehensive Approach to Logic Synthesis and Physical Design for Two-Dimensional Logic Arrays. Search on Bibsonomy DAC The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Malgorzata Chrzanowska-Jeske, Steffen Goller Partitioning approach to find an exact solution to the fitting problem in an application-specific EPLD device. Search on Bibsonomy EURO-DAC The full citation details ... 1993 DBLP  DOI  BibTeX  RDF
1Malgorzata Chrzanowska-Jeske, Steffen Goller, I. Schafer An Architecture-driven Approach for the Fitting Problem in an Application-specific EPLD. Search on Bibsonomy ISCAS The full citation details ... 1993 DBLP  BibTeX  RDF
1Marek A. Perkowski, Malgorzata Chrzanowska-Jeske, Tuhar Shah Minimization of multioutput TANT networks for unlimited fan-in network model. Search on Bibsonomy ICCD The full citation details ... 1990 DBLP  DOI  BibTeX  RDF
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