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Publications of "Marco Simicic" ( http://dblp.L3S.de/Authors/Marco_Simicic )

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Publication years (Num. hits)
2015 (3) 2018 (5) 2019 (2)
Publication types (Num. hits)
article(3) inproceedings(7)
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Found 11 publication records. Showing 10 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Marco Simicic, Pieter Weckx, Bertrand Parvais, Philippe Roussel, Ben Kaczer, Georges G. E. Gielen Understanding the Impact of Time-Dependent Random Variability on Analog ICs: From Single Transistor Measurements to Circuit Simulations. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Shih-Hung Chen, Dimitri Linten, Geert Hellings, Marco Simicic, Ben Kaczer, Thomas Chiarella, Hans Mertens, Jérôme Mitard, Anda Mocuta, N. Horiguchi CDM-Time Domain Turn-on Transient of ESD Diodes in Bulk FinFET and GAA NW Technologies. Search on Bibsonomy IRPS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Ben Kaczer, Jacopo Franco, Pieter Weckx, Philippe Roussel, V. Putcha, Erik Bury, Marco Simicic, Adrian Chasin, Dimitri Linten, Bertrand Parvais, Francky Catthoor, Gerhard Rzepa, Michael Waltl, Tibor Grasser A brief overview of gate oxide defect properties and their relation to MOSFET instabilities and device and circuit time-dependent variability. Search on Bibsonomy Microelectronics Reliability The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Gerhard Rzepa, Jacopo Franco, Barry J. O'Sullivan, A. Subirats, Marco Simicic, Geert Hellings, Pieter Weckx, Markus Jech, Theresia Knobloch, Michael Waltl, Philippe Roussel, Dimitri Linten, Ben Kaczer, Tibor Grasser Comphy - A compact-physics framework for unified modeling of BTI. Search on Bibsonomy Microelectronics Reliability The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Marco Simicic, Geert Hellings, Shih-Hung Chen, Naoto Horiguchi, Dimitri Linten ESD diodes with Si/SiGe superlattice I/O finFET architecture in a vertically stacked horizontal nanowire technology. Search on Bibsonomy ESSDERC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Bertrand Parvais, Geert Hellings, Marco Simicic, Pieter Weckx, Jérôme Mitard, Doyoung Jang, V. Deshpande, B. van Liempc, Anabela Veloso, A. Vandooren, N. Waldron, Piet Wambacq, Nadine Collaert, Diederik Verkest Scaling CMOS beyond Si FinFET: an analog/RF perspective. Search on Bibsonomy ESSDERC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Erik Bury, Adrian Chasin, Ben Kaczer, Kai-Hsin Chuang, Jacopo Franco, Marco Simicic, Pieter Weckx, Dimitri Linten Self-heating-aware CMOS reliability characterization using degradation maps. Search on Bibsonomy IRPS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Razaidi Hussin, Louis Gerrer, Jie Ding, Liping Wang, Salvatore M. Amoroso, Binjie Cheng, Dave Reid, Pieter Weckx, Marco Simicic, Jacopo Franco, Annelies Vanderheyden, Danielle Vanhaeren, Naoto Horiguchi, Ben Kaczer, Asen Asenov Statistical simulations of 6T-SRAM cell ageing using a reliability aware simulation flow. Search on Bibsonomy ESSDERC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Louis Gerrer, Razaidi Hussin, Salvatore M. Amoroso, Jacopo Franco, Pieter Weckx, Marco Simicic, N. Horiguchi, Ben Kaczer, Tibor Grasser, Asen Asenov Experimental evidences and simulations of trap generation along a percolation path. Search on Bibsonomy ESSDERC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Pieter Weckx, Ben Kaczer, Praveen Raghavan, Jacopo Franco, Marco Simicic, Philippe J. Roussel, Dimitri Linten, Aaron Thean, Diederik Verkest, Francky Catthoor, Guido Groeseneken Characterization and simulation methodology for time-dependent variability in advanced technologies. Search on Bibsonomy CICC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
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