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Publications of "Martin Margala" ( http://dblp.L3S.de/Authors/Martin_Margala )

URL (Homepage):  http://www.ece.rochester.edu/~margala/  Author page on DBLP  Author page in RDF  Community of Martin Margala in ASPL-2

Publication years (Num. hits)
1994-2003 (19) 2004-2005 (19) 2006-2007 (15) 2008-2009 (16) 2010-2011 (15) 2012-2014 (18) 2015-2016 (16) 2017-2018 (16) 2019 (1)
Publication types (Num. hits)
article(35) incollection(1) inproceedings(95) proceedings(4)
Venues (Conferences, Journals, ...)
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The graphs summarize 53 occurrences of 46 keywords

Results
Found 136 publication records. Showing 135 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Philip Colangelo, Oren Segal, Alexander Speicher, Martin Margala Evolutionary Cell Aided Design for Neural Network Architectures. Search on Bibsonomy CoRR The full citation details ... 2019 DBLP  BibTeX  RDF
1Huan Wang 0009, Ronald W. Knepper, Jean-François Millithaler, Martin Margala A Novel Terahertz Ballistic Deflection Transistor Travelling Wave Amplifier System. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Hieu Nguyen, Rod Comer, Phuc Pham, Martin Margala 5-Gb/s linear re-driver in 180 nm CMOS technology. Search on Bibsonomy Microelectronics Journal The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Philip Colangelo, Nasibeh Nasiri, Asit K. Mishra, Eriko Nurvitadhi, Martin Margala, Kevin Nealis Exploration of Low Numeric Precision Deep Learning Inference Using Intel FPGAs. Search on Bibsonomy CoRR The full citation details ... 2018 DBLP  BibTeX  RDF
1Aydin Dirican, Cagatay Ozmen, Martin Margala Leakage-Aware Droop Measurement Built-in Self-Test Circuit for Digital Low-Dropout Regulators. Search on Bibsonomy J. Electronic Testing The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Philip Colangelo, Nasibeh Nasiri, Eriko Nurvitadhi, Asit K. Mishra, Martin Margala, Kevin Nealis Exploration of Low Numeric Precision Deep Learning Inference Using Intel® FPGAs: (Abstract Only). Search on Bibsonomy FPGA The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Philip Colangelo, Nasibeh Nasiri, Eriko Nurvitadhi, Asit K. Mishra, Martin Margala, Kevin Nealis Exploration of Low Numeric Precision Deep Learning Inference Using Intel® FPGAs. Search on Bibsonomy FCCM The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Huan Wang 0009, Jean-François Millithaler, Martin Margala, Ronald W. Knepper THz Ballistic Deflection Transistor Travelling Wave Amplifier Design with THz Ring Hybrid Coupler. Search on Bibsonomy NEWCAS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Aydin Dirican, Cagatay Ozmen, Martin Margala A droop measurement built-in self-test circuit for digital low-dropout regulators. Search on Bibsonomy ISQED The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Huan Wang 0009, Jean-François Millithaler, Ronald W. Knepper, Martin Margala Terahertz travelling wave amplifier design using Ballistic Deflection Transistor. Search on Bibsonomy ISQED The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Mohamed El-Hadedy, Xinfei Guo, Martin Margala, Mircea R. Stan, Kevin Skadron Dual-Data Rate Transpose-Memory Architecture Improves the Performance, Power and Area of Signal-Processing Systems. Search on Bibsonomy Signal Processing Systems The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Poorna Marthi, Nazir Hossain, Huan Wang 0009, Jean-François Millithaler, Martin Margala, Ignacio Iñiguez-de-la-Torre, Javier Mateos, Tomás González A high performance Full Adder based on Ballistic Deflection Transistor technology. Search on Bibsonomy ISCAS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Cagatay Ozmen, Aydin Dirican, Hieu Nguyen, Martin Margala Column-wise ROIC design with on-chip calibration for photoresistive image sensor. Search on Bibsonomy ECCTD The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Pilin Junsangsri, Fabrizio Lombardi, Salin Junsangsri, Martin Margala Design of a Low-Power Non-Volatile Programmable Inverter Cell for COGRE-based Circuits. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Philip Colangelo, Randy Huang, Enno Lübbers, Martin Margala, Kevin Nealis Fine-Grained Acceleration of Binary Neural Networks Using Intel® Xeon® Processor with Integrated FPGA. Search on Bibsonomy FCCM The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Cagatay Ozmen, Aydin Dirican, Hieu Nguyen, Martin Margala ROIC Design for a 10k Pixel Photoresistive Image Sensor with On-Chip Calibration. Search on Bibsonomy NGCAS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Philip Colangelo, Enno Lübbers, Randy Huang, Martin Margala, Kevin Nealis Application of convolutional neural networks on Intel® Xeon® processor with integrated FPGA. Search on Bibsonomy HPEC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Zhuo Qian, Martin Margala Low-Power Split-Radix FFT Processors Using Radix-2 Butterfly Units. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Poorna Marthi, Nazir Hossain, Huan Wang 0009, Jean-François Millithaler, Martin Margala, Ignacio Iñiguez-de-la-Torre, Javier Mateos, Tomás González Design and Analysis of High Performance Ballistic Nanodevice-Based Sequential Circuits Using Monte Carlo and Verilog AMS Simulations. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Oren Segal, Nasibeh Nasiri, Martin Margala A Foray into Efficient Mapping of Algorithms to Hardware Platforms on Heterogeneous Systems. Search on Bibsonomy CoRR The full citation details ... 2016 DBLP  BibTeX  RDF
1Hieu Nguyen, Cagatay Ozmen, Aydin Dirican, Nurettin Tan, Martin Margala A CMOS Ripple Detector for Voltage Regulator Testing. Search on Bibsonomy J. Electronic Testing The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Nasibeh Nasiri, Philip Colangelo, Oren Segal, Martin Margala, Wim Vanderbauwhede Document classification systems in heterogeneous computing environments. Search on Bibsonomy PATMOS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Poorna Marthi, Nazir Hossain, Jean-François Millithaler, Martin Margala A new level sensitive D Latch using Ballistic nanodevices. Search on Bibsonomy ISCAS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Poorna Marthi, Sheikh Rufsan Reza, Nazir Hossain, Jean-François Millithaler, Martin Margala, Ignacio Iñiguez-de-la-Torre, Javier Mateos, Tomás González Modeling and Study of Two-BDT-Nanostructure based Sequential Logic Circuits. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Ayse Kivilcim Coskun, Martin Margala, Laleh Behjat, Jie Han 0001 (eds.) Proceedings of the 26th edition on Great Lakes Symposium on VLSI, GLVLSI 2016, Boston, MA, USA, May 18-20, 2016 Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2016 DBLP  BibTeX  RDF
1Oren Segal, Martin Margala Exploring the performance benefits of heterogeneity and reconfigurable architectures in a commodity cloud. Search on Bibsonomy HPCS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Oren Segal, Philip Colangelo, Nasibeh Nasiri, Zhuo Qian, Martin Margala SparkCL: A Unified Programming Framework for Accelerators on Heterogeneous Clusters. Search on Bibsonomy CoRR The full citation details ... 2015 DBLP  BibTeX  RDF
1Zhuo Qian, Martin Margala A Novel Coefficient Address Generation Algorithm for Split-Radix FFT (Abstract Only). Search on Bibsonomy FPGA The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Nasibeh Nasiri, Oren Segal, Martin Margala, Wim Vanderbauwhede, Sai Rahul Chalamalasetti High Level Programming of Document Classification Systems for Heterogeneous Environments using OpenCL (Abstract Only). Search on Bibsonomy FPGA The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Alex Orailoglu, H. Fatih Ugurdag, Luís Miguel Silveira, Martin Margala, Ricardo Reis (eds.) VLSI-SoC: At the Crossroads of Emerging Trends - 21st IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2013, Istanbul, Turkey, October 6-9, 2013, Revised and Extended Selected Papers Search on Bibsonomy VLSI-SoC (Selected Papers) The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Cagatay Ozmen, Aydin Dirican, Nurettin Tan, Hieu Nguyen, Martin Margala A CMOS ripple detector for integrated voltage regulator testing. Search on Bibsonomy DFTS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Alex K. Jones, Hai (Helen) Li, Ayse Kivilcim Coskun, Martin Margala (eds.) Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20 - 22, 2015 Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2015 DBLP  BibTeX  RDF
1Oren Segal, Philip Colangelo, Nasibeh Nasiri, Zhuo Qian, Martin Margala Aparapi-UCores: A high level programming framework for unconventional cores. Search on Bibsonomy HPEC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Oren Segal, Martin Margala, Sai Rahul Chalamalasetti, Mitch Wright High Level Programming for Heterogeneous Architectures. Search on Bibsonomy CoRR The full citation details ... 2014 DBLP  BibTeX  RDF
1Zhuo Qian, Martin Margala Low power RAM-based hierarchical CAM on FPGA. Search on Bibsonomy ReConFig The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Zhuo Qian, Martin Margala A novel low-power and in-place split-radix FFT processor. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Oren Segal, Martin Margala, Sai Rahul Chalamalasetti, Mitch Wright High level programming framework for FPGAs in the data center. Search on Bibsonomy FPL The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Zhuo Qian, Nasibeh Nasiri, Oren Segal, Martin Margala FPGA implementation of low-power split-radix FFT processors. Search on Bibsonomy FPL The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Oren Segal, Nasibeh Nasiri, Martin Margala, Wim Vanderbauwhede High level programming of FPGAs for HPC and data centric applications. Search on Bibsonomy HPEC The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala, Wim Vanderbauwhede Throughput/Resource-Efficient Reconfigurable Processor for Multimedia Applications. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala, Wim Vanderbauwhede Design and Evaluation of High-Performance Processing Elements for Reconfigurable Systems. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Wim Vanderbauwhede, Anton Frolov, Sai Rahul Chalamalasetti, Martin Margala A hybrid CPU-FPGA system for high throughput (10Gb/s) streaming document classification. Search on Bibsonomy SIGARCH Computer Architecture News The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Sai Rahul Chalamalasetti, Kevin T. Lim, Mitch Wright, Alvin AuYoung, Parthasarathy Ranganathan, Martin Margala An FPGA memcached appliance. Search on Bibsonomy FPGA The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Martin Margala, Ricardo Augusto da Luz Reis, Alex Orailoglu, Luigi Carro, Luís Miguel Silveira, H. Fatih Ugurdag (eds.) 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2013, Istanbul, Turkey, October 7-9, 2013 Search on Bibsonomy VLSI-SoC The full citation details ... 2013 DBLP  BibTeX  RDF
1Samed Maltabas, Osman Kubilay Ekekon, Kemal Kulovic, Anne Meixner, Martin Margala An IDDQ BIST approach to characterize phase-locked loop parameters. Search on Bibsonomy VTS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Wim Vanderbauwhede, Anton Frolov, Leif Azzopardi, Sai Rahul Chalamalasetti, Martin Margala High throughput filtering using FPGA-acceleration. Search on Bibsonomy CIKM The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Sohan Purohit, Martin Margala Investigating the Impact of Logic and Circuit Implementation on Full Adder Performance. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Wim Vanderbauwhede, Sai Rahul Chalamalasetti, Martin Margala Throughput Analysis for a High-Performance FPGA-Accelerated Real-Time Search Application. Search on Bibsonomy Int. J. Reconfig. Comp. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Kemal Kulovic, Martin Margala Time-Based Embedded Test Instrument with Concurrent Voltage Measurement Capability. Search on Bibsonomy J. Electronic Testing The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Samed Maltabas, Kemal Kulovic, Martin Margala Novel Practical Built-in Current Sensors. Search on Bibsonomy J. Electronic Testing The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Sai Rahul Chalamalasetti, Martin Margala, Wim Vanderbauwhede, Mitch Wright, Parthasarathy Ranganathan Evaluating FPGA-acceleration for real-time unstructured search. Search on Bibsonomy ISPASS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Osman Kubilay Ekekon, Samed Maltabas, Martin Margala A multi-GHz PLL Built-In jitter extraction circuit for deep submicron technologies. Search on Bibsonomy ECCTD The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Wim Vanderbauwhede, Sai Rahul Chalamalasetti, Sohan Purohit, Martin Margala A few lines of code, thousands of cores: High-level FPGA programming using vector processor networks. Search on Bibsonomy HPCS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Sohan Purohit, Marco Lanuzza, Martin Margala Design Space Exploration of Split-Path Data Driven Dynamic Full Adder. Search on Bibsonomy J. Low Power Electronics The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Sai Rahul Chalamalasetti, Sohan Purohit, Martin Margala, Wim Vanderbauwhede Radiation-Hardened Reconfigurable Array With Instruction Roll-Back. Search on Bibsonomy Embedded Systems Letters The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Mohamed El-Hadedy, Sohan Purohit, Martin Margala, Svein J. Knapskog Performance and area efficient transpose memory architecture for high throughput adaptive signal processing systems. Search on Bibsonomy AHS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala Low overhead soft error detection and correction scheme for reconfigurable pipelined data paths. Search on Bibsonomy AHS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Osman Kubilay Ekekon, Samed Maltabas, Martin Margala, Ugur Çilingiroglu Power minimization methodology for VCTL topologies. Search on Bibsonomy SoCC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Mohamed El-Hadedy, Martin Margala, Danilo Gligoroski, Svein J. Knapskog Implementing the Blue Midnight Wish Hash Function on Xilinx Virtex-5 FPGA Platform. Search on Bibsonomy ReConFig The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Sohan Purohit, David Harrington, Martin Margala An area efficient design methodology for SEU tolerant digital circuits. Search on Bibsonomy ISCAS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Osman Kubilay Ekekon, Samed Maltabas, Martin Margala Novel programmable built-in current-sensor for analog, digital and mixed-signal circuits. Search on Bibsonomy ISCAS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Vikas Kaushal, Ignacio Iñiguez-de-la-Torre, Martin Margala Topology impact on the room temperature performance of THz-range ballistic deflection transistors. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF Silvaco simulation, angle effect, ballistic transport, dc experiments, gate length, nanodevices
1Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala Design of self correcting radiation hardened digital circuits using decoupled ground bus. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF self-repairing circuits, soft errors, radiation hardening
1Mohamed El-Hadedy, Martin Margala, Danilo Gligoroski, Svein J. Knapskog Resource-efficient implementation of Blue Midnight Wish-256 hash function on Xilinx FPGA platform. Search on Bibsonomy IAS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Samed Maltabas, Osman Kubilay Ekekon, Martin Margala A new built-in IDDQ testing method using programmable BICS. Search on Bibsonomy European Test Symposium The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Wim Vanderbauwhede, Martin Margala, Sai Rahul Chalamalasetti, Sohan Purohit A C++-embedded Domain-Specific Language for programming the MORA soft processor array. Search on Bibsonomy ASAP The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Sohan Purohit, Marco Lanuzza, Stefania Perri, Pasquale Corsonello, Martin Margala Design and Evaluation of an Energy-Delay-Area Efficient Datapath for Coarse-Grain Reconfigurable Computing Systems. Search on Bibsonomy J. Low Power Electronics The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Sohan Purohit, Marco Lanuzza, Stefania Perri, Pasquale Corsonello, Martin Margala Design-Space Exploration of Energy-Delay-Area Efficient Coarse-Grain Reconfigurable Datapath. Search on Bibsonomy VLSI Design The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Sai Rahul Chalamalasetti, Sohan Purohit, Martin Margala, Wim Vanderbauwhede MORA - An Architecture and Programming Model for a Resource Efficient Coarse Grained Reconfigurable Processor. Search on Bibsonomy AHS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1David Wolpert 0001, Hiroshi Irie, Roman Sobolewski, Paul Ampadu, Quentin Diduck, Martin Margala Ballistic Deflection Transistors and the Emerging Nanoscale Era. Search on Bibsonomy ISCAS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Samed Maltabas, Martin Margala, Ugur Çilingiroglu Varicap threshold logic. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF minnick tl network, variable capacitance, threshold logic, parallel counter
1Sohan Purohit, Martin Margala, Marco Lanuzza, Pasquale Corsonello New performance/power/area efficient, reliable full adder design. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF d3l, reliability, dynamic, full-adder, sub-threshold
1Vikas Kaushal, Quentin Diduck, Martin Margala Study of leakage current mechanisms in ballistic deflection transistors. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF ballistic transport, current leakage mechanism, deflection transistors, silvaco simulation, geometry, monte carlo simulation
1Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala A 1.2v, 1.02 ghz 8 bit SIMD compatible highly parallel arithmetic data path for multi-precision arithmetic. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF performance, design
1Sai Rahul Chalamalasetti, Wim Vanderbauwhede, Sohan Purohit, Martin Margala A low cost reconfigurable soft processor for multimedia applications: Design synthesis and programming model. Search on Bibsonomy FPL The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Wim Vanderbauwhede, Martin Margala, Sai Rahul Chalamalasetti, Sohan Purohit Programming Model and Low-level Language for a Coarse-Grained Reconfigurable Multimedia Processor. Search on Bibsonomy ERSA The full citation details ... 2009 DBLP  BibTeX  RDF
1John Liobe, Richard Geisler, Martin Margala A Novel Application of FM-ADC Toward the Self-Calibration of Phase-Locked Loops. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Marco Lanuzza, Stefania Perri, Pasquale Corsonello, Martin Margala Energy Efficient Coarse-Grain Reconfigurable Array for Accelerating Digital Signal Processing. Search on Bibsonomy PATMOS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF coarse-grain array, DSP, Reconfigurable systems
1Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala, Pasquale Corsonello Power/throughput/area efficient PIM-based reconfigurable array for parallel processing. Search on Bibsonomy SoCC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala, Pasquale Corsonello Power-Efficient High Throughput Reconfigurable Datapath Design for Portable Multimedia Devices. Search on Bibsonomy ReConFig The full citation details ... 2008 DBLP  DOI  BibTeX  RDF multimedia, reconfigurable, SIMD, datapath
1Kevin Sliech, Martin Margala A Digital BIST for Phase-Locked Loops. Search on Bibsonomy DFT The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Michael Wieckowski, Martin Margala A portless SRAM Cell using stunted wordline drivers. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Brandon J. Jasionowski, Michelle K. Lay, Martin Margala A Processor-In-Memory Architecture for Multimedia Compression. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1John Liobe, Martin Margala Novel Process and Temperature-Stable, IDD Sensor for the BIST Design of Embedded Digital, Analog, and Mixed-Signal Circuits. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Michael Wieckowski, Sandeep Patil, Martin Margala Portless SRAM - A High-Performance Alternative to the 6T Methodology. Search on Bibsonomy J. Solid-State Circuits The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Marco Lanuzza, Stefania Perri, Pasquale Corsonello, Martin Margala A New Reconfigurable Coarse-Grain Architecture for Multimedia Applications. Search on Bibsonomy AHS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Sandeep Patil, Michael Wieckowski, Martin Margala A Self-Biased Charge-Transfer Sense Amplifier. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Richard Geisler, John Liobe, Martin Margala Process and Temperature Calibration of PLLs with BiST Capabilities. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1John Liobe, Martin Margala Novel Process and Temperature-Stable BICS for Embedded Analog and Mixed-Signal Test. Search on Bibsonomy IOLTS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Dan Zhao 0001, Shambhu J. Upadhyaya, Martin Margala Design of a wireless test control network with radio-on-chip technology for nanometer system-on-a-chip. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Martin Margala Adaptable Architectures for Signal Processing Applications. Search on Bibsonomy AHS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Martin Margala Tutorial: RAM-based Circuits and Architectures for Multimedia and Signal Processing SOCs. Search on Bibsonomy SoCC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Yunan Xiang, R. Pettibon, Martin Margala A versatile computation module for adaptable multimedia processors. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Quentin Diduck, John Liobe, Sadeka Ali, Martin Margala Process tolerant calibration circuit for PLL applications with BIST. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Pasquale Corsonello, Stefania Perri, Martin Margala An integrated countermeasure against differential power analysis for secure smart-cards. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Yuxin Wang, D. Makadia, Martin Margala On-Chip Integrated Antennas - The First Challenge for Reliable on-Chip Wireless Interconnects. Search on Bibsonomy CCECE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Yuxin Wang, Martin Margala New Embedded Core Testing for System-on-Chips and System-in-Packages. Search on Bibsonomy CCECE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Brian Moore 0001, Martin Margala, Christopher J. Backhouse Design of wireless on-wafer submicron characterization system. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Pasquale Corsonello, Stefania Perri, Martin Margala Efficient Addition Circuits for Modular Design of Processors-in-Memory. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Anand Gopalan, Martin Margala, P. R. Mukund A current based self-test methodology for RF front-end circuits. Search on Bibsonomy Microelectronics Journal The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
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