The FacetedDBLP logo    Search for: in:

Disable automatic phrases ?     Syntactic query expansion: ?

Publications of "Mythri Alle" ( http://dblp.L3S.de/Authors/Mythri_Alle )

  Author page on DBLP  Author page in RDF  Community of Mythri Alle in ASPL-2

Publication years (Num. hits)
2006-2011 (15) 2013 (2)
Publication types (Num. hits)
article(2) inproceedings(15)
Venues (Conferences, Journals, ...)
GrowBag graphs for keyword ? (Num. hits/coverage)

Group by:
The graphs summarize 2 occurrences of 2 keywords

Results
Found 18 publication records. Showing 17 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Mythri Alle, Antoine Morvan, Steven Derrien Runtime dependency analysis for loop pipelining in high-level synthesis. Search on Bibsonomy DAC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Antoine Floch, Tomofumi Yuki, Ali El Moussawi, Antoine Morvan, Kevin J. M. Martin, Maxime Naullet, Mythri Alle, Ludovic L'Hours, Nicolas Simon, Steven Derrien, François Charot, Christophe Wolinski, Olivier Sentieys GeCoS: A framework for prototyping custom hardware design flows. Search on Bibsonomy SCAM The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Ratna Krishnamoorthy, Saptarsi Das, Keshavan Varadarajan, Mythri Alle, Masahiro Fujita, Soumitra Kumar Nandy, Ranjani Narayan Data Flow Graph Partitioning Algorithms and Their Evaluations for Optimal Spatio-temporal Computation on a Coarse Grain Reconfigurable Architecture. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Ratna Krishnamoorthy, Keshavan Varadarajan, Masahiro Fujita, Mythri Alle, S. K. Nandy, Ranjani Narayan Dataflow Graph Partitioning for Optimal Spatio-Temporal Computation on a Coarse Grain Reconfigurable Architecture. Search on Bibsonomy ARC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Prasenjit Biswas, Pramod P. Udupa, Rajdeep Mondal, Keshavan Varadarajan, Mythri Alle, S. K. Nandy, Ranjani Narayan Accelerating Numerical Linear Algebra Kernels on a Scalable Run Time Reconfigurable Platform. Search on Bibsonomy ISVLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Ratna Krishnamoorthy, Keshavan Varadarajan, Ganesh Garga, Mythri Alle, S. K. Nandy, Ranjani Narayan, Masahiro Fujita Towards minimizing execution delays on dynamically reconfigurable processors: a case study on REDEFINE. Search on Bibsonomy CASES The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1N. Thambi Prashank, M. Prasadarao, Avinaba Dutta, Keshavan Varadarajan, Mythri Alle, S. K. Nandy, Ranjani Narayan Enhancements for variable N-point streaming FFT/IFFT on REDEFINE, a runtime reconfigurable architecture. Search on Bibsonomy ICSAMOS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Prasenjit Biswas, Keshavan Varadarajan, Mythri Alle, S. K. Nandy, Ranjani Narayan Design space exploration of systolic realization of QR factorization on a runtime reconfigurable platform. Search on Bibsonomy ICSAMOS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Mythri Alle, Keshavan Varadarajan, Alexander Fell, C. Ramesh Reddy, Joseph Nimmy, Saptarsi Das, Prasenjit Biswas, Jugantor Chetia, Adarsha Rao, S. K. Nandy, Ranjani Narayan REDEFINE: Runtime reconfigurable polymorphic ASIC. Search on Bibsonomy ACM Trans. Embedded Comput. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Mythri Alle, Keshavan Varadarajan, Alexander Fell, S. K. Nandy, Ranjani Narayan Compiling Techniques for Coarse Grained Runtime Reconfigurable Architectures. Search on Bibsonomy ARC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Alexander Fell, Mythri Alle, Keshavan Varadarajan, Prasenjit Biswas, Saptarsi Das, Jugantor Chetia, S. K. Nandy, Ranjani Narayan Streaming FFT on REDEFINE-v2: an application-architecture design space exploration. Search on Bibsonomy CASES The full citation details ... 2009 DBLP  DOI  BibTeX  RDF application synthesis, custom instruction extension, dataflow software pipeline, honeycomb, polymorphic asic, runtime reconfiguration, router, NOC
1Adarsha Rao, Mythri Alle, Sainath V, Reyaz Shaik, Rajashekhar Chowhan, Sreeramula Sankaraiah, Sravanthi Mantha, S. K. Nandy, Ranjani Narayan An Input Triggered Polymorphic ASIC for H.264 Decoding. Search on Bibsonomy ASAP The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Adarsha Rao, Mythri Alle, S. K. Nandy, Ranjani Narayan Architecture of a polymorphic ASIC for interoperability across multi-mode H.264 decoders. Search on Bibsonomy ASAP The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Joseph Nimmy, C. Ramesh Reddy, Keshavan Varadarajan, Mythri Alle, Alexander Fell, S. K. Nandy, Ranjani Narayan RECONNECT: A NoC for polymorphic ASICs using a low overhead single cycle router. Search on Bibsonomy ASAP The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Mythri Alle, Keshavan Varadarajan, Ramesh C. Ramesh, Joseph Nimmy, Alexander Fell, Adarsha Rao, S. K. Nandy, Ranjani Narayan Synthesis of application accelerators on Runtime Reconfigurable Hardware. Search on Bibsonomy ASAP The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1A. N. Satrawala, Keshavan Varadarajan, Mythri Alle, S. K. Nandy, Ranjani Narayan REDEFINE: Architecture of a SoC Fabric for Runtime Composition of Computation Structures. Search on Bibsonomy FPL The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Mythri Alle, Jayanta Biswas, S. K. Nandy High Performance VLSI Architecture Design for H.264 CAVLC Decoder. Search on Bibsonomy ASAP The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
Displaying result #1 - #17 of 17 (100 per page; Change: )
Valid XHTML 1.1! Valid CSS! [Valid RSS]
Maintained by Jörg Diederich.
Based upon DBLP by Michael Ley.
open data data released under the ODC-BY 1.0 license