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Publications of Roman Lysecky Roman L. Lysecky ( http://dblp.L3S.de/Authors/Roman_Lysecky )

Publication years (Num. hits)
1999-2004 (15) 2005-2009 (17) 2010-2012 (20) 2013-2015 (18) 2016-2018 (19) 2019 (2)
Publication types (Num. hits)
article(30) inproceedings(61)
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The graphs summarize 142 occurrences of 47 keywords

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Found 92 publication records. Showing 91 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1George Günter, Yanbing Wang, Derek Gloudemans, Raphael Stern, Daniel B. Work, Maria Laura Delle Monache, Rahul Bhadani, Matt Bunting, Roman Lysecky, Jonathan Sprinkle, Benjamin Seibold, Benedetto Piccoli String stability of commercial adaptive cruise control vehicles: WIP abstract. Search on Bibsonomy ICCPS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Frank Vahid, Roman Lysecky Auto-Graded Programming Labs: Dos and Don'ts for Less-Stressed Higher-Performing Students, Reduced Grading Time, and Happier Teachers, . Search on Bibsonomy SIGCSE The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Hyunsuk Nam, Roman Lysecky Mixed Cryptography Constrained Optimization for Heterogeneous, Multicore, and Distributed Embedded Systems. Search on Bibsonomy Computers The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Aakarsh Rao, Nadir Carreon, Roman Lysecky, Jerzy W. Rozenblit Probabilistic Threat Detection for Risk Management in Cyber-physical Medical Systems. Search on Bibsonomy IEEE Software The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Minjun Seo, Roman Lysecky Non-Intrusive In-Situ Requirements Monitoring of Embedded System. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Sixing Lu, Roman Lysecky Time and Sequence Integrated Runtime Anomaly Detection for Embedded Systems. Search on Bibsonomy ACM Trans. Embedded Comput. Syst. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Aakarsh Rao, Jerzy W. Rozenblit, Roman Lysecky, Johannes Sametinger Trustworthy multi-modal framework for life-critical systems security. Search on Bibsonomy SpringSim (ANSS) The full citation details ... 2018 DBLP  BibTeX  RDF
1Minjun Seo, Roman Lysecky Runtime requirements monitoring for state-based hardware: work-in-progress. Search on Bibsonomy CODES+ISSS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Bozhi Liu, Kemeng Chen, Minjun Seo, Janet Meiling Wang, Roman Lysecky Evaluation of the Complexity of Automated Trace Alignment using Novel Power Obfuscation Methods. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Roman Lysecky, Frank Vahid Teaching Students a Systematic Approach to Debugging: (Abstract Only). Search on Bibsonomy SIGCSE The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Nabeel Alzahrani, Frank Vahid, Alex D. Edgcomb, Kevin Nguyen, Roman Lysecky Python Versus C++: An Analysis of Student Struggle on Small Coding Exercises in Introductory Programming Courses. Search on Bibsonomy SIGCSE The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Nadir Amin Carreon, Sixing Lu, Roman Lysecky Hardware-Based Probabilistic Threat Detection and Estimation for Embedded Systems. Search on Bibsonomy ICCD The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Bozhi Liu, Roman Lysecky, Janet Meiling Wang Roveda Composable Template Attacks Using Templates for Individual Architectural Components. Search on Bibsonomy ICCD The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Nathan Sandoval, Casey Mackin, Sean Whitsitt, Vijay Shankar Gopinath, Sachidanand Mahadevan, Andrew Milakovich, Kyle Merry, Jonathan Sprinkle, Roman Lysecky Task Transition Scheduling for Data-Adaptable Systems. Search on Bibsonomy ACM Trans. Embedded Comput. Syst. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Minjun Seo, Roman Lysecky Hierarchical Non-intrusive In-situ Requirements Monitoring for Embedded Systems. Search on Bibsonomy RV The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Sudarshan Sargur, Roman Lysecky Non-intrusive dynamic profiler for multicore embedded systems. Search on Bibsonomy ASP-DAC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Alex D. Edgcomb, Frank Vahid, Roman Lysecky, Susan Lysecky Getting Students to Earnestly Do Reading, Studying, and Homework in an Introductory Programming Class. Search on Bibsonomy SIGCSE The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Sixing Lu, Roman Lysecky, Jerzy W. Rozenblit Subcomponent Timing-Based Detection of Malware in Embedded Systems. Search on Bibsonomy ICCD The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Adrian Lizarraga, Roman L. Lysecky, Jonathan Sprinkle Model-Driven Optimization of Data-Adaptable Embedded Systems. Search on Bibsonomy COMPSAC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Minjun Seo, Roman Lysecky In-Situ Requirements Monitoring of Embedded Systems. Search on Bibsonomy Embedded Systems Letters The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Hyunsuk Nam, Roman Lysecky Latency, Power, and Security Optimization in Distributed Reconfigurable Embedded Systems. Search on Bibsonomy IPDPS Workshops The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Lu Ding, Adrian Lizarraga, Ashish Shenoy, Ann Gordon-Ross, Susan Lysecky, Roman L. Lysecky Application-Specific Customization of Dynamic Profiling Mechanisms for Sensor Networks. Search on Bibsonomy IEEE Access The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Johannes Sametinger, Jerzy W. Rozenblit, Roman L. Lysecky, Peter Ott Security challenges for medical devices. Search on Bibsonomy Commun. ACM The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Jong Chul Lee, Roman L. Lysecky System-Level Observation Framework for Non-Intrusive Runtime Monitoring of Embedded Systems. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Alex D. Edgcomb, Frank Vahid, Roman L. Lysecky Students learn more with less text that covers the same core topics. Search on Bibsonomy FIE The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Sixing Lu, Roman Lysecky Analysis of Control Flow Events for Timing-based Runtime Anomaly Detection. Search on Bibsonomy WESS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Sixing Lu, Minjun Seo, Roman Lysecky Timing-based anomaly detection in embedded systems. Search on Bibsonomy ASP-DAC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Jin Sun, Roman L. Lysecky, Karthik Shankar, Avinash Karanth Kodi, Ahmed Louri, Janet Roveda Workload assignment considering NBTI degradation in multicore systems. Search on Bibsonomy JETC The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Jong Chul Lee, Jovan Vance, Roman Lysecky Hardware-Based Event Stream Ordering for System-Level Observation Framework. Search on Bibsonomy Embedded Systems Letters The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Jong Chul Lee, Roman Lysecky Area-Efficient Event Stream Ordering for Runtime Observability of Embedded Systems. Search on Bibsonomy DAC The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Jingqing Mu, Karthik Shankar, Roman L. Lysecky Profiling and online system-level performance and power estimation for dynamically adaptable embedded systems. Search on Bibsonomy ACM Trans. Embedded Comput. Syst. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Nathan Sandoval, Casey Mackin, Sean Whitsitt, Roman L. Lysecky, Jonathan Sprinkle Runtime hardware/software task transition scheduling for data-adaptable embedded systems. Search on Bibsonomy FPT The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Nathan Sandoval, Casey Mackin, Sean Whitsitt, Roman L. Lysecky, Jonathan Sprinkle System Throughput Optimization and Runtime Communication Middleware Supporting Dynamic Software-Hardware Task Migration in Data Adaptable Embedded Systems. Search on Bibsonomy ECBS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Nathan Sandoval, Casey Mackin, Roman L. Lysecky, Jonathan Sprinkle How You Can Learn to Stop Worrying and Love Reconfigurable Embedded Systems: A Tutorial. Search on Bibsonomy ECBS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Adrian Lizarraga, Roman Lysecky, Susan Lysecky, Ann Gordon-Ross Dynamic profiling and fuzzy-logic-based optimization of sensor network platforms. Search on Bibsonomy ACM Trans. Embedded Comput. Syst. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Roman Lysecky, Nathan Sandoval, Sean Whitsitt, Casey Mackin, Jonathan Sprinkle Efficient reconfiguration methods to enable rapid deployment of runtime reconfigurable systems. Search on Bibsonomy ACSSC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Tim Pifer, David Schwartz, Roman Lysecky, Chungman Seo, Bernard P. Zeigler Discrete event system specification, synthesis, and optimization of low-power FPGA-based embedded systems. Search on Bibsonomy FPT The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Jong Chul Lee, Roman Lysecky System Observation of Blocking, Non-blocking, and Cascading Events for Runtime Monitoring of Real-Time Systems. Search on Bibsonomy ECBS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Lu Ding, Adrian Lizarraga, Susan Lysecky, Roman Lysecky, Ann Gordon-Ross Accuracy-Guided Runtime Adaptive Profiling Optimization of Wireless Sensor Networks. Search on Bibsonomy ECBS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Jin Sun, Rui Zheng, Jyothi Velamala, Yu Cao, Roman L. Lysecky, Karthik Shankar, Janet Meiling Wang Roveda A self-tuning design methodology for power-efficient multi-core systems. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Sean Whitsitt, Jonathan Sprinkle, Roman L. Lysecky An overseer control methodology for data adaptable embedded systems. Search on Bibsonomy MPM@MoDELS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Arslan Munir, Ann Gordon-Ross, Susan Lysecky, Roman L. Lysecky Online algorithms for wireless sensor networks dynamic optimization. Search on Bibsonomy CCNC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Jingqing Mu, Roman L. Lysecky Adaptive online heuristic performance estimation and power optimization for reconfigurable embedded systems. Search on Bibsonomy CODES+ISSS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Andrew Milakovich, Vijay Shankar Gopinath, Roman L. Lysecky, Jonathan Sprinkle Automated Software Generation and Hardware Coprocessor Synthesis for Data-Adaptable Reconfigurable Systems. Search on Bibsonomy ECBS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Adrian Lizarraga, Lu Ding, Jeff Hiner, Roman Lysecky, Susan Lysecky, Ann Gordon-Ross ATLeS-SN. Search on Bibsonomy Design Autom. for Emb. Sys. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Varadaraj Kamath Nileshwar, Roman Lysecky SNR analysis approach for hardware/software partitioning using dynamically adaptable fixed point representation. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Jong Chul Lee, Faycel Kouteib, Roman Lysecky Event-driven framework for configurable runtime system observability for SOC designs. Search on Bibsonomy ITC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Ajay Nair, Karthik Shankar, Roman L. Lysecky Efficient hardware-based nonintrusive dynamic application profiling. Search on Bibsonomy ACM Trans. Embedded Comput. Syst. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Jingqing Mu, Roman L. Lysecky Profile assisted online system-level performance and power estimation for dynamic reconfigurable embedded systems. Search on Bibsonomy ASP-DAC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Sachidanand Mahadevan, Vijay Shankar Gopinath, Roman L. Lysecky, Jonathan Sprinkle, Jerzy W. Rozenblit, Michael W. Marcellin Hardware/Software Communication Middleware for Data Adaptable Embedded Systems. Search on Bibsonomy ECBS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF hardware/software communication middleware, hardware/software codesign, model-based design, Data adaptability
1Vijay Shankar Gopinath, Jonathan Sprinkle, Roman L. Lysecky Modeling of Data Adaptable Reconfigurable Embedded Systems. Search on Bibsonomy ECBS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF DARES, GME, model-based design, model integrated computing, Data adaptability
1Jong Chul Lee, Andrew S. Gardner, Roman Lysecky Hardware Observability Framework for Minimally Intrusive Online Monitoring of Embedded Systems. Search on Bibsonomy ECBS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF online system monitoring, verification, testing, validation, observability
1Rahul Kalra, Roman L. Lysecky Configuration Locking and Schedulability Estimation for Reduced Reconfiguration Overheads of Reconfigurable Systems. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Ashish Shenoy, Jeff Hiner, Susan Lysecky, Roman L. Lysecky, Ann Gordon-Ross Evaluation of Dynamic Profiling Methodologies for Optimization of Sensor Networks. Search on Bibsonomy Embedded Systems Letters The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Karthik Shankar, Roman L. Lysecky Control Focused Soft Error Detection for Embedded Applications. Search on Bibsonomy Embedded Systems Letters The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Arslan Munir, Ann Gordon-Ross, Susan Lysecky, Roman L. Lysecky A lightweight dynamic optimization methodology for wireless sensor networks. Search on Bibsonomy WiMob The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Jin Sun, Roman L. Lysecky, Karthik Shankar, Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang Workload capacity considering NBTI degradation in multi-core systems. Search on Bibsonomy ASP-DAC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Jeff Hiner, Ashish Shenoy, Roman L. Lysecky, Susan Lysecky, Ann Gordon-Ross Transaction-Level Modeling for Sensor Networks Using SystemC. Search on Bibsonomy SUTC/UMC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF SystemC profiling, simulation, Sensor networks, transaction-level modeling
1Jin Sun, Rui Zheng, Jyothi Velamala, Yu Cao, Roman L. Lysecky, Karthik Shankar, Janet Meiling Wang Roveda A self-evolving design methodology for power efficient multi-core systems. Search on Bibsonomy ICCAD The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Lance Saldanha, Roman L. Lysecky Float-to-fixed and fixed-to-float hardware converters for rapid hardware/software partitioning of floating point software applications to static and dynamic fixed point coprocessors. Search on Bibsonomy Design Autom. for Emb. Sys. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Jingqing Mu, Roman L. Lysecky Autonomous hardware/software partitioning and voltage/frequency scaling for low-power embedded systems. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Roman L. Lysecky, Frank Vahid Design and implementation of a MicroBlaze-based warp processor. Search on Bibsonomy ACM Trans. Embedded Comput. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF soft processor cores, FPGA, dynamic optimization, hardware/software partitioning, configurable logic, Warp processors, just-in-time (JIT) compilation
1Karthik Shankar, Roman L. Lysecky Non-intrusive dynamic application profiling for multitasked applications. Search on Bibsonomy DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF dynamic hardware/software partitioning, profiling, dynamic optimizations, multitasking, real-time embedded systems
1Roman L. Lysecky Scalability and Parallel Execution of Warp Processing: Dynamic Hardware/Software Partitioning. Search on Bibsonomy International Journal of Parallel Programming The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Warp processing, Embedded systems, Hardware/software partitioning, Dynamically adaptable systems
1Frank Vahid, Greg Stitt, Roman L. Lysecky Warp Processing: Dynamic Translation of Binaries to FPGA Circuits. Search on Bibsonomy IEEE Computer The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Lance Saldanha, Roman L. Lysecky Hardware/software partitioning of floating point software applications to fixed-pointed coprocessor circuits. Search on Bibsonomy CODES+ISSS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF floating point to fixed conversion, floating point, fixed point, hardware/software partitioning
1Mark Hammerquist, Roman L. Lysecky Design space exploration for application specific FPGAS in system-on-a-chip designs. Search on Bibsonomy SoCC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Ajay Nair, Roman L. Lysecky Non-intrusive dynamic application profiler for detailed loop execution characterization. Search on Bibsonomy CASES The full citation details ... 2008 DBLP  DOI  BibTeX  RDF nonintrusive, embedded systems, profiling, dynamic optimization
1Roman L. Lysecky, Frank Vahid A Study of the Speedups and Competitiveness of FPGA Soft Processor Cores using Dynamic Hardware/Software Partitioning Search on Bibsonomy CoRR The full citation details ... 2007 DBLP  BibTeX  RDF
1Roman L. Lysecky Low-power warp processor for power efficient high-performance embedded systems. Search on Bibsonomy DATE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF warp processing, embedded systems, low-power, hardware/software partitioning, dynamically adaptable systems
1Roman L. Lysecky, Greg Stitt, Frank Vahid Warp Processors. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF FPGA, dynamic optimization, hardware/software codesign, hardware/software partitioning, configurable logic, Warp processors, just-in-time (JIT) compilation
1David Sheldon, Rakesh Kumar 0002, Roman L. Lysecky, Frank Vahid, Dean M. Tullsen Application-specific customization of parameterized FPGA soft-core processors. Search on Bibsonomy ICCAD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1David Sheldon, Rakesh Kumar 0002, Frank Vahid, Dean M. Tullsen, Roman L. Lysecky Conjoining soft-core FPGA processors. Search on Bibsonomy ICCAD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF conjoined processors, parameterized platforms, soft-core processors, FPGAs, customization, tuning
1Roman L. Lysecky, Kris Miller, Frank Vahid, Kees A. Vissers Firm-core Virtual FPGA for Just-in-Time FPGA Compilation (abstract only). Search on Bibsonomy FPGA The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan A Study of the Scalability of On-Chip Routing for Just-in-Time FPGA Compilation. Search on Bibsonomy FCCM The full citation details ... 2005 DBLP  DOI  BibTeX  RDF standard hardware binary, FPGA, dynamic optimization, system-on-a-chip, platforms, codesign, hardware/software partitioning, configurable logic, Place and route, warp processors, just-in-time (JIT) compilation
1Roman L. Lysecky, Frank Vahid A Study of the Speedups and Competitiveness of FPGA Soft Processor Cores using Dynamic Hardware/Software Partitioning. Search on Bibsonomy DATE The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Roman L. Lysecky, Susan Cotterell, Frank Vahid A fast on-chip profiler memory using a pipelined binary tree. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2004 DBLP  BibTeX  RDF
1Chuanjun Zhang, Frank Vahid, Roman L. Lysecky A self-tuning cache architecture for embedded systems. Search on Bibsonomy ACM Trans. Embedded Comput. Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF on-chip CAD, embedded systems, low power, Cache, configurable, dynamic optimization, low energy, architecture tuning
1Chuanjun Zhang, Frank Vahid, Roman L. Lysecky A Self-Tuning Cache Architecture for Embedded Systems. Search on Bibsonomy DATE The full citation details ... 2004 DBLP  DOI  BibTeX  RDF on-chip CAD, embedded systems, low power, Cache, configurable, dynamic optimization, low energy, architecture tuning
1Roman L. Lysecky, Frank Vahid A Configurable Logic Architecture for Dynamic Hardware/Software Partitioning. Search on Bibsonomy DATE The full citation details ... 2004 DBLP  DOI  BibTeX  RDF FPGA fabric, self-improving chips, synthesis, reconfigurable computing, dynamic optimization, system-on-a-chip, platforms, codesign, Hardware/software partitioning, just-in-time compilation, configurable logic, place and route, warp processors
1Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan Dynamic FPGA routing for just-in-time FPGA compilation. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF FPGA, dynamic optimization, system-on-a-chip, platforms, codesign, hardware/software partitioning, just-in-time compilation, configurable logic, place and route, warp processors
1Frank Vahid, Roman L. Lysecky, Chuanjun Zhang, Greg Stitt Highly configurable platforms for embedded computing systems. Search on Bibsonomy Microelectronics Journal The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Roman L. Lysecky, Frank Vahid A codesigned on-chip logic minimizer. Search on Bibsonomy CODES+ISSS The full citation details ... 2003 DBLP  DOI  BibTeX  RDF embedded CAD, on-chip logic minimization, on-chip synthesis, embedded systems, dynamic optimization, system-on-a-chip, hardware/software codesign, logic minimization
1Roman L. Lysecky, Frank Vahid On-chip logic minimization. Search on Bibsonomy DAC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF on-chip logic minimization, on-chip synthesis, embedded systems, dynamic optimization, system-on-a-chip, logic minimization
1Greg Stitt, Roman L. Lysecky, Frank Vahid Dynamic hardware/software partitioning: a first approach. Search on Bibsonomy DAC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF self-improving chips, FPGA, embedded systems, synthesis, dynamic optimization, system-on-a-chip, platforms, codesign, hardware/software partitioning
1Roman L. Lysecky, Frank Vahid Prefetching for improved bus wrapper performance in cores. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF Bus wrapper, PVCI, VSIA, interfacing, system-on-a-chip, intellectual property, cores, design reuse, on-chip bus
1Roman L. Lysecky, Susan Cotterell, Frank Vahid A fast on-chip profiler memory. Search on Bibsonomy DAC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF embedded CAD, platform tuning, embedded systems, low power, profiling, system-on-a-chip, binary tree, adaptive architectures, memory design
1Roman L. Lysecky, Frank Vahid, Tony Givargis Experiments with the Peripheral Virtual Component Interface. Search on Bibsonomy ISSS The full citation details ... 2000 DBLP  DOI  BibTeX  RDF VCI, bus wrappers, interfacing, system-on-a-chip, intellectual property, Cores, on-chip bus
1Roman L. Lysecky, Frank Vahid, Tony Givargis Techniques for Reducing Read Latency of Core Bus Wrappers. Search on Bibsonomy DATE The full citation details ... 2000 DBLP  DOI  BibTeX  RDF bus wrapper, interfacing, system-on-a-chip, intellectual property, Cores, design reuse, on-chip bus
1Greg Stitt, Frank Vahid, Tony Givargis, Roman L. Lysecky A first-step towards an architecture tuning methodology for low power. Search on Bibsonomy CASES The full citation details ... 2000 DBLP  DOI  BibTeX  RDF parameterized architectures, embedded systems, low-power, system-on-a-chip, cores, tuning
1Roman L. Lysecky, Frank Vahid, Rilesh Patel, Tony Givargis Pre-Fetching for Improved Core Interfacing. Search on Bibsonomy ISSS The full citation details ... 1999 DBLP  DOI  BibTeX  RDF interfacing, system-on-a-chip, intellectual property, Cores, on-chip bus
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