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Publications of "Salvador Mir" ( http://dblp.L3S.de/Authors/Salvador_Mir )

  Author page on DBLP  Author page in RDF  Community of Salvador Mir in ASPL-2

Publication years (Num. hits)
1994-2000 (17) 2001-2005 (16) 2006-2008 (15) 2009-2010 (18) 2011-2013 (23) 2014-2016 (17) 2017-2019 (11)
Publication types (Num. hits)
article(32) inproceedings(83) proceedings(2)
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Found 118 publication records. Showing 117 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Guillaume Renaud, Mamadou Diallo, Manuel J. Barragan, Salvador Mir Fully Differential 4-V Output Range 14.5-ENOB Stepwise Ramp Stimulus Generator for On-Chip Static Linearity Test of ADCs. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Manuel J. Barragan, Gildas Léger, Florent Cilici, Estelle Lauga-Larroze, Sylvain Bourdel, Salvador Mir On the use of causal feature selection in the context of machine-learning indirect test. Search on Bibsonomy DATE The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Hani Malloug, Manuel J. Barragan, Salvador Mir A 52 dB-SFDR 166 MHz sinusoidal signal generator for mixed-signal BIST applications in 28 nm FDSOI technology. Search on Bibsonomy ETS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Florent Cilici, Gildas Léger, Manuel J. Barragan, Salvador Mir, Estelle Lauga-Larroze, Sylvain Bourdel Efficient generation of data sets for one-shot statistical calibration of RF/mm-wave circuits. Search on Bibsonomy SMACD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Florent Cilici, Manuel J. Barragan, Salvador Mir, Estelle Lauga-Larroze, Sylvain Bourdel, Gildas Léger Yield Recovery of mm-Wave Power Amplifiers using Variable Decoupling Cells and One-Shot Statistical Calibration. Search on Bibsonomy ISCAS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Hani Malloug, Manuel J. Barragan, Salvador Mir Practical Harmonic Cancellation Techniques for the On-Chip Implementation of Sinusoidal Signal Generators for Mixed-Signal BIST Applications. Search on Bibsonomy J. Electronic Testing The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Florent Cilici, Manuel J. Barragan, Salvador Mir, Estelle Lauga-Larroze, Sylvain Bourdel Assisted test design for non-intrusive machine learning indirect test of millimeter-wave circuits. Search on Bibsonomy ETS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Renato S. Feitoza, Manuel J. Barragan, Salvador Mir, Daniel Dzahini Reduced-code static linearity test of SAR ADCs using a built-in incremental ∑Δ converter. Search on Bibsonomy IOLTS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Michele Portolan, Manuel J. Barragan, Rshdee Alhakim, Salvador Mir Mixed-signal BIST computation offloading using IEEE 1687. Search on Bibsonomy ETS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Hani Malloug, Manuel J. Barragan Asian, Salvador Mir, Laurent Basteres, Hervé Le Gall Design of a sinusoidal signal generator with calibrated harmonic cancellation for mixed-signal BIST in a 28 nm FDSOI technology. Search on Bibsonomy ETS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Guillaume Renaud, Marc Margalef-Rovira, Manuel J. Barragan, Salvador Mir Analysis of an efficient on-chip servo-loop technique for reduced-code static linearity test of pipeline ADCs. Search on Bibsonomy VTS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Guillaume Renaud, Manuel J. Barragan, Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Le Gall, Hervé Naudet A 65nm CMOS Ramp Generator Design and its Application Towards a BIST Implementation of the Reduced-Code Static Linearity Test Technique for Pipeline ADCs. Search on Bibsonomy J. Electronic Testing The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Manuel J. Barragan, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Le Gall, Neha Bhargava, Ankur Bal Practical Simulation Flow for Evaluating Analog/Mixed-Signal Test Techniques. Search on Bibsonomy IEEE Design & Test The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Manuel J. Barragan, Rshdee Alhakim, Haralampos-G. D. Stratigopoulos, Matthieu Dubois, Salvador Mir, Hervé Le Gall, Neha Bhargava, Ankur Bal A Fully-Digital BIST Wrapper Based on Ternary Test Stimuli for the Dynamic Test of a 40 nm CMOS 18-bit Stereo Audio ΣΔ ADC. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Athanasios Dimakos, Haralampos-G. D. Stratigopoulos, Alexandre Siligaris, Salvador Mir, Emeric de Foucauld Built-in test of millimeter-Wave circuits based on non-intrusive sensors. Search on Bibsonomy DATE The full citation details ... 2016 DBLP  BibTeX  RDF
1Antonio J. Ginés, Eduardo J. Peralías, Gildas Léger, Adoración Rueda, Guillaume Renaud, Manuel J. Barragan, Salvador Mir Linearity test of high-speed high-performance ADCs using a self-testable on-chip generator. Search on Bibsonomy ETS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Athanasios Dimakos, Haralampos-G. D. Stratigopoulos, Alexandre Siligaris, Salvador Mir, Emeric de Foucauld Parametric Built-In Test for 65nm RF LNA Using Non-Intrusive Variation-Aware Sensors. Search on Bibsonomy J. Electronic Testing The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Kamel Beznia, Ahcène Bounceur, Reinhardt Euler, Salvador Mir A Tool for Analog/RF BIST Evaluation Using Statistical Models of Circuit Parameters. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Naudet Exploiting Pipeline ADC Properties for a Reduced-Code Linearity Test Technique. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Athanasios Dimakos, Martin Andraud, Louay Abdallah, Haralampos-G. D. Stratigopoulos, Emmanuel Simeu, Salvador Mir Test and Calibration of RF Circuits Using Built-in Non-intrusive Sensors. Search on Bibsonomy ISVLSI The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Hervé Le Gall, Rshdee Alhakim, Miroslav Valka, Salvador Mir, Haralampos-G. D. Stratigopoulos, Emmanuel Simeu High frequency jitter estimator for SoCs. Search on Bibsonomy ETS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Richun Fei, Jocelyn Moreau, Salvador Mir, A. Marcellin, C. Mandier, E. Huss, G. Palmigiani, P. Vitrou, Thomas Droniou Horizontal-FPN fault coverage improvement in production test of CMOS imagers. Search on Bibsonomy VTS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Haralampos-G. D. Stratigopoulos, Manuel J. Barragan, Salvador Mir, Hervé Le Gall, Neha Bhargava, Ankur Bal Evaluation of low-cost mixed-signal test techniques for circuits with long simulation times. Search on Bibsonomy ITC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Ayssar Serhan, Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir Low-cost EVM built-in test of RF transceivers. Search on Bibsonomy IDT The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Matthieu Dubois, Haralampos-G. D. Stratigopoulos, Salvador Mir, Manuel J. Barragan Evaluation of digital ternary stimuli for dynamic test of ΣΔ ADCs. Search on Bibsonomy VLSI-SoC The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Matthieu Dubois, Haralampos-G. D. Stratigopoulos, Salvador Mir, Manuel J. Barragan Statistical Evaluation of Digital Techniques for $\sum\varDelta$ ADC BIST. Search on Bibsonomy VLSI-SoC (Selected Papers) The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Guillaume Renaud, Manuel J. Barragan, Salvador Mir, Marc Sabut On-Chip Implementation of an Integrator-Based Servo-Loop for ADC Static Linearity Test. Search on Bibsonomy ATS The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Martin Andraud, Anthony Deluthault, Mouhamadou Dieng, Florence Azaïs, Serge Bernard, Philippe Cauvet, Mariane Comte, Thibault Kervaon, Vincent Kerzerho, Salvador Mir, Paul-Henri Pugliesi-Conti, Michel Renovell, Fabien Soulier, Emmanuel Simeu, Haralampos-G. D. Stratigopoulos Solutions for the self-adaptation of communicating systems in operation. Search on Bibsonomy IOLTS The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Naudet, Gerard Bret Reduced-Code Linearity Testing of Pipeline ADCs. Search on Bibsonomy IEEE Design & Test The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Mohand Bentobache, Ahcène Bounceur, Reinhardt Euler, Yann Kieffer, Salvador Mir New techniques for selecting test frequencies for linear analog circuits. Search on Bibsonomy VLSI-SoC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Mohand Bentobache, Ahcène Bounceur, Reinhardt Euler, Salvador Mir, Yann Kieffer Minimizing Test Frequencies for Linear Analog Circuits: New Models and Efficient Solution Methods. Search on Bibsonomy VLSI-SoC (Selected Papers) The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Mohand Bentobache, Ahcène Bounceur, Reinhardt Euler, Yann Kieffer, Salvador Mir Efficient minimization of test frequencies for linear analog circuits. Search on Bibsonomy ETS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Richun Fei, Jocelyn Moreau, Salvador Mir BIST of interconnection lines in the pixel matrix of CMOS imagers. Search on Bibsonomy IWASI The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Josep Altet Defect-oriented non-intrusive RF test using on-chip temperature sensors. Search on Bibsonomy VTS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Naudet, Gerard Bret Reduced code linearity testing of pipeline adcs in the presence of noise. Search on Bibsonomy VTS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir Fault modeling and diagnosis for nanometric analog circuits. Search on Bibsonomy ITC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir True non-intrusive sensors for RF built-in test. Search on Bibsonomy ITC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Ke Huang, Haralampos-G. D. Stratigopoulos, Louay Abdallah, Salvador Mir, Ahcène Bounceur Multivariate statistical techniques for analog parametric test metrics estimation. Search on Bibsonomy DTIS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Kamel Beznia, Ahcène Bounceur, Salvador Mir, Reinhardt Euler Statistical modelling of analog circuits for test metrics computation. Search on Bibsonomy DTIS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir, Camelia Hora, Yizi Xing, Bram Kruseman Diagnosis of Local Spot Defects in Analog Circuits. Search on Bibsonomy IEEE Trans. Instrumentation and Measurement The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Haralampos-G. D. Stratigopoulos, Salvador Mir Adaptive Alternate Analog Test. Search on Bibsonomy IEEE Design & Test of Computers The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Salvador Mir, Chi-Ying Tsui, Ricardo Reis 0001, Oliver C. S. Choy (eds.) VLSI-SoC: Advanced Research for Systems on Chip - 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers Search on Bibsonomy VLSI-SoC (Selected Papers) The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Josep Altet Testing RF circuits with true non-intrusive built-in sensors. Search on Bibsonomy DATE The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Naudet, Christophe Forel Enhanced reduced code linearity test technique for multi-bit/stage pipeline ADCs. Search on Bibsonomy European Test Symposium The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Kamel Beznia, Ahcène Bounceur, Louay Abdallah, Ke Huang, Salvador Mir, Reinhardt Euler Accurate estimation of analog test metrics with extreme circuits. Search on Bibsonomy ICECS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Nourredine Akkouche, Salvador Mir, Emmanuel Simeu, Mustapha Slamani Analog/RF test ordering in the early stages of production testing. Search on Bibsonomy VTS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Christophe Kelma Experiences with non-intrusive sensors for RF built-in test. Search on Bibsonomy ITC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Ahcène Bounceur, Salvador Mir, Haralampos-G. D. Stratigopoulos Estimation of Analog Parametric Test Metrics Using Copulas. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Christophe Kelma RF Front-End Test Using Built-in Sensors. Search on Bibsonomy IEEE Design & Test of Computers The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Alexios Spyronasios, Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir On Replacing an RF Test with an Alternative Measurement: Theory and a Case Study. Search on Bibsonomy Asian Test Symposium The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir Implicit test of high-speed analog circuits using non-intrusive sensors. Search on Bibsonomy ECCTD The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Fabio Cenni, Jeremie Cazalbou, Salvador Mir, Libor Rufer Design of a SAW-based chemical sensor with its microelectronics front-end interface. Search on Bibsonomy Microelectronics Journal The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Rafik Khereddine, Louay Abdallah, Emmanuel Simeu, Salvador Mir, Fabio Cenni Adaptive Logical Control of RF LNA Performances for Efficient Energy Consumption. Search on Bibsonomy VLSI-SoC (Selected Papers) The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Rafik Khereddine, Louay Abdallah, Emmanuel Simeu, Salvador Mir, Fabio Cenni Adaptive logical control of RF LNA performances for efficient energy consumption. Search on Bibsonomy VLSI-SoC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir Fault diagnosis of analog circuits based on machine learning. Search on Bibsonomy DATE The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Louay Abdallah, Haralampos-G. D. Stratigopoulos, Christophe Kelma, Salvador Mir Sensors for built-in alternate RF test. Search on Bibsonomy European Test Symposium The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Haralampos-G. D. Stratigopoulos, Salvador Mir, Erkan Acar, Sule Ozev Defect filter for alternate RF test. Search on Bibsonomy European Test Symposium The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir Bayesian Fault Diagnosis of RF Circuits Using Nonparametric Density Estimation. Search on Bibsonomy Asian Test Symposium The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Haralampos-G. D. Stratigopoulos, Salvador Mir Analog test metrics estimates with PPM accuracy. Search on Bibsonomy ICCAD The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Nourredine Akkouche, Salvador Mir, Emmanuel Simeu Ordering of analog specification tests based on parametric defect level estimation. Search on Bibsonomy VTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Salvador Mir, Haralampos-G. D. Stratigopoulos, Ahcène Bounceur Density estimation for analog/RF test problem solving. Search on Bibsonomy VTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Gustavo P. Rehder, Salvador Mir, Libor Rufer, Emmanuel Simeu, Hoang Nam Nguyen Low Frequency Test for RF MEMS Switches. Search on Bibsonomy DELTA The full citation details ... 2010 DBLP  DOI  BibTeX  RDF RF MEMS, low frequency test, switch, S-Parameters
1Haralampos-G. D. Stratigopoulos, Salvador Mir, Ahcène Bounceur Evaluation of Analog/RF Test Measurements at the Design Stage. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Achraf Dhayni, Salvador Mir, Libor Rufer, Ahcène Bounceur, Emmanuel Simeu Pseudorandom BIST for test and characterization of linear and nonlinear MEMS. Search on Bibsonomy Microelectronics Journal The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Haralampos-G. D. Stratigopoulos, Salvador Mir, Yiorgos Makris Enrichment of limited training sets in machine-learning-based analog/RF test. Search on Bibsonomy DATE The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Haralampos-G. D. Stratigopoulos, Salvador Mir, Erkan Acar, Sule Ozev Defect Filter for Alternate RF Test. Search on Bibsonomy European Test Symposium The full citation details ... 2009 DBLP  DOI  BibTeX  RDF alternate test, defect filter, density estimation, RF test
1Matthieu Dubois, Haralampos-G. D. Stratigopoulos, Salvador Mir Hierarchical parametric test metrics estimation: A ΣΔ converter BIST case study. Search on Bibsonomy ICCD The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Livier Lizarraga, Salvador Mir, Gilles Sicard Experimental Validation of a BIST Techcnique for CMOS Active Pixel Sensors. Search on Bibsonomy VTS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Rafik Khereddine, Emmanuel Simeu, Salvador Mir Parameter identification of RF transceiver blocks using regressive models. Search on Bibsonomy PDeS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Emmanuel Simeu, Hoang Nam Nguyen, Philippe Cauvet, Salvador Mir, Libor Rufer, Rafik Khereddine Using Signal Envelope Detection for Online and Offline RF MEMS Switch Testing. Search on Bibsonomy VLSI Design The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Haralampos-G. D. Stratigopoulos, Jeanne Tongbong, Salvador Mir A General Method to Evaluate RF BIST Techniques Based on Non-parametric Density Estimation. Search on Bibsonomy DATE The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Ahcène Bounceur, Salvador Mir, Emmanuel Simeu, Luís Rolíndez Estimation of Test Metrics for the Optimisation of Analogue Circuit Testing. Search on Bibsonomy J. Electronic Testing The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Analogue fault simulation, Catastrophic and parametric faults, Process deviations, Analogue test, Statistical modeling
1Giovanni De Micheli, Salvador Mir, Ricardo Reis 0001 (eds.) VLSI-SoC: Research Trends in VLSI and Systems on Chip - Fourteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2006), October 16-18, 2006, Nice, France Search on Bibsonomy VLSI-SoC (Selected Papers) The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Jeanne Tongbong, Salvador Mir, Jean-Louis Carbonéro Interactive presentation: Evaluation of test measures for LNA production testing using a multinormal statistical model. Search on Bibsonomy DATE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Emmanuel Simeu, Salvador Mir, R. Kherreddine, Hoang Nam Nguyen Envelope Detection Based Transition Time Supervision for Online Testing of RF MEMS Switches. Search on Bibsonomy IOLTS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF RF MEMS, capacitive switch, envelope detection, transition time, Online testing, recursive estimation
1Luís Rolíndez, Salvador Mir, Jean-Louis Carbonéro, Dimitri Goguet, Nabil Chouba A stereo audio Σ∑ ADC architecture with embedded SNDR self-test. Search on Bibsonomy ITC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Salvador Mir, Kwang-Ting (Tim) Cheng, Andrew Richardson Guest Editorial. Search on Bibsonomy J. Electronic Testing The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Luís Rolíndez, Salvador Mir, Ahcène Bounceur, Jean-Louis Carbonéro A BIST Scheme for SNDR Testing of SigmaDelta ADCs Using Sine-Wave Fitting. Search on Bibsonomy J. Electronic Testing The full citation details ... 2006 DBLP  DOI  BibTeX  RDF analogue BIST, analogue-to-digital converter, mixed-signal testing, sigma-delta modulation
1Salvador Mir, Libor Rufer, Achraf Dhayni Built-in-self-test techniques for MEMS. Search on Bibsonomy Microelectronics Journal The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Ahcène Bounceur, Salvador Mir, Luís Rolíndez, Emmanuel Simeu CAT Platform for Analogue and Mixed-Signal Test Evaluation and Optimization. Search on Bibsonomy VLSI-SoC (Selected Papers) The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Livier Lizarraga, Salvador Mir, Gilles Sicard, Ahcène Bounceur Study of a BIST Technique for CMOS Active Pixel Sensors. Search on Bibsonomy VLSI-SoC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Ahcène Bounceur, Salvador Mir, Luís Rolíndez, Emmanuel Simeu CAT platform for analogue and mixed-signal test evaluation and optimization. Search on Bibsonomy VLSI-SoC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Achraf Dhayni, Salvador Mir, Libor Rufer, Ahcène Bounceur Pseudorandom functional BIST for linear and nonlinear MEMS. Search on Bibsonomy DATE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Luís Rolíndez, Salvador Mir, Ahcène Bounceur, Jean-Louis Carbonéro A SNDR BIST for Sigma-Delta Analogue-to-Digital Converters. Search on Bibsonomy VTS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Libor Rufer, Salvador Mir, Emmanuel Simeu, C. Domingues On-Chip Pseudorandom MEMS Testing. Search on Bibsonomy J. Electronic Testing The full citation details ... 2005 DBLP  DOI  BibTeX  RDF BIST, pseudorandom sequences, impulse response, MEMS testing
1Guillaume Prenat, Salvador Mir, Diego Vázquez, Luís Rolíndez A low-cost digital frequency testing approach for mixed-signal devices using SigmaDelta modulation. Search on Bibsonomy Microelectronics Journal The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Bozena Kaminska, Stephen K. Sunter, Salvador Mir Analog and mixed signal test techniques for SOC development. Search on Bibsonomy Microelectronics Journal The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Achraf Dhayni, Salvador Mir, Libor Rufer, Ahcène Bounceur On-chip Pseudorandom Testing for Linear and Nonlinear MEMS. Search on Bibsonomy VLSI-SoC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Rabeb Kheriji, V. Danelon, Jean-Louis Carbonéro, Salvador Mir Optimising Test Sets for a Low Noise Amplifier with a Defect-Oriented Approach. Search on Bibsonomy DATE The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Achraf Dhayni, Salvador Mir, Libor Rufer Evaluation of impulse response-based BIST techniques for MEMS in the presence of weak nonlinearities. Search on Bibsonomy European Test Symposium The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Luís Rolíndez, Salvador Mir, Guillaume Prenat, Ahcène Bounceur A 0.18 µm CMOS Implementation of On-chip Analogue Test Signal Generation from Digital Test Patterns. Search on Bibsonomy DATE The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
1Achraf Dhayni, Salvador Mir, Libor Rufer Mems built-in-self-test using MLS. Search on Bibsonomy European Test Symposium The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
1Salvador Mir, Benoît Charlot, Libor Rufer, Bernard Courtois On-chip testing of embedded silicon transducers. Search on Bibsonomy SoCC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
1Salvador Mir, Libor Rufer, Bernard Courtois On-chip testing of embedded transducers. Search on Bibsonomy VLSI Design The full citation details ... 2004 DBLP  DOI  BibTeX  RDF failure mechanisms, A-HDL, fault modeling, fault simulation, defects, MEMS, self-test
1C. Roman, Salvador Mir, Benoît Charlot Building an analogue fault simulation tool and its application to MEMS. Search on Bibsonomy Microelectronics Journal The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Salvador Mir, Luís Rolíndez, Christian Domigues, Libor Rufer An implementation of memory-based on-chip analogue test signal generation. Search on Bibsonomy ASP-DAC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Mohammad A. Naal, Emmanuel Simeu, Salvador Mir On-Line Testable Decimation Filter Design for AMS Systems. Search on Bibsonomy IOLTS The full citation details ... 2003 DBLP  DOI  BibTeX  RDF non-concurrent, semi-concurrent, SigmaDelta, decimation filters, analogue BIST, on-line testing
1Salvador Mir, H. Bederr, R. D. (Shawn) Blanton, Hans G. Kerkhoff, H. J. Klim SoCs with MEMS? Can We Include MEMS in the SoCs Design and Test Flow? Search on Bibsonomy VTS The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
1Benoît Charlot, Salvador Mir, Fabien Parrain, Bernard Courtois Generation of Electrically Induced Stimuli for MEMS Self-Test. Search on Bibsonomy J. Electronic Testing The full citation details ... 2001 DBLP  DOI  BibTeX  RDF MEMS test case-studies, MEMS failure mechanisms, BIST, self-test
1Benoît Charlot, Salvador Mir, Fabien Parrain, Bernard Courtois Electrically Induced Stimuli For MEMS Self-Test. Search on Bibsonomy VTS The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
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