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Publications of "Sudhakar M. Reddy" ( http://dblp.L3S.de/Authors/Sudhakar_M._Reddy )

URL (Homepage):  http://www.engineering.uiowa.edu/faculty-staff/profile-directory/ece/reddy_s.php  Author page on DBLP  Author page in RDF  Community of Sudhakar M. Reddy in ASPL-2

Publication years (Num. hits)
1968-1972 (19) 1973-1978 (16) 1980-1985 (16) 1986-1988 (16) 1989-1991 (22) 1992-1993 (32) 1994 (19) 1995 (18) 1996 (20) 1997 (22) 1998 (25) 1999 (22) 2000 (25) 2001 (25) 2002 (33) 2003 (36) 2004 (26) 2005 (30) 2006 (25) 2007 (25) 2008 (29) 2009 (31) 2010 (31) 2011 (23) 2012-2014 (18) 2015-2017 (16) 2018-2019 (8)
Publication types (Num. hits)
article(219) inproceedings(409)
GrowBag graphs for keyword ? (Num. hits/coverage)

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The graphs summarize 328 occurrences of 147 keywords

Results
Found 629 publication records. Showing 628 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Naixing Wang, Irith Pomeranz, Sudhakar M. Reddy, Arani Sinha, Srikanth Venkataraman Resynthesis for Avoiding Undetectable Faults Based on Design-for-Manufacturability Guidelines. Search on Bibsonomy DATE The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Cheng-Hung Wu, Sheng-Lin Lin, Kuen-Jong Lee, Sudhakar M. Reddy A Repair-for-Diagnosis Methodology for Logic Circuits. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jan Burchard, Dominik Erb, Sudhakar M. Reddy, Adit D. Singh, Bernd Becker 0001 On the Generation of Waveform-Accurate Hazard and Charge-Sharing Aware Tests for Transistor Stuck-Off Faults in CMOS Logic Circuits. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Daniele Rossi 0001, Vasileios Tenentes, Sudhakar M. Reddy, Bashir M. Al-Hashimi, Andrew Brown Exploiting Aging Benefits for the Design of Reliable Drowsy Cache Memories. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yingdi Liu, Janusz Rajski, Sudhakar M. Reddy, Jedrzej Solecki, Jerzy Tyszer Staggered ATPG with capture-per-cycle observation test points. Search on Bibsonomy VTS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Daniele Rossi 0001, Vasileios Tenentes, S. Saqib Khursheed, Sudhakar M. Reddy Recycled IC detection through aging sensor. Search on Bibsonomy ETS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yingdi Liu, Nilanjan Mukherjee 0001, Janusz Rajski, Sudhakar M. Reddy, Jerzy Tyszer Deterministic Stellar BIST for In-System Automotive Test. Search on Bibsonomy ITC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yi-Cheng Kung, Kuen-Jong Lee, Sudhakar M. Reddy Generating Compact Test Patterns for DC and AC Faults Using One ATPG Run. Search on Bibsonomy ITC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Cesar Acero, Derek Feltham, Yingdi Liu, Elham K. Moghaddam, Nilanjan Mukherjee 0001, Marek Patyra, Janusz Rajski, Sudhakar M. Reddy, Jerzy Tyszer, Justyna Zawada Embedded Deterministic Test Points. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Pascal Raiola, Dominik Erb, Sudhakar M. Reddy, Bernd Becker 0001 Accurate Diagnosis of Interconnect Open Defects Based on the Robust Enhanced Aggressor Victim Model. Search on Bibsonomy VLSI Design The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Jan Burchard, Dominik Erb, Adit D. Singh, Sudhakar M. Reddy, Bernd Becker 0001 Fast and waveform-accurate hazard-aware SAT-based TSOF ATPG. Search on Bibsonomy DATE The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Jan Burchard, Dominik Erb, Sudhakar M. Reddy, Adit D. Singh, Bernd Becker 0001 Efficient SAT-based generation of hazard-activated TSOF tests. Search on Bibsonomy VTS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Wu-Tung Cheng, Randy Klingenberg, Brady Benware, Wu Yang, Manish Sharma, Geir Eide, Yue Tian, Sudhakar M. Reddy, Yan Pan, Sherwin Fernandes, Atul Chittora Automatic Identification of Yield Limiting Layout Patterns Using Root Cause Deconvolution on Volume Scan Diagnosis Data. Search on Bibsonomy ATS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Wu-Tung Cheng, Yue Tian, Sudhakar M. Reddy Volume diagnosis data mining. Search on Bibsonomy ETS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Xijiang Lin, Sudhakar M. Reddy, Wu-Tung Cheng On Achieving Maximal Chain Diagnosis Resolution through Test Pattern Selection. Search on Bibsonomy ATS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy On the Switching Activity in Faulty Circuits During Test Application. Search on Bibsonomy ATS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Xijiang Lin, Sudhakar M. Reddy, Janusz Rajski Transistor stuck-on fault detection tests for digital CMOS circuits. Search on Bibsonomy ETS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Yingdi Liu, Elham K. Moghaddam, Nilanjan Mukherjee 0001, Sudhakar M. Reddy, Janusz Rajski, Jerzy Tyszer Minimal area test points for deterministic patterns. Search on Bibsonomy ITC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Amit Kumar 0004, Mark Kassab, Elham K. Moghaddam, Nilanjan Mukherjee 0001, Janusz Rajski, Sudhakar M. Reddy, Jerzy Tyszer, Chen Wang 0014 Isometric Test Data Compression. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Xijiang Lin, Sudhakar M. Reddy, Janusz Rajski Using Boolean Tests to Improve Detection of Transistor Stuck-Open Faults in CMOS Digital Logic Circuits. Search on Bibsonomy VLSI Design The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Wu-Tung Cheng, Sudhakar M. Reddy Embedded Tutorial ET2: Volume Diagnosis for Yield Improvement. Search on Bibsonomy VLSI Design The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Andreas Riefert, Matthias Sauer 0002, Sudhakar M. Reddy, Bernd Becker 0001 Improving diagnosis resolution of a fault detection test set. Search on Bibsonomy VTS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Dominik Erb, Karsten Scheibler, Matthias Sauer 0002, Sudhakar M. Reddy, Bernd Becker 0001 Multi-cycle Circuit Parameter Independent ATPG for interconnect open defects. Search on Bibsonomy VTS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Xijiang Lin, Sudhakar M. Reddy On generating high quality tests based on cell functions. Search on Bibsonomy ITC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Sudhakar M. Reddy, Zhuo Zhang On achieving minimal size test sets for scan designs. Search on Bibsonomy it - Information Technology The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Matthias Sauer 0002, Sven Reimer, Sudhakar M. Reddy, Bernd Becker 0001 Efficient SAT-Based Circuit Initialization for Larger Designs. Search on Bibsonomy VLSI Design The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Sharada Jha, Kameshwar Chandrasekar, Weixin Wu, Ramesh Sharma, Sanjay Sengupta, Sudhakar M. Reddy A Cube-Aware Compaction Method for Scan ATPG. Search on Bibsonomy VLSI Design The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Alexander Czutro, Sudhakar M. Reddy, Ilia Polian, Bernd Becker 0001 SAT-Based Test Pattern Generation with Improved Dynamic Compaction. Search on Bibsonomy VLSI Design The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Dominik Erb, Karsten Scheibler, Matthias Sauer 0002, Sudhakar M. Reddy, Bernd Becker 0001 Circuit Parameter Independent Test Pattern Generation for Interconnect Open Defects. Search on Bibsonomy ATS The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Amit Kumar 0004, Mark Kassab, Elham K. Moghaddam, Nilanjan Mukherjee 0001, Janusz Rajski, Sudhakar M. Reddy, Jerzy Tyszer, Chen Wang 0014 Isometric test compression with low toggling activity. Search on Bibsonomy ITC The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Yu Huang, Xiaoxin Fan, Huaxing Tang, Manish Sharma, Wu-Tung Cheng, Brady Benware, Sudhakar M. Reddy Distributed dynamic partitioning based diagnosis of scan chain. Search on Bibsonomy VTS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Amit Kumar 0004, Janusz Rajski, Sudhakar M. Reddy, Thomas Rinderknecht On the Generation of Compact Deterministic Test Sets for BIST Ready Designs. Search on Bibsonomy Asian Test Symposium The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Amit Kumar 0004, Janusz Rajski, Sudhakar M. Reddy, Chen Wang 0014 On the generation of compact test sets. Search on Bibsonomy ITC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Resolution of Diagnosis Based on Transition Faults. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Reset and partial-reset-based functional broadside tests. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Matthias Sauer 0002, Stefan Kupferschmid, Alejandro Czutro, Sudhakar M. Reddy, Bernd Becker 0001 Analysis of Reachable Sensitisable Paths in Sequential Circuits with SAT and Craig Interpolation. Search on Bibsonomy VLSI Design The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Amit Kumar 0004, Sudhakar M. Reddy, Bernd Becker 0001, Irith Pomeranz Performance aware partitioning for 3D-SOCs. Search on Bibsonomy ISOCC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Amit Kumar 0004, Sudhakar M. Reddy, Irith Pomeranz, Bernd Becker 0001 TSV and DFT cost aware circuit partitioning for 3D-SOCs. Search on Bibsonomy ISQED The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Xiaoxin Fan, Manish Sharma, Wu-Tung Cheng, Sudhakar M. Reddy Diagnosis of Cell Internal Defects with Multi-cycle Test Patterns. Search on Bibsonomy Asian Test Symposium The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Xiaoqing Wen, Sudhakar M. Reddy Session Summary III: Power-Aware Testing: Present and Future. Search on Bibsonomy Asian Test Symposium The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Matthias Sauer 0002, Stefan Kupferschmid, Alexander Czutro, Ilia Polian, Sudhakar M. Reddy, Bernd Becker 0001 Functional test of small-delay faults using SAT and Craig interpolation. Search on Bibsonomy ITC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Xiaoxin Fan, Huaxing Tang, Yu Huang, Wu-Tung Cheng, Sudhakar M. Reddy, Brady Benware Improved volume diagnosis throughput using dynamic design partitioning. Search on Bibsonomy ITC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Transparent-Segmented-Scan without the Routing Overhead of Segmented-Scan. Search on Bibsonomy J. Low Power Electronics The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy On Functional Broadside Tests With Functional Propagation Conditions. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Static Test Data Volume Reduction Using Complementation or Modulo- M Addition. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Input Necessary Assignments for Testing of Path Delay Faults in Standard-Scan Circuits. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Fixed-State Tests for Delay Faults in Scan Designs. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Reducing the Storage Requirements of a Test Sequence by Using One or Two Background Vectors. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Test Strength: A Quality Metric for Transition Fault Tests in Full-Scan Circuits. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Broadside and Functional Broadside Tests for Partial-Scan Circuits. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Sizes of test sets for path delay faults using strong and weak non-robust tests. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Two-dimensional partially functional broadside tests. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Primary input cones based on test sequences in synchronous sequential circuits. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Ranking of input cubes based on their lingering synchronisation effects and their use in random sequential test generation. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Ilia Polian, John P. Hayes, Sudhakar M. Reddy, Bernd Becker 0001 Modeling and Mitigating Transient Errors in Logic Circuits. Search on Bibsonomy IEEE Trans. Dependable Sec. Comput. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Reducing the switching activity of test sequences under transparent-scan. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Xiaoxin Fan, Sudhakar M. Reddy, Senling Wang, Seiji Kajihara, Yasuo Sato Genetic algorithm based approach for segmented testing. Search on Bibsonomy DSN Workshops The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Xun Tang, Wu-Tung Cheng, Ruifeng Guo, Huaxing Tang, Sudhakar M. Reddy Diagnosis of Multiple Faults Based on Fault-Tuple Equivalence Tree. Search on Bibsonomy DFT The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1J. M. Howard, Sudhakar M. Reddy, Irith Pomeranz, Bernd Becker 0001 Fault diagnosis aware ATE assisted test response compaction. Search on Bibsonomy ASP-DAC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Amit Kumar 0004, Sudhakar M. Reddy, Irith Pomeranz, Bernd Becker 0001 Hyper-graph based partitioning to reduce DFT cost for pre-bond 3D-IC testing. Search on Bibsonomy DATE The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Elham K. Moghaddam, Janusz Rajski, Sudhakar M. Reddy, Jakub Janicki Low Test Data Volume Low Power At-Speed Delay Tests Using Clock-Gating. Search on Bibsonomy Asian Test Symposium The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Shida Zhong, S. Saqib Khursheed, Bashir M. Al-Hashimi, Sudhakar M. Reddy, Krishnendu Chakrabarty Analysis of Resistive Bridge Defect Delay Behavior in the Presence of Process Variation. Search on Bibsonomy Asian Test Symposium The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Xiaoxin Fan, Huaxing Tang, Sudhakar M. Reddy, Wu-Tung Cheng, Brady Benware On Using Design Partitioning to Reduce Diagnosis Memory Footprint. Search on Bibsonomy Asian Test Symposium The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Xiaoxin Fan, Sudhakar M. Reddy, Irith Pomeranz Max-Fill: A method to generate high quality delay tests. Search on Bibsonomy DDECS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Janusz Rajski, Elham K. Moghaddam, Sudhakar M. Reddy Low power compression utilizing clock-gating. Search on Bibsonomy ITC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Test Sequences with Reduced and Increased Switching Activity. Search on Bibsonomy J. Low Power Electronics The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Robust Fault Models Where Undetectable Faults Imply Logic Redundancy. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Hazard-Based Detection Conditions for Improved Transition Fault Coverage of Scan-Based Tests. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Selection of a Fault Model for Fault Diagnosis Based on Unique Responses. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Switching Activity as a Test Compaction Heuristic for Transition Faults. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Path Selection for Transition Path Delay Faults. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Diagnosis of path delay faults based on low-coverage tests. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Static test compaction for diagnostic test sets of full-scan circuits. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Equivalence, Dominance, and Similarity Relations between Fault Pairs and a Fault Pair Collapsing Process for Fault Diagnosis. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2010 DBLP  DOI  BibTeX  RDF Diagnostic fault simulation, diagnostic test generation, fault diagnosis, fault collapsing, fault equivalence, fault dominance
1Alejandro Czutro, Ilia Polian, Matthew D. T. Lewis, Piet Engelke, Sudhakar M. Reddy, Bernd Becker 0001 Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability Analysis. Search on Bibsonomy International Journal of Parallel Programming The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy On Clustering of Undetectable Single Stuck-At Faults and Test Quality in Full-Scan Circuits. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy TOV: Sequential Test Generation by Ordering of Test Vectors. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy On Undetectable Faults and Fault Diagnosis. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Hazard-Based Detection Conditions for Improved Transition Path Delay Fault Coverage. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy On Test Generation With Test Vector Improvement. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Output-Dependent Diagnostic Test Generation. Search on Bibsonomy VLSI Design The full citation details ... 2010 DBLP  DOI  BibTeX  RDF diagnostic test generation, stuck-at faults, full-scan circuits
1Irith Pomeranz, Sudhakar M. Reddy Identifying Tests for Logic Fault Models Involving Subsets of Lines without Fault Enumeration. Search on Bibsonomy VLSI Design The full citation details ... 2010 DBLP  DOI  BibTeX  RDF interconnect open faults, test generation, bridging faults, static test compaction
1Irith Pomeranz, Sudhakar M. Reddy Gradual Diagnostic Test Generation Based on the Structural Distance between Indistinguished Fault Pairs. Search on Bibsonomy DFT The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Bo Yao, Irith Pomeranz, Sudhakar M. Reddy Deterministic broadside test generation for transition path delay faults. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF broadside test, deterministic test generation, path delay fault, transition fault
1Irith Pomeranz, Sudhakar M. Reddy Functional and partially-functional skewed-load tests. Search on Bibsonomy ASP-DAC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Reducing the storage requirements of a test sequence by using a background vector. Search on Bibsonomy DATE The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy On reset based functional broadside tests. Search on Bibsonomy DATE The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Forming multi-cycle tests for delay faults by concatenating broadside tests. Search on Bibsonomy VTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Elham K. Moghaddam, Janusz Rajski, Sudhakar M. Reddy, Mark Kassab At-speed scan test with low switching activity. Search on Bibsonomy VTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy On multiple bridging faults. Search on Bibsonomy VTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Selecting state variables for improved on-line testability through output response comparison of identical circuits. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy On Bias in Transition Coverage of Test Sets for Path Delay Faults. Search on Bibsonomy Asian Test Symposium The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Xun Tang, Wu-Tung Cheng, Ruifeng Guo, Sudhakar M. Reddy Diagnosis of Multiple Physical Defects Using Logic Fault Models. Search on Bibsonomy Asian Test Symposium The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Input test data volume reduction based on test vector chains. Search on Bibsonomy European Test Symposium The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Elham K. Moghaddam, Janusz Rajski, Sudhakar M. Reddy, Xijiang Lin, Nilanjan Mukherjee 0001, Mark Kassab Low capture power at-speed test in EDT environment. Search on Bibsonomy ITC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Narendra Devta-Prasanna, Arun Gunda, Sudhakar M. Reddy, Irith Pomeranz Multiple fault activation cycle tests for transistor stuck-open faults. Search on Bibsonomy ITC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Random Test Generation With Input Cube Avoidance. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Test compaction methods for transition faults under transparent-scan. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Same/different fault dictionary: an extended pass/fail fault dictionary with improved diagnostic resolution. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Test vector chains for increasing the fault coverage and numbers of detections. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
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