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Publications of "Walid A. Najjar" ( http://dblp.L3S.de/Authors/Walid_A._Najjar )

URL (Homepage):  http://www.cs.ucr.edu/~najjar/  Author page on DBLP  Author page in RDF  Community of Walid A. Najjar in ASPL-2

Publication years (Num. hits)
1987-1993 (15) 1994-1997 (17) 1999-2001 (15) 2002-2004 (18) 2005-2006 (21) 2007-2009 (19) 2010-2013 (16) 2014-2016 (16) 2017-2019 (5)
Publication types (Num. hits)
article(39) incollection(2) inproceedings(95) proceedings(6)
Venues (Conferences, Journals, ...)
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The graphs summarize 106 occurrences of 63 keywords

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Found 143 publication records. Showing 142 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Prerna Budhkar, Ildar Absalyamov, Vasileios Zois, Skyler Windh, Walid A. Najjar, Vassilis J. Tsotras Accelerating In-Memory Database Selections Using Latency Masking Hardware Threads. Search on Bibsonomy TACO The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Vasileios Zois, Vassilis J. Tsotras, Walid A. Najjar Efficient Main-Memory Top-K Selection For Multicore Architectures. Search on Bibsonomy PVLDB The full citation details ... 2019 DBLP  BibTeX  RDF
1Shafiur Rahman, Nael B. Abu-Ghazaleh, Walid A. Najjar PDES-A: Accelerators for Parallel Discrete Event Simulation Implemented on FPGAs. Search on Bibsonomy ACM Trans. Model. Comput. Simul. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Vasileios Zois, Divya Gupta, Vassilis J. Tsotras, Walid A. Najjar, Jean-François Roy Massively parallel skyline computation for processing-in-memory architectures. Search on Bibsonomy PACT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Shafiur Rahman, Nael B. Abu-Ghazaleh, Walid A. Najjar PDES-A: a Parallel Discrete Event Simulation Accelerator for FPGAs. Search on Bibsonomy SIGSIM-PADS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Walid A. Najjar, Jason R. Villarreal, Robert J. Halstead ROCCC 2.0. Search on Bibsonomy FPGAs for Software Programmers The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Walid A. Najjar, Andreas Gerstlauer (eds.) International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS 2016, Agios Konstantinos, Samos Island, Greece, July 17-21, 2016 Search on Bibsonomy SAMOS The full citation details ... 2016 DBLP  BibTeX  RDF
1Paolo Ienne, Walid A. Najjar, Jason Anderson, Philip Brisk, Walter Stechele Preface. Search on Bibsonomy FPL The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Xiaoyin Ma, Jose Rodriguez Borbon, Walid A. Najjar, Amit K. Roy-Chowdhury Optimizing hardware design for Human Action Recognition. Search on Bibsonomy FPL The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Paolo Ienne, Walid A. Najjar, Jason Anderson, Philip Brisk, Walter Stechele (eds.) 26th International Conference on Field Programmable Logic and Applications, FPL 2016, Lausanne, Switzerland, August 29 - September 2, 2016 Search on Bibsonomy FPL The full citation details ... 2016 DBLP  BibTeX  RDF
1Ildar Absalyamov, Prerna Budhkar, Skyler Windh, Robert J. Halstead, Walid A. Najjar, Vassilis J. Tsotras FPGA-accelerated group-by aggregation using synchronizing caches. Search on Bibsonomy DaMoN The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Roger Moussalli, Ildar Absalyamov, Marcos R. Vieira, Walid A. Najjar, Vassilis J. Tsotras High performance FPGA and GPU complex pattern matching over spatio-temporal streams. Search on Bibsonomy GeoInformatica The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Edward B. Fernandez, Jason R. Villarreal, Stefano Lonardi, Walid A. Najjar FHAST: FPGA-Based Acceleration of Bowtie in Hardware. Search on Bibsonomy IEEE/ACM Trans. Comput. Biology Bioinform. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Xiaoyin Ma, Walid A. Najjar, Amit K. Roy-Chowdhury Evaluation and Acceleration of High-Throughput Fixed-Point Object Detection on FPGAs. Search on Bibsonomy IEEE Trans. Circuits Syst. Video Techn. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Skyler Windh, Xiaoyin Ma, Robert J. Halstead, Prerna Budhkar, Zabdiel Luna, Omar Hussaini, Walid A. Najjar High-Level Language Tools for Reconfigurable Computing. Search on Bibsonomy Proceedings of the IEEE The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Robert J. Halstead, Ildar Absalyamov, Walid A. Najjar, Vassilis J. Tsotras FPGA-based Multithreading for In-Memory Hash Joins. Search on Bibsonomy CIDR The full citation details ... 2015 DBLP  BibTeX  RDF
1Skyler Windh, Prerna Budhkar, Walid A. Najjar CAMs as Synchronizing Caches for Multithreaded Irregular Applications on FPGAs. Search on Bibsonomy ICCAD The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Walid A. Najjar, Paolo Ienne Reconfigurable Computing. Search on Bibsonomy IEEE Micro The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Roger Moussalli, Mariam Salloum, Robert J. Halstead, Walid A. Najjar, Vassilis J. Tsotras A study on parallelizing XML path filtering using accelerators. Search on Bibsonomy ACM Trans. Embedded Comput. Syst. The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Robert J. Halstead, Jason R. Villarreal, Walid A. Najjar Compiling irregular applications for reconfigurable systems. Search on Bibsonomy IJHPCN The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Xiaoyin Ma, Walid A. Najjar, Amit K. Roy-Chowdhury High-Throughput Fixed-Point Object Detection on FPGAs. Search on Bibsonomy FCCM The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Roger Moussalli, Walid A. Najjar, Xi Luo, Amna Khan A High Throughput No-Stall Golomb-Rice Hardware Decoder. Search on Bibsonomy FCCM The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Robert J. Halstead, Walid A. Najjar Compiled multithreaded data paths on FPGAs for dynamic workloads. Search on Bibsonomy CASES The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Xi Luo, Walid A. Najjar, Vagelis Hristidis Efficient near-duplicate document detection using FPGAs. Search on Bibsonomy BigData The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Roger Moussalli, Marcos R. Vieira, Walid A. Najjar, Vassilis J. Tsotras Stream-Mode FPGA Acceleration of Complex Pattern Trajectory Querying. Search on Bibsonomy SSTD The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Walid A. Najjar, Jason R. Villarreal FPGA code accelerators - the compiler perspective. Search on Bibsonomy DAC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Ildar Absalyamov, Roger Moussalli, Vassilis J. Tsotras, Walid A. Najjar High-Performance XML Twig Filtering using GPUs. Search on Bibsonomy ADMS@VLDB The full citation details ... 2013 DBLP  BibTeX  RDF
1Edward Fernandez, Walid A. Najjar, Stefano Lonardi, Jason R. Villarreal Multithreaded FPGA acceleration of DNA sequence mapping. Search on Bibsonomy HPEC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Roger Moussalli, Mariam Salloum, Walid A. Najjar, Vassilis J. Tsotras Massively parallel XML twig filtering using dynamic programming on FPGAs. Search on Bibsonomy ICDE The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Edward Fernandez, Walid A. Najjar, Stefano Lonardi String Matching in Hardware Using the FM-Index. Search on Bibsonomy FCCM The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Robert J. Halstead, Jason R. Villarreal, Walid A. Najjar Exploring irregular memory accesses on FPGAs. Search on Bibsonomy IA3@SC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Roger Moussalli, Robert J. Halstead, Mariam Salloum, Walid A. Najjar, Vassilis J. Tsotras Efficient XML Path Filtering Using GPUs. Search on Bibsonomy ADMS@VLDB The full citation details ... 2011 DBLP  BibTeX  RDF
1Betul Buyukkurt, John Cortes, Jason R. Villarreal, Walid A. Najjar Impact of high-level transformations within the ROCCC framework. Search on Bibsonomy TACO The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Doruk Sart, Abdullah Mueen, Walid A. Najjar, Eamonn J. Keogh, Vit Niennattrakul Accelerating Dynamic Time Warping Subsequence Search with GPUs and FPGAs. Search on Bibsonomy ICDM The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Edward Fernandez, Walid A. Najjar, Elena Yavorska Harris, Stefano Lonardi Exploration of Short Reads Genome Mapping in Hardware. Search on Bibsonomy FPL The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Jason R. Villarreal, Adrian Park 0002, Walid A. Najjar, Robert J. Halstead Designing Modular Hardware Accelerators in C with ROCCC 2.0. Search on Bibsonomy FCCM The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Roger Moussalli, Mariam Salloum, Walid A. Najjar, Vassilis J. Tsotras Accelerating XML Query Matching through Custom Stack Generation on FPGAs. Search on Bibsonomy HiPEAC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Walid A. Najjar Tunable and Energy Efficient Bus Encoding Techniques. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Walid A. Najjar Energy-efficient encoding techniques for off-chip data buses. Search on Bibsonomy ACM Trans. Embedded Comput. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Low-power data buses, bus switching, internal capacitances, encoding
1Abhishek Mitra, Marcos R. Vieira, Petko Bakalov, Walid A. Najjar, Vassilis J. Tsotras Boosting XML Filtering with a Scalable FPGA-based Architecture Search on Bibsonomy CoRR The full citation details ... 2009 DBLP  BibTeX  RDF
1Walid A. Najjar, Jason R. Villarreal Reconfigurable Computing in the New Age of Parallelism. Search on Bibsonomy SAMOS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF FPGAs, Reconfigurable computing
1Walid A. Najjar, Michael J. Schulte (eds.) Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2009), Samos, Greece, July 20-23, 2009 Search on Bibsonomy ICSAMOS The full citation details ... 2009 DBLP  BibTeX  RDF
1Abhishek Mitra, Marcos R. Vieira, Petko Bakalov, Vassilis J. Tsotras, Walid A. Najjar Boosting XML filtering through a scalable FPGA-based architecture. Search on Bibsonomy CIDR The full citation details ... 2009 DBLP  BibTeX  RDF
1Zhi Guo, Betul Buyukkurt, John Cortes, Abhishek Mitra, Walid A. Najjar A Compiler Intermediate Representation for Reconfigurable Fabrics. Search on Bibsonomy International Journal of Parallel Programming The full citation details ... 2008 DBLP  DOI  BibTeX  RDF FPGA, VHDL, Configurable computing, Intermediate representation
1Michael J. Wirthlin, Daniel S. Poznanovic, P. Sundararajan, Alan J. Coppola, D. Pellerin, Walid A. Najjar, R. Bruce, M. Babst, O. Pritchard, Paolo Palazzari, Georgi Kuzmanov OpenFPGA CoreLib core library interoperability effort. Search on Bibsonomy Parallel Computing The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Zhi Guo, Walid A. Najjar, Betul Buyukkurt Efficient hardware code generation for FPGAs. Search on Bibsonomy TACO The full citation details ... 2008 DBLP  DOI  BibTeX  RDF FPGA, high-level synthesis, VHDL, Reconfigurable computing, data reuse
1Walid A. Najjar, Holger Blume (eds.) Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2008), Samos, Greece, July 21-24, 2008 Search on Bibsonomy ICSAMOS The full citation details ... 2008 DBLP  BibTeX  RDF
1Betul Buyukkurt, Walid A. Najjar Compiler generated systolic arrays for wavefront algorithm acceleration on FPGAs. Search on Bibsonomy FPL The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Jason R. Villarreal, Walid A. Najjar Compiled hardware acceleration of Molecular Dynamics code. Search on Bibsonomy FPL The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Zhi Guo, Betul Buyukkurt, Walid A. Najjar, Kees A. Vissers Optimized Generation of Data-Path from C Codes for FPGAs Search on Bibsonomy CoRR The full citation details ... 2007 DBLP  BibTeX  RDF
1Ann Gordon-Ross, Pablo Viana, Frank Vahid, Walid A. Najjar, Edna Barros A one-shot configurable-cache tuner for improved energy and performance. Search on Bibsonomy DATE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Kai Schleupen, Scott Lekuch, Ryan Mannion, Zhi Guo, Walid A. Najjar, Frank Vahid Dynamic Partial FPGA Reconfiguration in a Prototype Microprocessor System. Search on Bibsonomy FPL The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Koen Bertels, Walid A. Najjar, Arjan J. van Genderen, Stamatis Vassiliadis (eds.) FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007 Search on Bibsonomy FPL The full citation details ... 2007 DBLP  BibTeX  RDF
1Walid A. Najjar Compiling code accelerators for FPGAs. Search on Bibsonomy CODES+ISSS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Walid A. Najjar Compiling code accelerators for FPGAs. Search on Bibsonomy CASES The full citation details ... 2007 DBLP  DOI  BibTeX  RDF FPGA code acceleration
1Abhishek Mitra, Walid A. Najjar, Laxmi N. Bhuyan Compiling PCRE to FPGA for accelerating SNORT IDS. Search on Bibsonomy ANCS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF deep payload inspection, nondeterministic nite automata, intrusion detection system, regular expressions
1Dhananjay Kulkarni, Walid A. Najjar, Robert Rinker, Fadi J. Kurdahi Compile-time area estimation for LUT-based FPGAs. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Reconfigurable computing, compiler optimization, resource estimation
1Song Lin, Demetrios Zeinalipour-Yazti, Vana Kalogeraki, Dimitrios Gunopulos, Walid A. Najjar Efficient indexing data structures for flash-based sensor devices. Search on Bibsonomy TOS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Wireless sensor networks, flash memory, access methods
1Zhi Guo, Walid A. Najjar A Compiler Intermediate Representation for Reconfigurable Fabrics. Search on Bibsonomy FPL The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Zhi Guo, Abhishek Mitra, Walid A. Najjar Automation of IP Core Interface Generation for Reconfigurable Computing. Search on Bibsonomy FPL The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Dinesh C. Suresh, Zhi Guo, Betul Buyukkurt, Walid A. Najjar Automatic Compilation Framework for Bloom Filter Based Intrusion Detection. Search on Bibsonomy ARC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Betul Buyukkurt, Zhi Guo, Walid A. Najjar Impact of Loop Unrolling on Area, Throughput and Clock Frequency in ROCCC: C to VHDL Compiler for FPGAs. Search on Bibsonomy ARC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Greg Stitt, Frank Vahid, Walid A. Najjar A code refinement methodology for performance-improved synthesis from C. Search on Bibsonomy ICCAD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF code refinement, coding guidelines, FPGA, embedded systems, compilation, synthesis, hardware/software partitioning
1Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A. Najjar Dynamic Co-Processor Architecture for Software Acceleration on CSoCs. Search on Bibsonomy ICCD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Chuanjun Zhang, Frank Vahid, Jun Yang 0002, Walid A. Najjar A way-halting cache for low-energy high-performance systems. Search on Bibsonomy TACO The full citation details ... 2005 DBLP  DOI  BibTeX  RDF embedded systems, low power, Cache, dynamic optimization, low energy
1Chuanjun Zhang, Frank Vahid, Walid A. Najjar A highly configurable cache for low energy embedded systems. Search on Bibsonomy ACM Trans. Embedded Comput. Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF embedded systems, low power, Cache, microprocessor, configurable, memory hierarchy, low energy, architecture tuning
1Dinesh C. Suresh, Walid A. Najjar, Jun Yang 0002 Power Efficient Instruction Caches for Embedded Systems. Search on Bibsonomy SAMOS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Anirban Banerjee, Anirban Mitra, Walid A. Najjar Splitting the sensor node. Search on Bibsonomy SenSys The full citation details ... 2005 DBLP  DOI  BibTeX  RDF high capacity storage, split-architecture, performance, sensors
1Demetrios Zeinalipour-Yazti, Vana Kalogeraki, Dimitrios Gunopulos, Walid A. Najjar Data Acquisition in Sensor Networks with Large Memories. Search on Bibsonomy ICDE Workshops The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Greg Stitt, Zhi Guo, Walid A. Najjar, Frank Vahid Techniques for synthesizing binaries to an advanced register/memory structure. Search on Bibsonomy FPGA The full citation details ... 2005 DBLP  DOI  BibTeX  RDF smart buffers, FPGA, embedded systems, synthesis, decompilation, binaries
1Zhi Guo, Betul Buyukkurt, Walid A. Najjar, Kees A. Vissers Optimized Generation of Data-Path from C Codes for FPGAs. Search on Bibsonomy DATE The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Demetrios Zeinalipour-Yazti, Song Lin, Vana Kalogeraki, Dimitrios Gunopulos, Walid A. Najjar MicroHash: An Efficient Index Structure for Flash-Based Sensor Devices. Search on Bibsonomy FAST The full citation details ... 2005 DBLP  BibTeX  RDF
1Anirban Banerjee, Abhishek Mitra, Walid A. Najjar, Demetrios Zeinalipour-Yazti, Vana Kalogeraki, Dimitrios Gunopulos RISE - Co-S : high performance sensor storage and Co-processing architecture. Search on Bibsonomy SECON The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Thomas M. Conte, Paolo Faraboschi, William H. Mangione-Smith, Walid A. Najjar (eds.) Proceedings of the 2005 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2005, San Francisco, California, USA, September 24-27, 2005 Search on Bibsonomy CASES The full citation details ... 2005 DBLP  BibTeX  RDF
1Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Walid A. Najjar A tunable bus encoder for off-chip data buses. Search on Bibsonomy ISLPED The full citation details ... 2005 DBLP  DOI  BibTeX  RDF TUBE, data bus, data bus encoding, tunable bus encoder
1Dinesh C. Suresh, Banit Agrawal, Walid A. Najjar, Jun Yang 0002 VALVE: Variable Length Value Encoder for Off-Chip Data Buses.. Search on Bibsonomy ICCD The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Demetrios Zeinalipour-Yazti, Vana Kalogeraki, Dimitrios Gunopulos, Anirban Mitra, Anirban Banerjee, Walid A. Najjar Towards In-Situ Data Storage in Sensor Databases. Search on Bibsonomy Panhellenic Conference on Informatics The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Zhi Guo, Betul Buyukkurt, Walid A. Najjar Input data reuse in compiling window operations onto reconfigurable hardware. Search on Bibsonomy LCTES The full citation details ... 2004 DBLP  DOI  BibTeX  RDF reuse analysis, compilation, high-level synthesis, VHDL, reconfigurable computing
1Walid A. Najjar From Here to Main-stream: The Present and Future of Reconfigurable Computing. Search on Bibsonomy ERSA The full citation details ... 2004 DBLP  BibTeX  RDF
1Zhi Guo, Walid A. Najjar, Frank Vahid, Kees A. Vissers A quantitative analysis of the speedup factors of FPGAs over processors. Search on Bibsonomy FPGA The full citation details ... 2004 DBLP  DOI  BibTeX  RDF performance, FPGA, analysis, VHDL, reconfigurable computing
1Chuanjun Zhang, Frank Vahid, Jun Yang 0002, Walid A. Najjar A way-halting cache for low-energy high-performance systems. Search on Bibsonomy ISLPED The full citation details ... 2004 DBLP  DOI  BibTeX  RDF low power techniques, cache design
1Walid A. Najjar "How Long is Your Belt?" Towards a Single Device for Multiple Functions. Search on Bibsonomy ICPS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
1Chuanjun Zhang, Frank Vahid, Jun Yang 0002, Walid A. Najjar A Way-Halting Cache for Low-Energy High-Performance Systems. Search on Bibsonomy Computer Architecture Letters The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Walid A. Najjar, A. P. Wim Böhm, Bruce A. Draper, Jeffrey Hammes, Robert Rinker, J. Ross Beveridge, Monica Chawathe, Charles Ross High-Level Language Abstraction for Reconfigurable Computing. Search on Bibsonomy IEEE Computer The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Girish Venkataramani, Walid A. Najjar, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm, Jeffrey Hammes Automatic compilation to a coarse-grained reconfigurable system-opn-chip. Search on Bibsonomy ACM Trans. Embedded Comput. Syst. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF compilers, Reconfigurable computing, SIMD
1Dinesh C. Suresh, Walid A. Najjar, Frank Vahid, Jason R. Villarreal, Greg Stitt Profiling tools for hardware/software partitioning of embedded applications. Search on Bibsonomy LCTES The full citation details ... 2003 DBLP  DOI  BibTeX  RDF loop analysis, compiler optimization, hardware/software partitioning
1Chuanjun Zhang, Frank Vahid, Walid A. Najjar Energy Benefits of a Configurable Line Size Cache for Embedded Systems. Search on Bibsonomy ISVLSI The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Dinesh C. Suresh, Jun Yang 0002, Chuanjun Zhang, Banit Agrawal, Walid A. Najjar FV-MSB: A Scheme for Reducing Transition Activity on Data Buses. Search on Bibsonomy HiPC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Susan Cotterell, Frank Vahid, Walid A. Najjar, Harry Hsieh First results with eBlocks: embedded systems building blocks. Search on Bibsonomy CODES+ISSS The full citation details ... 2003 DBLP  DOI  BibTeX  RDF embedded systems, networks, intelligent homes
1Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Walid A. Najjar, Laxmi N. Bhuyan Power efficient encoding techniques for off-chip data buses. Search on Bibsonomy CASES The full citation details ... 2003 DBLP  DOI  BibTeX  RDF FV, FV-MSB-LSB, data bus, low power, bus encoding
1Chuanjun Zhang, Frank Vahid, Walid A. Najjar A Highly-Configurable Cache Architecture for Embedded Systems. Search on Bibsonomy ISCA The full citation details ... 2003 DBLP  DOI  BibTeX  RDF embedded systems, low power, Cache, microprocessor, configurable, low energy, architecture tuning
1Jason R. Villarreal, Dinesh C. Suresh, Greg Stitt, Frank Vahid, Walid A. Najjar Improving Software Performance with Configurable Logic. Search on Bibsonomy Design Autom. for Emb. Sys. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
1A. P. Wim Böhm, Jeffrey Hammes, Bruce A. Draper, Monica Chawathe, Charlie Ross, Robert Rinker, Walid A. Najjar Mapping a Single Assignment Programming Language to Reconfigurable Systems. Search on Bibsonomy The Journal of Supercomputing The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
1Dhananjay Kulkarni, Walid A. Najjar, Robert Rinker, Fadi J. Kurdahi Fast Area Estimation to Support Compiler Optimizations in FPGA-Based Reconfigurable Systems. Search on Bibsonomy FCCM The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
1A. P. Wim Böhm, J. Ross Beveridge, Bruce A. Draper, Charlie Ross, Monica Chawathe, Walid A. Najjar Compiling ATR Probing Codes for Execution on FPGA Hardware. Search on Bibsonomy FCCM The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
1Robert Rinker, M. Carter, A. Patel, Monica Chawathe, Charlie Ross, Jeffrey Hammes, Walid A. Najjar, A. P. Wim Böhm An automated process for compiling dataflow graphs into reconfigurable hardware. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
1Dianne R. Kumar, Walid A. Najjar, Pradip K. Srimani A New Adaptive Hardware Tree-Based Multicast Routing in K-Ary N-Cubes. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2001 DBLP  DOI  BibTeX  RDF adaptive routing, Multicast communication, deterministic routing, virtual cut-through switching, path-based routing, tree-based routing
1Lucas Roh, Bhanu Shankar, A. P. Wim Böhm, Walid A. Najjar Resource Management in Dataflow-Based Multithreaded Execution. Search on Bibsonomy J. Parallel Distrib. Comput. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
1Bruce A. Draper, A. P. Wim Böhm, Jeffrey Hammes, Walid A. Najjar, J. Ross Beveridge, Charlie Ross, Monica Chawathe, Mitesh Desai, José Bins Compiling SA-C Programs to FPGAs: Performance Results. Search on Bibsonomy ICVS The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
1Jeffrey Hammes, A. P. Wim Böhm, Charlie Ross, Monica Chawathe, Bruce A. Draper, Robert Rinker, Walid A. Najjar Loop fusion and temporal common subexpression elimination in window-based loops. Search on Bibsonomy IPDPS The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
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