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Publications of "Yih-Lang Li" ( http://dblp.L3S.de/Authors/Yih-Lang_Li )

  Author page on DBLP  Author page in RDF  Community of Yih-Lang Li in ASPL-2

Publication years (Num. hits)
1994-2009 (16) 2010-2012 (16) 2013-2017 (18) 2018-2019 (9)
Publication types (Num. hits)
article(19) inproceedings(40)
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Found 60 publication records. Showing 59 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Tai-Cheng Lee, Yih-Lang Li Incremental Timing-Driven Placement With Approximated Signoff Wire Delay and Regression-Based Cell Delay. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Yih-Lang Li, Shih-Ting Lin, Shinichi Nishizawa, Hong-Yan Su, Ming-Jie Fong, Oscar Chen, Hidetoshi Onodera NCTUcell: A DDA-Aware Cell Library Generator for FinFET Structure with Implicitly Adjustable Grid Map. Search on Bibsonomy DAC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Hsueh-Ling Yu, Yih-Lang Li, Tzu-Yi Liao, Tianchen Wang, Shu-Fei Tsai, Yiyu Shi Fast and Accurate Emissivity and Absolute Temperature Maps Measurement for Integrated Circuits. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Kuen-Wey Lin, Yeh-Sheng Lin, Yih-Lang Li, Rung-Bin Lin A Maze Routing-Based Methodology With Bounded Exploration and Path-Assessed Retracing for Constrained Multilayer Obstacle-Avoiding Rectilinear Steiner Tree Construction. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jinwook Jung, Iris Hui-Ru Jiang, Jianli Chen, Shih-Ting Lin, Yih-Lang Li, Victor N. Kravets, Gi-Joon Nam DATC RDF: An Open Design Flow from Logic Synthesis to Detailed Routing. Search on Bibsonomy CoRR The full citation details ... 2018 DBLP  BibTeX  RDF
1Ying-Chi Wei, Radhamanjari Samanta, Yih-Lang Li LESAR: A dynamic line-end spacing aware detailed router. Search on Bibsonomy DATE The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jinwook Jung, Iris Hui-Ru Jiang, Jianli Chen, Shih-Ting Lin, Yih-Lang Li, Victor N. Kravets, Gi-Joon Nam DATC RDF: an academic flow from logic synthesis to detailed routing. Search on Bibsonomy ICCAD The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Kuen-Wey Lin, Masanori Hashimoto, Yih-Lang Li Near-future traffic evaluation based navigation for automated driving vehicles considering traffic uncertainties. Search on Bibsonomy ISQED The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yan-Shiun Wu, Hong-Yan Su, Yi-Hsiang Chang, Rasit Onur Topaloglu, Yih-Lang Li MapReduce-based pattern classification for design space analysis. Search on Bibsonomy VLSI-DAT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Kuen-Wey Lin, Yih-Lang Li, Masanori Hashimoto Near-future traffic evaluation based navigation for automated driving vehicles. Search on Bibsonomy Intelligent Vehicles Symposium The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Jinwook Jung, Pei-Yu Lee, Yan-Shiun Wu, Nima Karimpour Darav, Iris Hui-Ru Jiang, Victor N. Kravets, Laleh Behjat, Yih-Lang Li, Gi-Joon Nam DATC RDF: Robust design flow database: Invited paper. Search on Bibsonomy ICCAD The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Hong-Yan Su, Shinichi Nishizawa, Yan-Shiun Wu, Jun Shiomi, Yih-Lang Li, Hidetoshi Onodera Pin accessibility evaluating model for improving routability of VLSI designs. Search on Bibsonomy SoCC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Kuen-Wey Lin, Yeh-Sheng Lin, Yih-Lang Li, Rung-Bin Lin A Maze Routing-Based Algorithm for ML-OARST with Pre-Selecting and Re-Building Steiner Points. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Jinwook Jung, Iris Hui-Ru Jiang, Gi-Joon Nam, Victor N. Kravets, Laleh Behjat, Yih-Lang Li OpenDesign flow database: the infrastructure for VLSI design and design automation research. Search on Bibsonomy ICCAD The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Kuen-Wey Lin, Yih-Lang Li, Rung-Bin Lin Multiple-patterning lithography-aware routing for standard cell layout synthesis. Search on Bibsonomy APCCAS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Hong-Yan Su, Chieh-Chu Chen, Yih-Lang Li, An-Chun Tu, Chuh-Jen Wu, Chen-Ming Huang A Novel Fast Layout Encoding Method for Exact Multilayer Pattern Matching With Prüfer Encoding. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Hong-Yan Su, Chih-Hao Hsu, Yih-Lang Li SubHunter: a high-performance and scalable sub-circuit recognition method with Prüfer-encoding. Search on Bibsonomy DATE The full citation details ... 2015 DBLP  BibTeX  RDF
1Yu-Wei Lee, Yen-Hung Lin, Yih-Lang Li Minimizing Critical Area on Gridless Wire Ordering, Sizing and Spacing. Search on Bibsonomy J. Inf. Sci. Eng. The full citation details ... 2014 DBLP  BibTeX  RDF
1Wen-Hao Liu, Yih-Lang Li Optimizing the Antenna Area and Separators in Layer Assignment of Multilayer Global Routing. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Yen-Hung Lin, Bei Yu 0001, David Z. Pan, Yih-Lang Li TRIAD: a triple patterning lithography aware detailed router. Search on Bibsonomy CoRR The full citation details ... 2014 DBLP  BibTeX  RDF
1Hsueh-Ling Yu, Yih-Lang Li, Tzu-Yi Liao, Tianchen Wang, Yiyu Shi, Shu-Fei Tsai Fast and accurate emissivity and absolute temperature maps measurement for integrated circuits. Search on Bibsonomy ICCAD The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Chih-Chien Lin, Wen-Hao Liu, Yih-Lang Li Skillfully diminishing antenna effect in layer assignment stage. Search on Bibsonomy VLSI-DAT The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Sergiy Popovych, Hung-Hao Lai, Chieh-Min Wang, Yih-Lang Li, Wen-Hao Liu, Ting-Chi Wang Density-aware Detailed Placement with Instant Legalization. Search on Bibsonomy DAC The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Wen-Hao Liu, Wei-Chun Kao, Yih-Lang Li, Kai-Yuan Chao NCTU-GR 2.0: Multithreaded Collision-Aware Global Routing With Bounded-Length Maze Routing. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Wen-Hao Liu, Cheng-Kok Koh, Yih-Lang Li Case study for placement solutions in ispd11 and dac12 routability-driven placement contests. Search on Bibsonomy ISPD The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Wen-Hao Liu, Cheng-Kok Koh, Yih-Lang Li Optimization of placement solutions for routability. Search on Bibsonomy DAC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Wen-Hao Liu, Yaoguang Wei, Cliff C. N. Sze, Charles J. Alpert, Zhuo Li 0001, Yih-Lang Li, Natarajan Viswanathan Routing congestion estimation with real design constraints. Search on Bibsonomy DAC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Ke-Ren Dai, Wen-Hao Liu, Yih-Lang Li NCTU-GR: Efficient Simulated Evolution-Based Rerouting and Congestion-Relaxed Layer Assignment on 3-D Global Routing. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Yen-Hung Lin, Yun-Jian Lo, Hian-Syun Tong, Wen-Hao Liu, Yih-Lang Li Topology-aware buffer insertion and GPU-based massively parallel rerouting for ECO timing optimization. Search on Bibsonomy ASP-DAC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Wen-Hao Liu, Yih-Lang Li Optimizing the antenna area and separators in layer assignment of multi-layer global routing. Search on Bibsonomy ISPD The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Yen-Hung Lin, Bei Yu 0001, David Z. Pan, Yih-Lang Li TRIAD: A triple patterning lithography aware detailed router. Search on Bibsonomy ICCAD The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Wen-Hao Liu, Yih-Lang Li, Cheng-Kok Koh A fast maze-free routing congestion estimator with hybrid unilateral monotonic routing. Search on Bibsonomy ICCAD The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Iris Hui-Ru Jiang, Zhuo Li 0001, Yih-Lang Li Opening: Introduction to CAD contest at ICCAD 2012: CAD contest. Search on Bibsonomy ICCAD The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Yen-Hung Lin, Shu-Hsin Chang, Yih-Lang Li Critical-Trunk-Based Obstacle-Avoiding Rectilinear Steiner Tree Routings and Buffer Insertion for Delay and Slack Optimization. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Yih-Lang Li, Yu-Ning Chang, Wen-Nai Cheng A gridless routing system with nonslicing floorplanning-based crosstalk reduction on gridless track assignment. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Wen-Hao Liu, Yih-Lang Li Negotiation-based layer assignment for via count and via overflow minimization. Search on Bibsonomy ASP-DAC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Wen-Hao Liu, Yih-Lang Li, Kai-Yuan Chao High-quality global routing for multiple dynamic supply voltage designs. Search on Bibsonomy ICCAD The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Yen-Hung Lin, Yongchan Ban, David Z. Pan, Yih-Lang Li Doppler: DPL-aware and OPC-friendly gridless detailed routing with mask density balancing. Search on Bibsonomy ICCAD The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Yu-Wei Lee, Yen-Hung Lin, Yih-Lang Li Gridless wire ordering, sizing and spacing with critical area minimization. Search on Bibsonomy ISQED The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Wen-Hao Liu, Yih-Lang Li, Hui-Chi Chen Minimizing clock latency range in robust clock tree synthesis. Search on Bibsonomy ASP-DAC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Chih-Ta Lin, Yen-Hung Lin, Guan-Chan Su, Yih-Lang Li Dead via minimization by simultaneous routing and redundant via insertion. Search on Bibsonomy ASP-DAC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Yen-Hung Lin, Yih-Lang Li Double patterning lithography aware gridless detailed routing with innovative conflict graph. Search on Bibsonomy DAC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF double patterning, gridless model, detailed routing
1Wen-Hao Liu, Wei-Chun Kao, Yih-Lang Li, Kai-Yuan Chao Multi-threaded collision-aware global routing with bounded-length maze routing. Search on Bibsonomy DAC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF multi-threaded, global routing, maze routing
1Peng-Yang Hung, Ying-Shu Lou, Yih-Lang Li Minimum Shield Insertion on Full-Chip RLC Crosstalk Budgeting Routing. Search on Bibsonomy IEICE Transactions The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Ke-Ren Dai, Wen-Hao Liu, Yih-Lang Li Efficient simulated evolution based rerouting and congestion-relaxed layer assignment on 3-D global routing. Search on Bibsonomy ASP-DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Yen-Hung Lin, Shu-Hsin Chang, Yih-Lang Li Critical-trunk based obstacle-avoiding rectilinear steiner tree routings for delay and slack optimization. Search on Bibsonomy ISPD The full citation details ... 2009 DBLP  DOI  BibTeX  RDF elmore delay model, obstacle-avoiding rectilinear steiner tree, performance-driven routing, worst negative slack, timing constraint
1Ke-Ren Dai, Chien-Hung Lu, Yih-Lang Li GRPlacer: Improving routability and wire-length of global routing with circuit replacement. Search on Bibsonomy ICCAD The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1De-Shiun Fu, Ying-Zhih Chaung, Yen-Hung Lin, Yih-Lang Li Topology-driven cell layout migration with collinear constraints. Search on Bibsonomy ICCD The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Yiming Li, Yih-Lang Li, Shao-Ming Yu Design optimization of a current mirror amplifier integrated circuit using a computational statistics technique. Search on Bibsonomy Mathematics and Computers in Simulation The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Yiming Li, Shao-Ming Yu, Yih-Lang Li Electronic design automation using a unified optimization framework. Search on Bibsonomy Mathematics and Computers in Simulation The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Yiming Li, Shao-Ming Yu, Yih-Lang Li Parallel solution of large-scale eigenvalue problem for master equation in protein folding dynamics. Search on Bibsonomy J. Parallel Distrib. Comput. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Yu-Ning Chang, Yih-Lang Li, Wei-Tin Lin, Wen-Nai Cheng Non-slicing floorplanning-based crosstalk reduction on gridless track assignment for a gridless routing system with fast pseudo-tile extraction. Search on Bibsonomy ISPD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF crosstalk reduction, full-chip routing, gridless routing, implicit connection graph-based router, non-slicing floorplanning, detailed routing
1Peng-Yang Hung, Ying-Shu Lou, Yih-Lang Li Minimum Shield Insertion on Full-Chip RLC Crosstalk Budgeting Routing. Search on Bibsonomy ISQED The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Shield insertion, track routing, crosstalk optimization, global routing
1Yih-Lang Li, Jin-Yih Li, Wen-Bin Chen An Efficient Tile-Based ECO Router Using Routing Graph Reduction and Enhanced Global Routing Flow. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Yih-Lang Li, Hsin-Yu Chen, Chih-Ta Lin NEMO: A New Implicit-Connection-Graph-Based Gridless Router With Multilayer Planes and Pseudo Tile Propagation. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Yiming Li, Shao-Ming Yu, Yih-Lang Li A Simulation-Based Hybrid Optimization Technique for Low Noise Amplifier Design Automation. Search on Bibsonomy International Conference on Computational Science (4) The full citation details ... 2007 DBLP  DOI  BibTeX  RDF DaCO, Optimization, parameter tuning, circuit design, computational performance, LNA
1Jin-Yih Li, Yih-Lang Li An efficient tile-based ECO router with routing graph reduction and enhanced global routing flow. Search on Bibsonomy ISPD The full citation details ... 2005 DBLP  DOI  BibTeX  RDF ECO routing, connection-based router, gridless router, tile-based router, global routing
1Yih-Lang Li, Cheng-Wen Wu Cellular automata for efficient parallel logic and fault simulation. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
1Yih-Lang Li, Cheng-Wen Wu Logic and Fault Simulation by Cellular Automata. Search on Bibsonomy EDAC-ETC-EUROASIC The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
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