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article(16094) book(7) incollection(40) inproceedings(22179) phdthesis(121) proceedings(3)
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Found 38453 publication records. Showing 38444 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
82Ananta K. Majhi, Vishwani D. Agrawal Tutorial: Delay Fault Models and Coverage. Search on Bibsonomy VLSI Design The full citation details ... 1998 DBLP  DOI  BibTeX  RDF delay fault models, gate delay model, line delay model, path delay model, segment delay model, transition model, Delay test
64Subhrajit Bhattacharya, Sujit Dey, Franc Brglez Fast true delay estimation during high level synthesis. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
63W. Melody Moh, Yu-Jen Chien, Irene Zhang, Teng-Sheng Moh Delay performance evaluation of high speed protocols for multimedia communications. Search on Bibsonomy ICCCN The full citation details ... 1995 DBLP  DOI  BibTeX  RDF delay performance evaluation, high speed protocols, delay fairness, worst-case delay performance, distributed queue dual bus, CRMA, cyclic reservation multiple access, DQMA, distributed queue multiple access, FDQ, fair distributed queue, heavy network load, reservation-based protocols, throughput, multimedia communication, multimedia communication, multimedia traffic, quality of service requirements, DQDB, access delay, message delay, heterogeneous traffic
56Mukund Sivaraman, Andrzej J. Strojwas Diagnosis of parametric path delay faults. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF parametric path delay faults, chip failure, fabrication process parameter values, path sensitization mechanism, path delay conditions, ISCAS'89 benchmark circuits, path segment, circuit failure, fault diagnosis, logic testing, logic testing, delays, probability, probability, statistical analysis, statistical analysis, integrated circuit testing, failure analysis, diagnosability, delay fault testing, IC testing, production testing
54Ioannis Papapanagiotou, John S. Vardakas, Georgios S. Paschos, Michael D. Logothetis, Stavros A. Kotsopoulos Performance evaluation of IEEE 802.11e based on ON-OFF traffic model. Search on Bibsonomy MobiMedia The full citation details ... 2007 DBLP  DOI  BibTeX  RDF MAC delay, QoS, IEEE 802.11e, end-to-end delay, queuing delay
53Youxin Gao, D. F. Wong Wire-Sizing for Delay Minimization and Ringing Control Using Transmission Line Model. Search on Bibsonomy DATE The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
49Eun Sei Park, M. Ray Mercer, Thomas W. Williams The Total Delay Fault Model and Statistical Delay Fault Coverage. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1992 DBLP  DOI  BibTeX  RDF delay fault model, delay fault coverage, statistical delay fault coverage, defect level model, logic testing, delay testing, delay faults
47William K. C. Lam, Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli Delay fault coverage, test set size, and performance trade-offs. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
46Rodica Branzei, Giulio Ferrari, Vito Fragnelli, Stef Tijs Two Approaches to the Problem of Sharing Delay Costs in Joint Projects. Search on Bibsonomy Annals OR The full citation details ... 2002 DBLP  DOI  BibTeX  RDF activity graph, delay cost, taxation, serial cost sharing, bankruptcy
46Huawei Li, Zhongcheng Li, Yinghua Min Reduction of Number of Paths to be Tested in Delay Testing. Search on Bibsonomy J. Electronic Testing The full citation details ... 2000 DBLP  DOI  BibTeX  RDF linearly independent, analytical delay model, delay testing, path sensitization
46Hiroshi Takahashi, Takashi Watanabe, Yuzo Takamatsu Generation of tenacious tests for small gate delay faults in combinational circuits. Search on Bibsonomy Asian Test Symposium The full citation details ... 1995 DBLP  DOI  BibTeX  RDF tenacious tests, small gate delay faults, single gate delay fault, ISCAS'85 benchmark circuits, fault diagnosis, logic testing, delays, test generation, combinational circuits, combinational circuits, fault coverage
45Kevin R. Fall, Cecilia Mascolo, Jörg Ott, Lars C. Wolf 09071 Executive Summary - Delay and Disruption-Tolerant Networking (DTN) II. Search on Bibsonomy Delay and Disruption-Tolerant Networking (DTN) II The full citation details ... 2009 DBLP  BibTeX  RDF
45Kevin R. Fall, Cecilia Mascolo, Jörg Ott, Lars C. Wolf 09071 Abstracts Collection - Delay and Disruption-Tolerant Networking (DTN) II. Search on Bibsonomy Delay and Disruption-Tolerant Networking (DTN) II The full citation details ... 2009 DBLP  BibTeX  RDF
45Zaifu Zhang, Robert D. McLeod, Gregory E. Bridges Statistical estimation of delay fault detectabilities and fault grading. Search on Bibsonomy J. Electronic Testing The full citation details ... 1996 DBLP  DOI  BibTeX  RDF transition delay and path delay faults, statistical delay fault analysis, fault detectabilities, fault coverage, random patterns
45Andrew B. Kahng, Kei Masuko, Sudhakar Muddu Analytical delay models for VLSI interconnects under ramp input. Search on Bibsonomy ICCAD The full citation details ... 1996 DBLP  DOI  BibTeX  RDF SPICE-computed delay, VLSI routing topologies layout, analytical delay models, arbitrary interconnect trees, interconnect transfer function, performance-driven synthesis, ramp input, source-sink delays, VLSI, Elmore delay, interconnect delays, VLSI interconnects, RLC interconnections
44Branka Medved Rogina, Bozidar Vojnovic Metastability evaluation method by propagation delay distribution measurement. Search on Bibsonomy Asian Test Symposium The full citation details ... 1995 DBLP  DOI  BibTeX  RDF propagation delay distribution measurement, edge-triggered flip-flops, input signals time relationship, output signal timing characteristics, analytical representation, propagation delay density distribution function, fault events, integrated propagation delay density distribution function, flip-flop normal propagation delay, resolution time constant, automatic data acquisition, complex architecture microsystems, MTBF, latch devices, custom CMOS, VLSI, VLSI, fault diagnosis, logic testing, delays, logic design, asynchronous circuits, flip-flops, data acquisition, failure analysis, reliability analysis, graphical representation, metastability, PLD, asynchronous logic, integrated circuit reliability, statistical measurement
44Masoud Sharif, Babak Hassibi A delay analysis for opportunistic transmission in fading broadcast channels. Search on Bibsonomy INFOCOM The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
44Arif Ishaq Abou-Seido, Brian Nowak, Chris C. N. Chu Fitted Elmore Delay: A Simple and Accurate Interconnect Delay Model. Search on Bibsonomy ICCD The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
43Abbas El Gamal, James P. Mammen, Balaji Prabhakar, Devavrat Shah Optimal throughput-delay scaling in wireless networks: part I: the fluid model. Search on Bibsonomy IEEE Trans. Information Theory The full citation details ... 2006 DBLP  DOI  BibTeX  RDF throughput scaling, throughput-delay tradeoff, wireless networks, queueing theory, random walks, scaling laws
43Baris Bozkurt, Thierry Dutoit, Laurent Couvreur Spectral Analysis of Speech Signals Using Chirp Group Delay. Search on Bibsonomy WNSP The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Phase processing, chirp group delay, group delay, zzt, ASR feature extraction
43Wei-Cheng Lai, Angela Krstic, Kwang-Ting Cheng On Testing the Path Delay Faults of a Microprocessor Using its Instruction Set. Search on Bibsonomy VTS The full citation details ... 2000 DBLP  DOI  BibTeX  RDF Microprocessor self-testing, Path delay fault classification, Functionally testable paths, Functional tests, Delay fault testing
43Shibin Song, Joseph Kee-Yin Ng, Bihai Tang Statistical Delay Analysis with Self-Similar Input Traffic in ATM Networks. Search on Bibsonomy RTCSA The full citation details ... 1999 DBLP  DOI  BibTeX  RDF Real-Time ATM Networks, Statistical Delay Analysis, Efficient Delay Computation, Performance Evaluation, Self-similar Traffic
43Ananta K. Majhi, James Jacob, Lalit M. Patnaik, Vishwani D. Agrawal On test coverage of path delay faults. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF two-pass test generation method, falling transition, line delay test, longest sensitizable path, decreasing length, redundant stuck-at fault, computational complexity, fault diagnosis, logic testing, delays, redundancy, combinational circuits, fault simulation, circuit analysis computing, test coverage, path delay faults, benchmark circuits, coverage metric, combinational logic circuits, longest paths
43Mukund Sivaraman, Andrzej J. Strojwas A diagnosability metric for parametric path delay faults. Search on Bibsonomy VTS The full citation details ... 1996 DBLP  DOI  BibTeX  RDF diagnosability metric, parametric path delay faults, test vector pairs, chip failure, fabrication process parameter variations, diagnosis framework, ISCAS'89 benchmark circuits, VLSI, fault diagnosis, logic testing, delays, timing, integrated circuit testing, failure analysis, diagnosability, delay fault testing, test set
42Mukund Sivaraman, Andrzej J. Strojwas Timing analysis based on primitive path delay fault identification. Search on Bibsonomy ICCAD The full citation details ... 1997 DBLP  DOI  BibTeX  RDF primitive path delay faults, correlated delay, floating mode, timing analysis, timing verification, false path, path delay fault testing
41Swaroop Ghosh, Swarup Bhunia, Arijit Raychowdhury, Kaushik Roy 0001 A Novel Delay Fault Testing Methodology Using Low-Overhead Built-In Delay Sensor. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
41Colin J. Ihrig, Gerold Joseph Dhanabalan, Alex K. Jones A low-power CMOS thyristor based delay element with programmability extensions. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF delay element, thyristor, low power
40Kevin R. Fall, Cecilia Mascolo, Jörg Ott, Lars C. Wolf (eds.) Delay and Disruption-Tolerant Networking (DTN) II, 08.02. - 11.02.2009 Search on Bibsonomy Delay and Disruption-Tolerant Networking (DTN) II The full citation details ... 2009 DBLP  BibTeX  RDF
40Eiko Yoneki, Pan Hui, Jon Crowcroft Wireless Epidemic Spread in Dynamic Human Networks. Search on Bibsonomy Delay and Disruption-Tolerant Networking (DTN) II The full citation details ... 2009 DBLP  BibTeX  RDF
40Gunnar Karlsson, Ólafur Ragnar Helgason, Vladimir Vukadinovic On the Performance of Pedestrian Content Distribution. Search on Bibsonomy Delay and Disruption-Tolerant Networking (DTN) II The full citation details ... 2009 DBLP  BibTeX  RDF
40Yu-Sheng Huang, Chih-wen Hsueh Minimizing the maximum end-to-end delay on tree structure using the distributed pinwheel model. Search on Bibsonomy RTCSA The full citation details ... 2000 DBLP  DOI  BibTeX  RDF maximum end-to-end delay minimisation, distributed pinwheel model, end-to-end timing requirements, tight maximum delay bound, quality of service, Internet, computational complexity, timing, computer networks, heuristic algorithm, processor scheduling, timing constraints, simulation result, distributed real-time systems, tree structure, heuristic programming, NP-hard problems, linear-time algorithm, pipeline structure
40Yinghua Min, Zhuxing Zhao, Zhongcheng Li An Analytical Delay Model Based on Boolean Process. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF waveform polynomial, transition delay, floating delay, sensitization, Boolean process
40S. Cremoux, Christophe Fagot, Patrick Girard 0001, Christian Landrault, Serge Pravossoudovitch A new test pattern generation method for delay fault testing. Search on Bibsonomy VTS The full citation details ... 1996 DBLP  DOI  BibTeX  RDF test pattern generation method, directed random generation technique, random test vectors, test sequence length, delay fault coverage, learning (artificial intelligence), VLSI, logic testing, delays, built-in self test, integrated circuit testing, BIST, automatic testing, delay fault testing, digital integrated circuits, learning tool, high speed circuits
40Syed Sohel Hussain, Yih-Chyun Jenq Analysis and Optimization of a Banyan-Based ATM Switch by Simulations. Search on Bibsonomy LCN The full citation details ... 1996 DBLP  DOI  BibTeX  RDF Banyan based ATM switch, switch optimization, switch analysis, delay variance, performanc analysis, uniform traffic, three-state model, nonblocking first stage, packet blocking, enhanced priority scheme, single buffer Banyan network, double buffer switching element, delay sensitive voice packet, asynchronous transfer mode, asynchronous transfer mode, delay, throughput, bandwidth, simulation results, voice traffic, data traffic
39Mukund Sivaraman, Andrzej J. Strojwas Delay fault coverage: a realistic metric and an estimation technique for distributed path delay faults. Search on Bibsonomy ICCAD The full citation details ... 1996 DBLP  DOI  BibTeX  RDF fabrication process, coverage, delay testing, delay fault, path sensitization
39Matthew K. H. Leung, John C. S. Lui, David K. Y. Yau Characterization and Performance Evaluation for Proportional Delay Differentiated Services. Search on Bibsonomy ICNP The full citation details ... 2000 DBLP  DOI  BibTeX  RDF proportional delay differentiated services, Internet differentiated services, traffic classes, tariff rate, time-dependent priority scheduling, proportional delay model, delay ratios, scheduling parameters, efficient control algorithm, relative waiting time, performance evaluation, performance evaluation, Internet, delays, telecommunication traffic, waiting times, telecommunication services, ISP, feasible regions, average waiting time, service classes
39Seiichiro Tani, Mitsuo Teramoto, Tomoo Fukazawa, Kazuyoshi Matsuhiro Efficient Path Selection for Delay Testing Based on Path Clustering. Search on Bibsonomy J. Electronic Testing The full citation details ... 1999 DBLP  DOI  BibTeX  RDF clustering, delay testing, delay fault, path delay
39Irith Pomeranz, Sudhakar M. Reddy Functional test generation for delay faults in combinational circuits. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 1998 DBLP  DOI  BibTeX  RDF function-robust tests, functional delay fault model, delay faults, path delay faults, robust tests
39Matthew Andrews, Antonio Fernández 0001, Mor Harchol-Balter, Frank Thomson Leighton, Lisa Zhang General Dynamic Routing with Per-Packet Delay Guarantees of O(distance + 1 / session rate). Search on Bibsonomy FOCS The full citation details ... 1997 DBLP  DOI  BibTeX  RDF per-packet delay, queue buildup, scheduling, packet-switching, communication networks, dynamic routing, telecommunication networks, performance guarantees, delay bounds, bursty traffic, packet delay, arbitrary topology
39Wuudiann Ke, Premachandran R. Menon Multifault testability of delay-testable circuits. Search on Bibsonomy VTS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF delay-testable circuits, multifault testability, path-delay-fault testability, multiple stuck-at-fault testability, multilevel combinational circuits, robust path-delay-fault test set, logic testing, delays, combinational circuits, multivalued logic circuits
39Aiguo Lu, Erik L. Dagless, Jonathan M. Saul DART: delay and routability driven technology mapping for LUT based FPGAs. Search on Bibsonomy ICCD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF DART, delay driven technology mapping, LUT based FPGAs, two-phased approach, routability directed delay-optimal mapping, stochastic routability analysis, delay-optimal mapping, field programmable gate arrays, delays, logic design, programmable logic arrays, table lookup, minimisation of switching nets
39Youxin Gao, Martin D. F. Wong Wire-sizing optimization with inductance consideration using transmission-line model. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
39Masoud Sharif, Babak Hassibi Delay Considerations for Opportunistic Scheduling in Broadcast Fading Channels. Search on Bibsonomy IEEE Trans. Wireless Communications The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
39Elaheh Bozorgzadeh, Soheil Ghiasi, Atsushi Takahashi 0001, Majid Sarrafzadeh Optimal integer delay-budget assignment on directed acyclic graphs. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
39Yoon G. Kim, Afshin Shiravi, Paul S. Min Prediction-Based Routing through Least Cost Delay Constraint. Search on Bibsonomy IPDPS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
39Eun Sei Park, M. Ray Mercer An efficient delay test generation system for combinational logic circuits. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 1992 DBLP  DOI  BibTeX  RDF
39Eun Sei Park, M. Ray Mercer An Efficient Delay Test Generation System for Combinational Logic Circuits. Search on Bibsonomy DAC The full citation details ... 1990 DBLP  DOI  BibTeX  RDF
38Kartik Gopalan, Tzi-cker Chiueh, Yow-Jian Lin Probabilistic delay guarantees using delay distribution measurement. Search on Bibsonomy ACM Multimedia The full citation details ... 2004 DBLP  DOI  BibTeX  RDF measurement-based, admission control, statistical multiplexing
38Petar Djukic, Shahrokh Valaee Delay aware link scheduling for multi-hop TDMA wireless networks. Search on Bibsonomy IEEE/ACM Trans. Netw. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF TDMA scheduling algorithms, scheduling delay, stop-and-go queueing
38I-De Huang, Yi-Shing Chang, Sandeep K. Gupta, Sreejit Chakravarty An Industrial Case Study of Sticky Path-Delay Faults. Search on Bibsonomy VTS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF sticky paths, timing false paths, path reprioritization, delay testing, test quality
38Hechmi Khlifi, Jean-Charles Grégoire Estimation and Removal of Clock Skew From Delay Measures. Search on Bibsonomy LCN The full citation details ... 2004 DBLP  DOI  BibTeX  RDF clock skew, delay measurement
38Jun (Jim) Xu, Richard J. Lipton On fundamental tradeoffs between delay bounds and computational complexity in packet scheduling algorithms. Search on Bibsonomy SIGCOMM The full citation details ... 2002 DBLP  DOI  BibTeX  RDF quality of service, computational complexity, decision tree, packet scheduling, delay bound
38Tatsuhiro Tsuchiya, Masatoshi Yamaguchi, Tohru Kikuno Minimizing the Maximum Delay for Reaching Consensus in Quorum-Based Mutual Exclusion Schemes. Search on Bibsonomy IEEE Trans. Parallel Distrib. Syst. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF distributed systems, mutual exclusion, communication delay, Quorums, coteries
37Josef Schmid, Timo Schüring, Christoph Smalla Using the Boundary Scan Delay Chain for Cross-Chip Delay Measurement and Characterization of Delay Modeling Flow. Search on Bibsonomy ISQED The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
37Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram Timing-based delay test for screening small delay defects. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF test generation, delay testing
37Taieb Znati, Rami G. Melhem Node delay assignment strategies to support end-to-end delay requirements in heterogeneous networks. Search on Bibsonomy IEEE/ACM Trans. Netw. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF quality of service (QoS), packet scheduling, end-to-end delay
37Hagit Attiya, David Hay The inherent queuing delay of parallel packet switches. Search on Bibsonomy SPAA The full citation details ... 2004 DBLP  DOI  BibTeX  RDF leaky-bucket traffic, load balancing, packet switching, clos networks, queuing delay, delay jitter, inverse multiplexing
37Moonsoo Kang, Chansu Yu Job-Based Queue Delay Modeling in a Space-Shared Hypercube. Search on Bibsonomy ICPP Workshops The full citation details ... 1999 DBLP  DOI  BibTeX  RDF topological delay, processor allocation, space sharing, queue delay, Hypercube computer
37Angela Krstic, Kwang-Ting Cheng Resynthesis of Combinational Circuits for Path Count Reduction and for Path Delay Fault Testability. Search on Bibsonomy J. Electronic Testing The full citation details ... 1997 DBLP  DOI  BibTeX  RDF resynthesis for testability, timing defects, delay testing, path delay faults, VLSI testing
37Hiroshi Takahashi, Kwame Osei Boateng, Yuzo Takamatsu, Toshiyuki Matsunaga A Method of Generating Tests for Marginal Delays an Delay Faults in Combinational Circuits. Search on Bibsonomy Asian Test Symposium The full citation details ... 1997 DBLP  DOI  BibTeX  RDF marginal delay, test generation, combinational circuit, gate delay faults
37Kai-Hui Chang, Igor L. Markov, Valeria Bertacco Safe Delay Optimization for Physical Synthesis. Search on Bibsonomy ASP-DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF safe delay optimization, SafeResynth, safe resynthesis technique, immediately-measurable delay improvement, circuit timing, route length, physical synthesis, electronic design automation, route congestion, circuit delay
37Yen-Lin Peng, Jing-Jia Liou, Chih-Tsun Huang, Cheng-Wen Wu An Application-Independent Delay Testing Methodology for Island-Style FPGA. Search on Bibsonomy DFT The full citation details ... 2004 DBLP  DOI  BibTeX  RDF segment delay fault, FPGA, delay testing, path delay fault
37Maria K. Michael, Spyros Tragoudas ATPG tools for delay faults at the functional level. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF functional-level testing, path delay fault simulation (coverage), testing digital circuits, Automatic test pattern generation, Binary Decision Diagrams, delay testing, Boolean Satisfiability, path delay fault testing
37Wen Ching Wu, Chung-Len Lee, Ming Shae Wu, Jwu E. Chen, Magdy S. Abadir Oscillation Ring Delay Test for High Performance Microprocessors. Search on Bibsonomy J. Electronic Testing The full citation details ... 2000 DBLP  DOI  BibTeX  RDF oscillation ring testing, sensitized path, robust path dealy fault, hazard-free path delay fault, multiple reconvergent fanout, flunk lines, stuck at fault, delay fault testing, gate delay fault
37Jing-Jia Liou, Kwang-Ting Cheng, Deb Aditya Mukherjee Path Selection for Delay Testing of Deep Sub-Micron Devices Using Statistical Performance Sensitivity Analysis. Search on Bibsonomy VTS The full citation details ... 2000 DBLP  DOI  BibTeX  RDF delay defects, delay fault modeling, delay testing, critical paths, statistical timing analysis
37Wen-Ben Jone, Yun-Pan Ho, Sunil R. Das Delay Fault Coverage Enhancement Using Variable Observation Times. Search on Bibsonomy J. Electronic Testing The full citation details ... 1997 DBLP  DOI  BibTeX  RDF statistical delay fault coverage, delay test observation times, delay fault testing
37Joseph Kee-Yin Ng, Shibin Song, Wei Zhao 0001 Integrated delay analysis of regulated ATM switch. Search on Bibsonomy RTSS The full citation details ... 1997 DBLP  DOI  BibTeX  RDF integrated delay analysis, regulated ATM switch, worst case delay, hard real-time connection, real-time connection traffic, arrival functions, priority driven scheduling, FIFO scheduling, admission probability, cell delay estimation, performance, asynchronous transfer mode, deadline, simulation experiments, service functions, piecewise linear functions
37Chung-Ping Chen, Hai Zhou, D. F. Wong Optimal non-uniform wire-sizing under the Elmore delay model. Search on Bibsonomy ICCAD The full citation details ... 1996 DBLP  DOI  BibTeX  RDF Elmore delay model, IBM RS/6000 workstation, NWSA-db, NWSA-md, NWSA-wd algorithm, general routing trees, maximum sink delay, minimization objectives, optimal nonuniform wire sizing, routing-tree problem, sink-delay bounds, total area, total weighted sink-delays, wire-sizing formula, circuit analysis computing, Lagrangian relaxation
37Jacob Savir Generator choices for delay test. Search on Bibsonomy Asian Test Symposium The full citation details ... 1995 DBLP  DOI  BibTeX  RDF BIST based delay test, generator choices, delay test vector generator, nonscan designs, transition test, skewed-load delay test, shift dependency, digital logic circuits, performance, VLSI, fault diagnosis, logic testing, delays, built-in self test, integrated circuit testing, ATPG, automatic testing, flexibility, linear feedback shift register, cost, shift registers, scan designs, boundary scan testing, test vectors, timing requirement, pseudo-random test
36Debashis Bhattacharya, Prathima Agrawal, Vishwani D. Agrawal Test Generation for Path Delay Faults Using Binary Decision Diagrams. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1995 DBLP  DOI  BibTeX  RDF Boolean algebraic test generation, redundant delay faults, robust delay tests, scan testing of delay faults, binary decision diagrams, delay faults
36Daniel C. McCrackin Eliminating Interlocks in Deeply Pipelined Processors by Delay Enforced Multistreaming. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1991 DBLP  DOI  BibTeX  RDF deeply pipelined processors, delay enforced multistreaming, data dependency problem, jump problem, interdispatch delay, stream dispatching algorithms, modified fixed delay, encoded delay with fixed minimum, pipeline processing, processor architecture, interleaving, interlocks
36Matthew Andrews, Lisa Zhang Satisfying Arbitrary Delay Requirements in Multihop Networks. Search on Bibsonomy INFOCOM The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
36Mehdi Rezaei, Moncef Gabbouj, Imed Bouazizi Delay Constrained Fuzzy Rate Control for Video Streaming over DVB-H. Search on Bibsonomy IIH-MSP The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
36Andrew B. Kahng, Sudhakar Muddu An analytical delay model for RLC interconnects. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
35Paschalis Raptis, Vasileios Vitsas, Konstantinos Paparrizos Packet Delay Metrics for IEEE 802.11 Distributed Coordination Function. Search on Bibsonomy MONET The full citation details ... 2009 DBLP  DOI  BibTeX  RDF 802.11 DCF, delay performance, wireless networks
35Himabindu Pucha, Ying Zhang 0022, Zhuoqing Morley Mao, Y. Charlie Hu Understanding network delay changes caused by routing events. Search on Bibsonomy SIGMETRICS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF network delay changes, network jitter changes, routing events, routing dynamics
35Nabhendra Bisnik, Alhussein A. Abouzeid Delay and capacity in energy efficient sensor networks. Search on Bibsonomy PE-WASUN The full citation details ... 2007 DBLP  DOI  BibTeX  RDF sensor networks, delay, throughput, queuing theory
35Narender Hanchate, Nagarajan Ranganathan A game-theoretic framework for multimetric optimization of interconnect delay, power, and crosstalk noise during wire sizing. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Game theory, transmission lines, crosstalk noise, interconnect models, wire sizing, interconnect delay
35Jun (Jim) Xu, Richard J. Lipton On fundamental tradeoffs between delay bounds and computational complexity in packet scheduling algorithms. Search on Bibsonomy IEEE/ACM Trans. Netw. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF quality of service, computational complexity, decision tree, packet scheduling, delay bound
35Srivathsan Krishnamohan, Nihar R. Mahapatra An analysis of the robustness of CMOS delay elements. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2005 DBLP  DOI  BibTeX  RDF delay element, process variation, yield, Monte Carlo simulation
35Guohong Cao, Mukesh Singhal A Delay-Optimal Quorum-Based Mutual Exclusion Algorithm for Distributed Systems. Search on Bibsonomy IEEE Trans. Parallel Distrib. Syst. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF fault tolerance, Quorum, distributed mutual exclusion, synchronization delay
35Patrick Girard 0001, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel Comparison between Random and Pseudo-Random Generation for BIST of Delay, Stuck-at and Bridging Faults. Search on Bibsonomy IOLTW The full citation details ... 2000 DBLP  DOI  BibTeX  RDF BIST, Random Testing, Delay Testing, Bridging Faults
35Huawei Li, Zhongcheng Li, Yinghua Min Delay Testing with Double Observations. Search on Bibsonomy Asian Test Symposium The full citation details ... 1998 DBLP  DOI  BibTeX  RDF linearly independent, test generation, observation, delay testing
35Mouna Benaissa, Vincent Lecuire A New Smoothing Jitter Algorithm for Voice over Ad Hoc Networks. Search on Bibsonomy MWCN The full citation details ... 2004 DBLP  DOI  BibTeX  RDF packet audio, ad hoc network, AODV, delay estimation, playout delay
35Irith Pomeranz, Sudhakar M. Reddy Transition Path Delay Faults: A New Path Delay Fault Model for Small and Large Delay Defects. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
34Swaroop Ghosh, Swarup Bhunia, Arijit Raychowdhury, Kaushik Roy 0001 Delay Fault Localization in Test-Per-Scan BIST Using Built-In Delay Sensor. Search on Bibsonomy IOLTS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Test-per-scan BIST, delay sensor, fault diagnosis, fault localization, test point insertion
34Luís Guerra e Silva, João P. Marques Silva, Luís Miguel Silveira, Karem A. Sakallah Satisfiability models and algorithms for circuit delay computation. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF circuit delay computation, timing analysis, Boolean satisfiability, delay modeling, false path
34Zhongcheng Li, Yinghua Min, Robert K. Brayton A New Low-Cost Method for Identifying Untestable Path Delay Faults. Search on Bibsonomy Asian Test Symposium The full citation details ... 1998 DBLP  DOI  BibTeX  RDF non-robustly untestable, Delay testing, path delay fault, implication
34Keerthi Heragu, Vishwani D. Agrawal, Michael L. Bushnell Statistical methods for delay fault coverage analysis. Search on Bibsonomy VLSI Design The full citation details ... 1995 DBLP  DOI  BibTeX  RDF delay fault coverage analysis, true value simulation, multi-value logic system, implicit random path sampling procedure, linear-time estimate, fault coverage estimates, longest path theorem, fanout branches, fault diagnosis, logic testing, delays, probability, statistical analysis, observabilities, multivalued logic, propagation delay, detection probabilities, statistical techniques, transition probabilities
34Mandyam-Komar Srinivas, Vishwani D. Agrawal, Michael L. Bushnell Functional test generation for path delay faults. Search on Bibsonomy Asian Test Symposium The full citation details ... 1995 DBLP  DOI  BibTeX  RDF growth faults, disappearance faults, robustly detectable path delay faults, two-level circuit, algebraic transformations, generated vectors, algebraically factored multilevel circuit, scan/hold versions, ISCAS89 circuits, fault diagnosis, logic testing, delays, timings, fault coverages, fault location, programmable logic arrays, programmable logic arrays, PLA, multivalued logic, path delay faults, functional test generation, stuck faults
34Wen Ching Wu, Chung-Len Lee, Jwu E. Chen Identification of robust untestable path delay faults. Search on Bibsonomy Asian Test Symposium The full citation details ... 1995 DBLP  DOI  BibTeX  RDF robust untestable path delay faults, path reconvergence of fanouts, ISCAS 85' circuits, total path delay faults, six-valued logic, propagation graph, ROUNTEST program, fault diagnosis, logic testing, delays, partitioning, ATPG, combinational circuits, combinational circuits, automatic testing, logic CAD, multivalued logic, logic partitioning, signal flow graphs, fault identification
34Lei Wang 0014, Carl McCrosky Performance Comparison of Control Schemes for ABR Service in ATM LANs. Search on Bibsonomy MASCOTS The full citation details ... 1997 DBLP  DOI  BibTeX  RDF ABR service, ATM Forum, available bit rate service, constrained cell loss, network resource utilization, CBR/VBR services, burst level traffic control, rate based feedback control, loss sensitive applications, delay insensitive applications, burst transfer delay, simulation, asynchronous transfer mode, bandwidth, performance comparison, ATM LAN, delay variation
34Nicolas Bécu, Marion Amalric, Brice Anselme, Elise Beck, Xavier Bertin, Etienne Delay, Nathalie Long, Nicolas Marilleau, Cécilia Pignon-Mussaud, Frédéric Rousseaux Participatory simulation to foster social learning on coastal flooding prevention. Search on Bibsonomy Environmental Modelling and Software The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
34Thierry Alex Mara, Frederick Delay, François Lehmann, Anis Younes A comparison of two Bayesian approaches for uncertainty quantification. Search on Bibsonomy Environmental Modelling and Software The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
34Giancarlo Crocetti, Amir A. Delay, Fatemeh Seyedmendhi Identifying Structures in Social Conversations in NSCLC Patients through the Semi-Automatic extraction of Topical Taxonomies. Search on Bibsonomy CoRR The full citation details ... 2016 DBLP  BibTeX  RDF
34Carole Adam, Franck Taillandier, Etienne Delay, Odile Plattard, Mira Toumi SPRITE - Participatory Simulation for Raising Awareness About Coastal Flood Risk on the Oleron Island. Search on Bibsonomy ISCRAM-med The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
34Mark Rahmes, John Delay, George Lemieux, Kevin L. Fox Optimal multi-dimensional fusion model for sensor allocation and accuracy assessment. Search on Bibsonomy SysCon The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
34Mark Rahmes, Rick Pemble, Kevin L. Fox, John Delay A cognitive hierarchical framework for evaluating emergency response activities. Search on Bibsonomy WOCC The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
34Mark Rahmes, Kevin L. Fox, John Delay, Gran Roe Matching social network biometrics using geo-analytical behavioral modeling. Search on Bibsonomy CIDM The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
34Linda L. Werner, Jill Denner, Shannon Campe, Eloy Ortiz, Dawn DeLay, Amy C. Hartl, Brett Laursen Pair programming for middle school students: does friendship influence academic outcomes? Search on Bibsonomy SIGCSE The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
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