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Publication years (Num. hits)
1969-1979 (17) 1980-1982 (15) 1983-1984 (19) 1985-1986 (16) 1987-1988 (20) 1989 (21) 1990 (17) 1991-1992 (33) 1993 (19) 1994 (21) 1995 (49) 1996 (46) 1997 (50) 1998 (68) 1999 (91) 2000 (95) 2001 (89) 2002 (129) 2003 (159) 2004 (198) 2005 (225) 2006 (229) 2007 (233) 2008 (228) 2009 (154) 2010 (100) 2011 (74) 2012 (80) 2013 (76) 2014 (88) 2015 (66) 2016 (65) 2017 (54) 2018 (75) 2019 (24)
Publication types (Num. hits)
article(917) book(7) incollection(21) inproceedings(1974) phdthesis(24)
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Found 2943 publication records. Showing 2943 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
41Teemu Leinonen, Tarmo Toikkanen, Katrina Silfvast Software as hypothesis: research-based design methodology. Search on Bibsonomy PDC The full citation details ... 2008 DBLP  BibTeX  RDF learning, education, software, design methodology, method, human-centered
35Eli Kolberg, Yoram Reich, Ilya Levin Design of Design Methodology for Autonomous Robots. Search on Bibsonomy RoboCup The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
35Jianfeng Zhan, Lei Wang 0004, Bibo Tu, Hui Wang, Zhihong Zhang, Yi Jin, Yu Wen, Yuansheng Chen, Peng Wang, Bizhu Qiu, Dan Meng, Ninghui Sun The design methodology of Phoenix cluster system software stack. Search on Bibsonomy China HPC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF cluster system software stack, design methodology, practice, evaluation criteria
34Avinash K. Gautam, Jagdish C. Rao, Karthikeyan Madathil, Vilesh Shah, H. Udayakumar, Amitabh Menon, Subash G. Chandar A Design Methodology for a Fully Synthesized High Speed DSP Core in a Deep Sub-Micron Technology. Search on Bibsonomy ICCD The full citation details ... 1999 DBLP  DOI  BibTeX  RDF Links to layout, Synthesis, DSP, Design Methodology, Physical Design, Deep sub-micron
33Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede Design Methodology for Throughput Optimum Architectures of Hash Algorithms of the MD4-class. Search on Bibsonomy Signal Processing Systems The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Architecture design methodology, MD4-based hash algorithm, SHA1, RIPEMD-160, Iteration bound analysis, DFG (Data Flow Graph) transformation, Throughput optimization, MD5
32Ling Feng, Elizabeth Chang 0001, Tharam S. Dillon A semantic network-based design methodology for XML documents. Search on Bibsonomy ACM Trans. Inf. Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF XML, XML, conceptual modeling, design methodology, XML Schema, semantic network
32Jürgen Gausemeier, Sebastian Korf, Mario Porrmann, Katharina Stahl, Oliver Sudmann, Mareen Vaßholz Development of Self-optimizing Systems. Search on Bibsonomy Design Methodology for Intelligent Technical Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
32Michael Dellnitz, Roman Dumitrescu, Kathrin Flaßkamp, Jürgen Gausemeier, Philip Hartmann, Peter Iwanek, Sebastian Korf, Martin Krüger, Sina Ober-Blöbaum, Mario Porrmann, Claudia Priesterjahn, Katharina Stahl, Ansgar Trächtler, Mareen Vaßholz The Paradigm of Self-optimization. Search on Bibsonomy Design Methodology for Intelligent Technical Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
32Harald Anacker, Christian Brenner, Rafal Dorociak, Roman Dumitrescu, Jürgen Gausemeier, Peter Iwanek, Wilhelm Schäfer, Mareen Vaßholz Methods for the Domain-Spanning Conceptual Design. Search on Bibsonomy Design Methodology for Intelligent Technical Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
32Harald Anacker, Michael Dellnitz, Kathrin Flaßkamp, Stefan Groesbrink, Philip Hartmann, Christian Heinzemann, Christian Horenkamp, Bernd Kleinjohann, Lisa Kleinjohann, Sebastian Korf, Martin Krüger, Wolfgang Müller 0003, Sina Ober-Blöbaum, Simon Oberthür, Mario Porrmann, Claudia Priesterjahn, Rafael Radkowski, Christoph Rasche, Jan Rieke, Maik Ringkamp, Katharina Stahl, Dominik Steenken, Jörg Stöcklein, Robert Timmermann, Ansgar Trächtler, Katrin Witting, Tao Xie 0006, Steffen Ziegert Methods for the Design and Development. Search on Bibsonomy Design Methodology for Intelligent Technical Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
32Jürgen Gausemeier, Mareen Vaßholz Summary and Outlook. Search on Bibsonomy Design Methodology for Intelligent Technical Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
32Joachim Böcker, Christian Heinzemann, Christian Hölscher, Jan Henning Keßler, Bernd Kleinjohann, Lisa Kleinjohann, Claudia Priesterjahn, Christoph Rasche, Peter Reinold, Christoph Romaus, Thomas Schierbaum, Tobias Schneider, Christoph Schulte, Bernd Schulz, Christoph Sondermann-Wölke, Karl Stephan Stille, Ansgar Trächtler, Detmar Zimmer Examples of Self-optimizing Systems. Search on Bibsonomy Design Methodology for Intelligent Technical Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
31Thinh M. Le, Xiaohua Tian, B. L. Ho, J. Nankoo, Yong Lian System-on-Chip Design Methodology for a Statistical Coder. Search on Bibsonomy IEEE International Workshop on Rapid System Prototyping The full citation details ... 2006 DBLP  DOI  BibTeX  RDF statistical coder, SoC, design methodology, CABAC
30Michael Reinhardt, Michael Santarini What is Design Quality? How can Quality in Electronic Design be Quantified? Search on Bibsonomy ISQED The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
30Kristinn R. Thórisson, Rögnvaldur J. Saemundsson, Gudny Ragna Jonsdottir, Brynjar Reynisson, Claudio Pedica, Palli Runar Thrainsson, Palmi Skowronski Applying Constructionist Design Methodology to Agent-Based Simulation Systems. Search on Bibsonomy KES-AMSTA The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Design Methodology, Agent-based systems
30Benton H. Calhoun, Frank Honoré, Anantha Chandrakasan Design methodology for fine-grained leakage control in MTCMOS. Search on Bibsonomy ISLPED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF fine-grain sleep regions, sneak leakage, low power, design methodology, leakage, circuit design, sleep mode, MTCMOS
29Gregg Skip Bailey Iterative methodology and designer training in human-computer interface design. Search on Bibsonomy INTERCHI The full citation details ... 1993 DBLP  DOI  BibTeX  RDF iterative design methodology, user interface specialists, programmers
29Michiaki Muraoka, Hiroaki Nishi, Rafael K. Morizawa, Hideaki Yokota, Hideyuki Hamada Design methodology for SoC arthitectures based on reusable virtual cores. Search on Bibsonomy ASP-DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
29Jean-Samuel Chenard, Chun Yiu Chu, Zeljko Zilic, Milica Popovic Design methodology for wireless nodes with printed antennas. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF RF CAD, antenna design methodology, printed antenna, printed circuit board
29Farhad S. Etessami, Gurdeep S. Hura Rule-Based Design Methodology for Solving Control Problems. Search on Bibsonomy IEEE Trans. Software Eng. The full citation details ... 1991 DBLP  DOI  BibTeX  RDF control problems, rule-based design methodology, abstract Petri nets, formalism tool, high-level interaction, elevator system, formal specification, Petri nets, specification, software tools, validation, knowledge engineering, dynamic behaviour
29Süleyman Sevinc, Bernard P. Zeigler Entity Structure Based Design Methodology: A LAN Protocol Example. Search on Bibsonomy IEEE Trans. Software Eng. The full citation details ... 1988 DBLP  DOI  BibTeX  RDF entity structure based design methodology, LAN protocol, frame-like knowledgerepresentation scheme, data-link-layer protocol, protocols, local area networks, packet switching, simulation environment
28Timothy J. Lenz, James K. McDowell, Martin C. Hawley, Ahmed Kamel, Jon Sticklen The Evolution of a Decision Support Architecture for Polymer Composites Design. Search on Bibsonomy IEEE Expert The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
28Toshihiro Hattori, Yusuke Nitta, Mitsuho Seki, Susumu Narita, Kunio Uchiyama, Tsuyoshi Takahashi, Ryuichi Satomura Design Methodology of a 200MHz Superscalar Microprocessor: SH-4. Search on Bibsonomy DAC The full citation details ... 1998 DBLP  DOI  BibTeX  RDF verification, timing, design methodology, microprocessor
27Marlene Wan, Hui Zhang 0008, George Varghese, Martin Benes, Arthur Abnous, Vandana Prabhu, Jan M. Rabaey Design Methodology of a Low-Energy Reconfigurable Single-Chip DSP System. Search on Bibsonomy VLSI Signal Processing The full citation details ... 2001 DBLP  DOI  BibTeX  RDF low-power, design methodology, reconfigurable architecture, digital signal processor
27Esperanza Marcos, Belén Vela, José María Cavero Extending UML for Object-Relational Database Design. Search on Bibsonomy UML The full citation details ... 2001 DBLP  DOI  BibTeX  RDF Oracle8i, UML, Design Methodology, Database Design, Stereotypes, Object-Relational Databases, UML extensions, SQL:1999
26Andrzej J. Strojwas, Tejas Jhaveri, Vyacheslav Rovner, Lawrence T. Pileggi Creating an affordable 22nm node using design-lithography co-optimization. Search on Bibsonomy DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF design technology co-optimization, templates, DFM, regular fabric
26Qikai Chen, Saibal Mukhopadhyay, Aditya Bansal, Kaushik Roy 0001 Circuit-aware device design methodology for nanometer technologies: a case study for low power SRAM design. Search on Bibsonomy DATE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
26J. S. Keane, Jerzy W. Rozenblit, Michael Barnes The Advanced Battlefield Architecture for Tactical Information Selection (ABATIS). Search on Bibsonomy ECBS The full citation details ... 1997 DBLP  DOI  BibTeX  RDF Advanced Battlefield Architecture for Tactical Information Selection, warfare, display strategy testing, hierarchical design methodology, object-oriented design methodology, battlefield visualization, process centered display, display layer, object-oriented methods, class diagrams, object modeling technique
26Elena Meshkova, Janne Riihijärvi, Frank Oldewurtel, Christine Jardak, Petri Mähönen Service-Oriented Design Methodology for Wireless Sensor Networks: A View through Case Studies. Search on Bibsonomy SUTC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF WSN, wireless sensor network, service-oriented architecture, agile development, trade-off, network parameters
26George Triantafyllakos, George Palaigeorgiou, Stavros N. Demetriadis, Ioannis A. Tsoukalas The We!Design Methodology: Designing Educational Applications with Students. Search on Bibsonomy ICALT The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
25Markus Schwiegershausen, Peter Pirsch A system level design methodology for the optimization of heterogeneous multiprocessors. Search on Bibsonomy ISSS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF parametrizable processor modules, programmable processors, system level design methodology, optimization, real-time systems, image processing, linear programming, optimisation, integer programming, multiprocessing systems, heterogeneous systems, mixed integer linear programming, CAD tool, image processing algorithms, heterogeneous multiprocessors, mathematical framework
25Pao-Ann Hsiung, Chung-Hwang Chen, Trong-Yen Lee, Sao-Jie Chen ICOS: an intelligent concurrent object-oriented synthesis methodology for multiprocessor systems. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 1998 DBLP  DOI  BibTeX  RDF concurrent object-oriented system-level synthesis, fuzzy design-space exploration, learning
25Ilhan Hatirnaz, Stéphane Badel, Nuria Pazos, Yusuf Leblebici, Srinivasan Murali, David Atienza, Giovanni De Micheli Early wire characterization for predictable network-on-chip global interconnects. Search on Bibsonomy SLIP The full citation details ... 2007 DBLP  DOI  BibTeX  RDF early wire characterization, design methodology, NoCs, global interconnects
25Srivaths Ravi 0001, Anand Raghunathan, Nachiketh R. Potlapally, Murugan Sankaradass System design methodologies for a wireless security processing platform. Search on Bibsonomy DAC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF security, performance, embedded system, wireless, encryption, AES, RSA, design methodology, system architecture, platform, DES, IPSec, SSL, decryption, handset, 3DES, security processing
25Robert M. McGraw, Moshe Meyassed, Robert H. Klenke, James H. Aylor, Ronald D. Williams Refinement of system-level designs using hybrid modeling. Search on Bibsonomy ICECCS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF system-level design refinement, complex system design, unified modeling methodology, top-down/bottom-up design methodology, modeling environment, behavioral components, high risk portions, simulation, simulation, modelling, systems analysis, product development, hybrid modeling, multi-level modeling
25Vassilios Gerousis Physical design implementation for 3D IC: methodology and tools. Search on Bibsonomy ISPD The full citation details ... 2010 DBLP  DOI  BibTeX  RDF 3D IC stack, micro-bump, physical design tools, silicon interposer, methodology, tsv
25Praveen Kumar, Pavol Bauer Progressive design methodology for complex engineering systems based on multiobjective genetic algorithms and linguistic decision making. Search on Bibsonomy Soft Comput. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF BLDC motors, Voltage source inverter, Multi-objective optimization (MOOP), Genetic algorithms, PDM, Linguistic variables, Multi attribute decision making
24Roula Michaelides, Dennis F. Kehoe Internet Communities and Open innovation: an Information System Design Methodology. Search on Bibsonomy ACIS-ICIS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF information system design methodology, open innovation, Internet communities
24Daniel P. Siewiorek, Asim Smailagic, Daniel Salber Rapid Prototyping of Computer Systems: Experiences and Lessons. Search on Bibsonomy IEEE International Workshop on Rapid System Prototyping The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
24Jongwoo Bae, Viktor K. Prasanna Synthesis of area-efficient and high-throughput rate data format converters. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
24Randall S. Janka, Linda M. Wills, Lewis Benton Baumstark Jr. Virtual Benchmarking and Model Continuity in Prototyping Embedded Multiprocessor Signal Processing Systems. Search on Bibsonomy IEEE Trans. Software Eng. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF model continuity, open-standards middleware, specification and design methodology, Hardware/software codesign
24Randall S. Janka, Linda M. Wills A novel codesign methodology for real-time embedded COTS multiprocessor-based signal processing systems. Search on Bibsonomy CODES The full citation details ... 2000 DBLP  DOI  BibTeX  RDF MPI/RT, VSIPL, specification and design methodology, middleware, MPI, embedded, COTS, multiprocessing, MAGIC
24Shih-Hsu Huang An effective low power design methodology based on interconnect prediction. Search on Bibsonomy SLIP The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
23Hiroki Koyasu, Yasuhiro Takahashi Current Pass Optimized Symmetric Pass Gate Adiabatic Logic for Cryptographic Circuits. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
23Salita Sombatsiri, Seiya Shibata, Yuki Kobayashi, Hiroaki Inoue, Takashi Takenaka, Takeo Hosomi, Jaehoon Yu, Yoshinori Takeuchi Parallelism-flexible Convolution Core for Sparse Convolutional Neural Networks on FPGA. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
23Kenshu Seto Scalar Replacement with Circular Buffers. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
23Seiya Shirakuni, Ittetsu Taniguchi, Hiroyuki Tomiyama Design and Evaluation of Asymmetric and Symmetric 32-core Architectures on FPGA. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
23Koichi Fujiwara, Kazushi Kawamura, Masao Yanagisawa, Nozomu Togawa An FPGA Implementation Method based on Distributed-register Architectures. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
23Nozomu Togawa Message from the Editor-in-Chief. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
23Takafumi Miyazaki, Shunsuke Takai, Ittetsu Taniguchi, Hiroyuki Tomiyama An OpenCL-based Software Framework for a Heterogeneous Multicore Architecture on Zynq-7000 SoC. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
23A. K. M. Mahfuzul Islam, Hidetoshi Onodera Circuit Techniques for Device-Circuit Interaction toward Minimum Energy Operation. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
23Bing Li 0005, Masanori Hashimoto, Ulf Schlichtmann From Process Variations to Reliability: A Survey of Timing of Digital Circuits in the Nanometer Era. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
23Nozomu Togawa Message from the Editor-in-Chief. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
23Daisuke Oku, Masao Yanagisawa, Nozomu Togawa Scan-based Side-channel Attack against HMAC-SHA-256 Circuits Based on Isolating Bit-transition Groups Using Scan Signatures. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
23Melanie Diepenbeck, Ulrich Kühne, Mathias Soeken, Daniel Große, Rolf Drechsler Behaviour Driven Development for Hardware Design. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
23Kenshu Seto Scalar Replacement with Polyhedral Model. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
23Ahmed Awad, Atsushi Takahashi 0001, Satoshi Tanaka, Chikaaki Kodama Intensity Difference Map (IDM) Accuracy Analysis for OPC Efficiency Verification and Further Enhancement. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
23Qian Zhao 0001, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi Towards Open-HW: A Platform to Design, Share and Deploy FPGA Accelerators in Low Cost. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
23Johann Knechtel, Ozgur Sinanoglu, Ibrahim Abe M. Elfadel, Jens Lienig, Cliff C. N. Sze Large-Scale 3D Chips: Challenges and Solutions for Design Automation, Testing, and Trustworthy Integration. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
23Farhan Shafiq, Tsuyoshi Isshiki, Dongju Li An Accurate and Fast Trace-aware Performance Estimation Model For Prioritized MPSoC Bus With Multiple Interfering Bus-Masters. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
23Xiaoqing Xu, David Z. Pan Toward Unidirectional Routing Closure in Advanced Technology Nodes. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
23Yusuke Matsunaga An Accelerating Technique for SAT-based ATPG. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
23Nozomu Togawa Message from the Editor-in-Chief. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
23Ri Cui, Kazuteru Namba A Calibration Technique for DVMC with Delay Time Controllable Inverter. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
23Yoshinobu Higami, Senling Wang, Hiroshi Takahashi, Shin-ya Kobayashi, Kewal K. Saluja Diagnosis Methods for Gate Delay Faults with Various Amounts of Delays. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
23Atsushi Hashimoto, Nagisa Ishiura Detecting Arithmetic Optimization Opportunities for C Compilers by Randomly Generated Equivalent Programs. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
23Michitarou Yabuuchi, Kazutoshi Kobayashi Size Optimization Technique for Logic Circuits that Considers BTI and Process Variations. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
23Yohei Umeki, Koji Yanagida, Shusuke Yoshimoto, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, Koji Tsunoda, Toshihiro Sugii A Counter-based Read Circuit Tolerant to Process Variation for 0.4-V Operating STT-MRAM. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
23Wing-Kai Chow, Evangeline F. Y. Young Placement: From Wirelength to Detailed Routability. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
23Nozomu Togawa Message from the Editor-in-Chief. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
23Nana Sutisna, Reina Hongyo, Leonardo Lanante, Yuhei Nagao, Masayuki Kurosaki, Hiroshi Ochi Unified HW/SW Co-Verification Methodology for High Throughput Wireless Communication System. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
23Amro Awad, Ganesh Balakrishnan, Yipeng Wang, Yan Solihin Accurate Cloning of the Memory Access Behavior. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
23Farhan Shafiq, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda A Fast Trace Aware Statistical Based Prediction Model with Burst Traffic Modeling for Contention Stall in A Priority Based MPSoC Bus. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
23Tulika Mitra Heterogeneous Multi-core Architectures. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Lian Zeng, Xin Jiang, Takahiro Watanabe A Performance Enhanced Dual-switch Network-on-chip Architecture. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera Layout Generator with Flexible Grid Assignment for Area Efficient Standard Cell. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Yuki Ando, Yukihito Ishida, Shinya Honda, Hiroaki Takada, Masato Edahiro Automatic Synthesis of Inter-heterogeneous-processor Communication for Programmable System-on-chip. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Yusaku Hirai, Shinya Yano, Toshimasa Matsuoka A Delta-Sigma ADC with Stochastic Quantization. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Arif Ullah Khan, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda Efficient Design Exploration Framework of SW/HW Systems Based on Tightly-coupled Thread Model. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Ran Zhang 0005, Tieyuan Pan, Li Zhu, Takahiro Watanabe Layer Assignment and Equal-length Routing for Disordered Pins in PCB Design. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Jishen Zhao, Cong Xu, Ping Chi, Yuan Xie 0001 Memory and Storage System Design with Nonvolatile Memory Technologies. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Hiroyuki Tomiyama Message from the Editor-in-Chief. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Zhiru Zhang, Deming Chen, Steve Dai, Keith A. Campbell High-level Synthesis for Low-power Design. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Takaaki Miyajima, David B. Thomas, Hideharu Amano Courier: A Toolchain for Application Acceleration on Heterogeneous Platforms. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Motoki Amagasaki, Qian Zhao 0001, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi A 3D FPGA Architecture to Realize Simple Die Stacking. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Matthias Jung 0001, Christian Weis, Norbert Wehn DRAMSys: A Flexible DRAM Subsystem Design Space Exploration Framework. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Salita Sombatsiri, Yoshinori Takeuchi, Masaharu Imai An Efficient Performance Estimation Method for Configurable Multi-layer Bus-based SoC. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Takuya Hatayama, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi An Allocation Optimization Method for Partially-reliable Scratch-pad Memory in Embedded Systems. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Hiroyuki Tomiyama Message from the Editor-in-Chief. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
23Krishnendu Chakrabarty, Mukesh Agrawal, Sergej Deutsch, Brandon Noia, Ran Wang 0002, Fangming Ye Test and Design-for-Testability Solutions for 3D Integrated Circuits. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
23Hao Zhang 0020, Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano Dynamic Power Consumption Optimization for Inductive-Coupling based Wireless 3D NoCs. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
23Jingcheng Zhuang, Robert Bogdan Staszewski All-Digital RF Phase-Locked Loops Exploiting Phase Prediction. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
23Eriko Nagai, Atsushi Hashimoto, Nagisa Ishiura Reinforcing Random Testing of Arithmetic Optimization of C Compilers by Scaling up Size and Number of Expressions. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
23Tsung-Yi Ho Design Automation for Digital Microfluidic Biochips. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
23Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada Impact of Resource Sharing and Register Retiming on Area and Performance of FPGA-based Designs. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
23Satoshi Jo, Takeshi Matsumoto, Masahiro Fujita SAT-based Automatic Rectification and Debugging of Combinational Circuits with LUT Insertions. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
23Hiroyuki Akasaka, Shin-ya Abe, Masao Yanagisawa, Nozomu Togawa Energy-efficient High-level Synthesis for HDR Architecture with Multi-stage Clock Gating. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
23Xin Jiang, Lian Zeng, Takahiro Watanabe A Sophisticated Routing Algorithm in 3D NoC with Fixed TSVs for Low Energy and Latency. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
23Yuta Hagio, Masao Yanagisawa, Nozomu Togawa A Delay-variation-aware High-level Synthesis Algorithm for RDR Architectures. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
23Yoichi Wakaba, Shin'ichi Wakabayashi, Shinobu Nagayama, Masato Inagi An Area Efficient Regular Expression Matching Engine Using Partial Reconfiguration for Quick Pattern Updating. Search on Bibsonomy IPSJ Trans. System LSI Design Methodology The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
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