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Publication years (Num. hits)
1983-1995 (38) 1996 (17) 1997-1999 (17) 2000 (19) 2001-2002 (23) 2003 (34) 2004 (32) 2005 (60) 2006 (78) 2007 (43) 2008 (69) 2009 (38) 2010 (36) 2011 (26) 2012 (19) 2013 (19) 2014 (16) 2015-2016 (29) 2017-2018 (28) 2019 (2)
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article(150) book(2) incollection(2) inproceedings(469) phdthesis(18) proceedings(2)
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Found 643 publication records. Showing 643 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
61Matthias Hanke, Tim Kranich, Mladen Berekovic, Yannis Papaefstathiou Low-Power Reconfigurable Architectures for High-Performance Mobile Nodes. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2010 DBLP  BibTeX  RDF
61Peter M. Athanas, Jürgen Becker, Jürgen Teich, Ingrid Verbauwhede 10281 Summary - Dynamically Reconfigurable Architectures. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2010 DBLP  BibTeX  RDF
61Peter M. Athanas, Jürgen Becker, Jürgen Teich, Ingrid Verbauwhede 10281 Abstracts Collection - Dynamically Reconfigurable Architectures. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2010 DBLP  BibTeX  RDF
61Jürgen Becker, Jürgen Teich, Gordon J. Brebner, Peter M. Athanas 06141 Executive Summary -- Dynamically Reconfigurable Architectures. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
61Rainer Buchty Reconfigurable Architectures and Instruction Sets: Programmability, Code Generation, and Program Execution. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
61Jürgen Becker, Jürgen Teich, Gordon J. Brebner, Peter M. Athanas 06141 Abstracts Collection -- Dynamically Reconfigurable Architectures. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
59Ittetsu Taniguchi, Kyoko Ueda, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai Task Partitioning Oriented Architecture Exploration Method for Dynamic Reconfigurable Architectures. Search on Bibsonomy VLSI-SoC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
54Juanjo Noguera, Rosa M. Badia HW/SW codesign techniques for dynamically reconfigurable architectures. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
52Sajid Baloch, Tughrul Arslan, Adrian Stoica An Efficient Fault Tolerance Scheme for Preventing Single Event Disruptions in Reconfigurable Architectures. Search on Bibsonomy FPL The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
50Giovanni Agosta, Francesco Bruschi, Marco D. Santambrogio, Donatella Sciuto A Data Oriented Approach to the Design of Reconfigurable Stream Decoders. Search on Bibsonomy ESTImedia The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
48Juanjo Noguera, Rosa M. Badia Multitasking on reconfigurable architectures: microarchitecture support and dynamic scheduling. Search on Bibsonomy ACM Trans. Embedded Comput. Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Adaptable architectures and microarchitectures, runtime support for dynamic reconfiguration, dynamic scheduling
48Peter M. Athanas, Jürgen Becker, Jürgen Teich, Ingrid Verbauwhede (eds.) Dynamically Reconfigurable Architectures, 11.07. - 16.07.2010 Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2010 DBLP  BibTeX  RDF
48Xiaolei Chen, Yajun Ha The Optimization of Interconnection Networks in FPGAs. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2010 DBLP  BibTeX  RDF
48Daniel Ziener, Jürgen Teich New Directions for IP Core Watermarking and Identification. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2010 DBLP  BibTeX  RDF
48Nele Mentens, Jo Vliegen, An Braeken, Abdellah Touhafi, Karel Wouters, Ingrid Verbauwhede Secure remote reconfiguration of FPGAs. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2010 DBLP  BibTeX  RDF
48Jens Huthmann, Peter Müller 0010, Florian Stock, Dietmar Hildenbrand, Andreas Koch 0001 Compiling Geometric Algebra Computations into Reconfigurable Hardware Accelerators. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2010 DBLP  BibTeX  RDF
48Branislav Hredzak, Oliver Diessel Towards Dilated Placement of Dynamic NoC Cores. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2010 DBLP  BibTeX  RDF
48Norbert Abel Design and Implementation of an Object-Oriented DPR-Framework. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2010 DBLP  BibTeX  RDF
48Jim Tørresen, Dirk Koch A new project to address run-time reconfigurable hardware systems. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2010 DBLP  BibTeX  RDF
48René Cumplido, Juan M. Campos, Claudia Feregrino Uribe, Jose Roberto Perez-Andrade Towards a reconfigurable hardware architecture for implementing a LDPC module suitable for software radio systems. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2010 DBLP  BibTeX  RDF
48Dirk Koch Advances in Component-based System Design and Partial Run-time Reconfiguration. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2010 DBLP  BibTeX  RDF
48Gerard J. M. Smit, Jan Kuper, Christiaan P. R. Baaij A mathematical approach towards hardware design. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2010 DBLP  BibTeX  RDF
48Walter Stechele, Christopher Claus, Andreas Laika Lessons Learned from last 4 Years of Reconfigurable Computing. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2010 DBLP  BibTeX  RDF
48Peter M. Athanas, Jürgen Becker, Gordon J. Brebner, Jürgen Teich (eds.) Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006 Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
48Oliver Diessel, Shannon Koh Enabling RTR for industry. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
48Klaus Waldschmidt, Jan Haase, Andreas Hofmann, Markus Damm, Dennis Hauser Reliability-Aware Power Management Of Multi-Core Systems (MPSoCs). Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
48Peter M. Athanas The (empty?) Promise of FPGA Supercomputing. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
48Sven Heithecker, Amilcar do Carmo Lucas, Rolf Ernst FlexFilm - an Image Processor for Digital Film Processing. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
48David A. Kearney, Mark Jasiunas Managing power amongst a group of networked embedded fpgas using dynamic reconfiguration and task migration. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
48Diana Göhringer, Mateusz Majer, Jürgen Teich Bridging the Gap between Relocatability and Available Technology: The Erlangen Slot Machine. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
48József Vásárhelyi, Péter Serfözö Analysis of Mojette Transform Implementation on Reconfigurable Hardware. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
48Peter Zipf, Manfred Glesner Towards an Automated Design of Application-specific Reconfigurable Logic. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
48Douglas L. Maskell, Timothy F. Oliver Pre-Routed FPGA Cores for Rapid System Construction in a Dynamic Reconfigurable System. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
48Sunil Shukla, Neil W. Bergmann, Jürgen Becker QUKU: A Coarse Grained Paradigm for FPGAs. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
48Gerard J. M. Smit, André B. J. Kokkeler, Pascal T. Wolkotte, Marcel D. van de Burgwal, Paul M. Heysters Efficient architectures for streaming applications. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
48Norbert Wehn, Timo Vogt, Christian Neeb A Reconfigurable Outer Modem Platform for Future Communications Systems. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
48Walter Stechele Dynamically Reconfigurable Systems-on-Chip. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
48Andreas Herkersdorf, Christopher Claus, Michael Meitinger, Rainer Ohlendorf, Thomas Wild Reconfigurable Processing Units vs. Reconfigurable Interconnects. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
48Florian Dittmann 0001 Reconfiguration Time Aware Processing on FPGAs. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
48Jürgen Becker, Michael Hübner, Katarina Paulsson Physical 2D Morphware and Power Reduction Methods for Everyone. Search on Bibsonomy Dynamically Reconfigurable Architectures The full citation details ... 2006 DBLP  BibTeX  RDF
47Fredy Rivera, Marcos Sanchez-Elez, Milagros Fernández, Román Hermida, Nader Bagherzadeh Efficient mapping of hierarchical trees on coarse-grain reconfigurable architectures. Search on Bibsonomy CODES+ISSS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF multimedia, computer graphics, reconfigurable architectures, SIMD, hierarchical trees
46Kees A. Vissers Parallel Processing Architectures for Reconfigurable Systems. Search on Bibsonomy DATE The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
45Kang Sun, Jun Zheng, Yuanyuan Li, Xuezeng Pan Design of a Simulator for Mesh-Based Reconfigurable Architectures. Search on Bibsonomy NPC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF simulator, reconfigurable computing, dynamic reconfiguration, reconfigurable mesh
45Juanjo Noguera, Rosa M. Badia Run-Time HW/SW Codesign for Discrete Event Systems using Dynamically Reconfigurable Architectures. Search on Bibsonomy ISSS The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
44Sebastian Lange, Martin Middendorf Design Aspects of Multi-level Reconfigurable Architectures. Search on Bibsonomy Signal Processing Systems The full citation details ... 2008 DBLP  DOI  BibTeX  RDF multi-level reconfiguration, dynamic reconfiguration, reconfigurable architecture
44Carl Ebeling, Chris Fisher, Guanbin Xing, Manyuan Shen, Hui Liu 0011 Implementing an OFDM Receiver on the RaPiD Reconfigurable Architecture. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Data communications devices, application studies resulting in better multiple-processor systems, reconfigurable hardware, wireless systems, special-purpose and application-based systems, adaptable architectures, heterogeneous (hybrid) systems, design studies, signal processing systems
43Kiran Bondalapati, Viktor K. Prasanna Mapping Loops onto Reconfigurable Architectures. Search on Bibsonomy FPL The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
41Leipo Yan, Thambipillai Srikanthan, Niu Gang Area and delay estimation for FPGA implementation of coarse-grained reconfigurable architectures. Search on Bibsonomy LCTES The full citation details ... 2006 DBLP  DOI  BibTeX  RDF CGRA, VLIW, hardware/software partitioning, delay estimation, area estimation
41Sebastian Lange, Martin Middendorf Multi-level reconfigurable architectures in the switch model. Search on Bibsonomy IPDPS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
41Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon Metrics for Reconfigurable Architectures Characterization: Remanence and Scalability. Search on Bibsonomy IPDPS The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
41Kazuya Tanigawa, Tetsuo Hironaka, Akira Kojima, Noriyoshi Yoshida A Generalized Execution Model for Programming on Reconfigurable Architectures and an Architecture Supporting the Model. Search on Bibsonomy FPL The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
38Taewook Oh, Bernhard Egger, Hyunchul Park 0001, Scott A. Mahlke Recurrence cycle aware modulo scheduling for coarse-grained reconfigurable architectures. Search on Bibsonomy LCTES The full citation details ... 2009 DBLP  DOI  BibTeX  RDF software pipelining, placement and routing, coarse-grained reconfigurable architectures
38Ricardo S. Ferreira, Alisson Garcia, Tiago Teixeira, João M. P. Cardoso A Polynomial Placement Algorithm for Data Driven Coarse-Grained Reconfigurable Architectures. Search on Bibsonomy ISVLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
38Chris Sullivan, Alex Wilson, Stephen P. G. Chappell Deterministic Hardware Synthesis for Compiling High-Level Descriptions to Heterogeneous Reconfigurable Architectures. Search on Bibsonomy HICSS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
38Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins Exploiting Loop-Level Parallelism on Coarse-Grained Reconfigurable Architectures Using Modulo Scheduling. Search on Bibsonomy DATE The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
38Nicolas Ventroux, Stéphane Chevobbe, Frédéric Blanc 0001, Thierry Collette An Auto-adaptative Reconfigurable Architecture for the Control. Search on Bibsonomy Asia-Pacific Computer Systems Architecture Conference The full citation details ... 2004 DBLP  DOI  BibTeX  RDF adaptative reconfigurable architecture, control parallelism, dynamic reconfiguration
36Sudarshan Banerjee, Elaheh Bozorgzadeh, Nikil D. Dutt Physically-aware HW-SW partitioning for reconfigurable architectures with partial dynamic reconfiguration. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF HW-SW partitioning, linear placement, partial dynamic reconfiguration
36Mauricio Ayala-Rincón, Carlos H. Llanos, Ricardo P. Jacobi, Reiner W. Hartenstein Prototyping time- and space-efficient computations of algebraic operations over dynamically reconfigurable systems modeled by rewriting-logic. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Term Rewriting Systems (TRS), algebraic manipulation, dynamically reconfigurable systems, Fast Fourier Transform (FFT), reconfigurable computing, systolic arrays, rewriting-logic
35Tobias Becker, Peter Jamieson, Wayne Luk, Peter Y. K. Cheung, Tero Rissa Towards benchmarking energy efficiency of reconfigurable architectures. Search on Bibsonomy FPL The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
35Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon Dynamic hardware multiplexing for coarse grain reconfigurable architectures. Search on Bibsonomy FPGA The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
35Steven K. Sinha, Peter Kamarchik, Seth Copen Goldstein Tunable Fault Tolerance for Runtime Reconfigurable Architectures. Search on Bibsonomy FCCM The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
35Srihari Cadambi, Seth Copen Goldstein Efficient Place and Route for Pipeline Reconfigurable Architectures. Search on Bibsonomy ICCD The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
35Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis The Molen compiler for reconfigurable processors. Search on Bibsonomy ACM Trans. Embedded Comput. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF FPGA, reconfigurable computing, Instruction scheduling
35Ronald Hecht, Stephan Kubisch, H. Michelsen, Elmar Zeeb, Dirk Timmermann A distributed object system approach for dynamic reconfiguration. Search on Bibsonomy IPDPS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
33Nikhil Bansal, Sumit Gupta, Nikil D. Dutt, Alexandru Nicolau, Rajesh Gupta 0001 Network Topology Exploration of Mesh-Based Coarse-Grain Reconfigurable Architectures. Search on Bibsonomy DATE The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
33Jong-eun Lee, Kiyoung Choi, Nikil D. Dutt An algorithm for mapping loops onto coarse-grained reconfigurable architectures. Search on Bibsonomy LCTES The full citation details ... 2003 DBLP  DOI  BibTeX  RDF ALU array, memory bandwidth utilization, coarse-grained reconfigurable architecture, mapping algorithm
33Florian Thoma, Matthias Kühnle, Philippe Bonnot 0001, Elena Moscu Panainte, Koen Bertels, Sebastian Goller, Axel Schneider, Stéphane Guyetant, Eberhard Schüler, Klaus D. Müller-Glaser, Jürgen Becker MORPHEUS: Heterogeneous Reconfigurable Computing. Search on Bibsonomy FPL The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
33Tien-Fu Chen, Chia-Ming Hsu, S.-R. Wu Flexible Heterogeneous Multicore Architectures for Versatile Media Processing Via Customized Long Instruction Words. Search on Bibsonomy IEEE Trans. Circuits Syst. Video Techn. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
32Carlo Curino, Luca Fossati, Vincenzo Rana, Francesco Redaelli, Marco D. Santambrogio, Donatella Sciuto The Shining embedded system design methodology based on self dynamic reconfigurable architectures. Search on Bibsonomy ASP-DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
32Matthew A. Watkins, Mark J. Cianchetti, David H. Albonesi Shared reconfigurable architectures for CMPS. Search on Bibsonomy FPL The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
32Fredy Rivera, Milagros Fernández, Nader Bagherzadeh An Approach to Execute Conditional Branches onto SIMD Multi-Context Reconfigurable Architectures. Search on Bibsonomy DSD The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
32Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon Automatic Task Scheduling / Loop Unrolling using Dedicated RTR Controllers in Coarse Grain Reconfigurable Architectures. Search on Bibsonomy IPDPS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
31Adriano Idalgo, Nahri Moreano DNA Physical Mapping on a Reconfigurable Platform. Search on Bibsonomy ARC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Consecutive ones problem, Software/hardware partitioning, Reconfigurable architectures
30Jürgen Becker, Adam Donlin, Michael Hübner New tool support and architectures in adaptive reconfigurable computing. Search on Bibsonomy VLSI-SoC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
30Yoonjin Kim, Mary Kiemb, Chulsoo Park, Jinyong Jung, Kiyoung Choi Resource Sharing and Pipelining in Coarse-Grained Reconfigurable Architecture for Domain-Specific Optimization. Search on Bibsonomy DATE The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
30Peter Jamieson, Tobias Becker, Wayne Luk, Peter Y. K. Cheung, Tero Rissa, Teemu Pitkänen Benchmarking Reconfigurable Architectures in the Mobile Domain. Search on Bibsonomy FCCM The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Mobile Domain, FPGA, Low Power, Reconfigurable Architectures
30Paolo Bonzini, Giovanni Ansaloni, Laura Pozzi Compiling custom instructions onto expression-grained reconfigurable architectures. Search on Bibsonomy CASES The full citation details ... 2008 DBLP  DOI  BibTeX  RDF horizontal microprogramming, compilers, instruction set extensions, coarse-grained reconfigurable architectures, data-flow architectures
30Juanjo Noguera, Rosa M. Badia Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures. Search on Bibsonomy CODES The full citation details ... 2002 DBLP  DOI  BibTeX  RDF dynamic run-time scheduling, reconfigurable architectures
29Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis A Compiler Method for Memory-Conscious Mapping of Applications on Coarse-Grained Reconfigurable Architectures. Search on Bibsonomy IPDPS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
29Seonil Choi, Ju-wook Jang, Sumit Mohanty, Viktor K. Prasanna Domain-Specific Modeling for Rapid Energy Estimation of Reconfigurable Architectures. Search on Bibsonomy The Journal of Supercomputing The full citation details ... 2003 DBLP  DOI  BibTeX  RDF FPGA, energy optimization, domain-specific modeling, energy estimation
29Jong-eun Lee, Kiyoung Choi, Nikil D. Dutt Compilation Approach for Coarse-Grained Reconfigurable Architectures. Search on Bibsonomy IEEE Design & Test of Computers The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
29Juanjo Noguera, Rosa M. Badia System-level power-performance trade-offs in task scheduling for dynamically reconfigurable architectures. Search on Bibsonomy CASES The full citation details ... 2003 DBLP  DOI  BibTeX  RDF reconfigurable computing, dynamic scheduling, clock-gating, frequency scaling, power-performance trade-offs
29Kiran Bondalapati, Viktor K. Prasanna Dynamic Precision Management for Loop Computations on Reconfigurable Architectures. Search on Bibsonomy FCCM The full citation details ... 1999 DBLP  DOI  BibTeX  RDF Reconfigurable Computing, Precision, Loops
29Dawei Wang, Sikun Li, Yong Dou Collaborative hardware/software partition of coarse-grained reconfigurable system using evolutionary ant colony optimization. Search on Bibsonomy ASP-DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
29Sikun Li, Dawei Wang, Tun Li, Yong Dou Distributed Collaborative Partition Method of Reconfigurable SoC Using Ant Colony Optimization. Search on Bibsonomy CSCWD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
29Ulrich Ramacher Software-Defined Radio Prospects for Multistandard Mobile Phones. Search on Bibsonomy IEEE Computer The full citation details ... 2007 DBLP  DOI  BibTeX  RDF mobile phone standard, software-defined radio technologies, MuSIC-1 chip, SDR baseband processors, reconfigurable architectures, embedded computing
28Yuzhong Jiao, Xin'an Wang, Xuewen Ni A Fully Data-Driven Reconfigurable Architecture with Very Coarse-Grained Execution Units. Search on Bibsonomy Infoscale The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Processing element (PE), Execution unit (EU), Very-coarse-grained, Fully-data-driven, Reconfigurable architecture
27Dmitrij Kissler, Andreas Strawetz, Frank Hannig, Jürgen Teich Power-Efficient Reconfiguration Control in Coarse-Grained Dynamically Reconfigurable Architectures. Search on Bibsonomy PATMOS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
27Lilian Bossuet, Guy Gogniat, Jean Luc Philippe Communication Costs Driven Design Space Exploration for Reconfigurable Architectures. Search on Bibsonomy FPL The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
27Madhura Purnaprajna, Christoph Puttmann, Mario Porrmann Power Aware Reconfigurable Multiprocessor for Elliptic Curve Cryptography. Search on Bibsonomy DATE The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
27Stéphane Chevobbe, Nicolas Ventroux, Frédéric Blanc 0001, Thierry Collette RAMPASS: Reconfigurable and Advanced Multi-processing Architecture for Future Silicon Systems. Search on Bibsonomy SAMOS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
27Mauricio Ayala-Rincón, Rodrigo B. Nogueira, Carlos H. Llanos, Ricardo P. Jacobi, Reiner W. Hartenstein Modeling a Reconfigurable System for Computing the FFT in Place via Rewriting-Logic. Search on Bibsonomy SBCCI The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
26Mythri Alle, Keshavan Varadarajan, Alexander Fell, S. K. Nandy, Ranjani Narayan Compiling Techniques for Coarse Grained Runtime Reconfigurable Architectures. Search on Bibsonomy ARC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
26Ozana Silvia Dragomir, Todor Stefanov, Koen Bertels Loop unrolling and shifting for reconfigurable architectures. Search on Bibsonomy FPL The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
26Josef Angermeier, Mateusz Majer, Jürgen Teich, Lars Braun, Tobias Schwalb, Philipp Graf, Michael Hübner, Jürgen Becker, Enno Lübbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker Fine grain reconfigurable architectures. Search on Bibsonomy FPL The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
26Markus Koester, Mario Porrmann, Ulrich Rückert 0001 Placement-Oriented Modeling of Partially Reconfigurable Architectures. Search on Bibsonomy IPDPS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
26Fredy Rivera, Marcos Sanchez-Elez, Milagros Fernández, Román Hermida, Nader Bagherzadeh Low Power Data Prefetch for 3D Image Applications on Coarse-Grain Reconfigurable Architectures. Search on Bibsonomy IPDPS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
26Sébastien Bilavarn, Guy Gogniat, Jean Luc Philippe, Lilian Bossuet Fast prototyping of reconfigurable architectures from a C program. Search on Bibsonomy ISCAS (5) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
26Marcos Sanchez-Elez, Milagros Fernández, Manuel L. Anido, Haitao Du, Nader Bagherzadeh, Román Hermida Low Energy Data Management for Different On-Chip Memory Levels in Multi-Context Reconfigurable Architectures. Search on Bibsonomy DATE The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
26Marcos Sanchez-Elez, Milagros Fernández, Rafael Maestre, Román Hermida, Nader Bagherzadeh, Fadi J. Kurdahi A Complete Data Scheduler for Multi-Context Reconfigurable Architectures. Search on Bibsonomy DATE The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
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