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Publication types (Num. hits)
article(9204) book(46) incollection(174) inproceedings(21225) phdthesis(482) proceedings(120)
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CoRR(992) CODES+ISSS(696) DAC(654) INTERSPEECH(638) IEEE Trans. on CAD of Integrat...(580) CASES(563) SSW(528) ICASSP(510) LOPSTR(500) ICMC(440) ALIFE(428) ICCAD(415) DATE(405) VLSI Design(323) ISCAS(301) ASP-DAC(288) More (+10 of total 3369)
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Found 31251 publication records. Showing 31251 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
70Mark Genoe, Paul Vanoostende, Geert van Wauwe On the use of VHDL-based behavioral synthesis for telecom ASIC design. Search on Bibsonomy ISSS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF Alcatel-Bell, RTL-synthesizable description, behavioral synthesis tools, hardware CAD tool, system level design methodology, telecom ASIC design, telecom system hardware design, high level synthesis, VHDL, VHDL, application specific integrated circuits, ASIC, logic synthesis, integrated circuit design, hardware description languages, integrated logic circuits, behavioral synthesis, telecommunication computing, hardware software codesign, design complexities
58Greg Stitt, Frank Vahid Binary synthesis. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Binary synthesis, synthesis from software binaries, FPGA, hardware/software codesign, hardware/software partitioning, configurable logic, warp processors
53Sylvain Lefebvre 0001, Hugues Hoppe Appearance-space texture synthesis. Search on Bibsonomy ACM Trans. Graph. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF RTT synthesis, anisometric synthesis, exemplar-based synthesis, feature-based synthesis, dimensionality reduction, surface textures
53J. Williams, Mark J. Clement Distributed Polyphonic Music Synthesis. Search on Bibsonomy HPDC The full citation details ... 1997 DBLP  DOI  BibTeX  RDF polyphonic music synthesis, music synthesis, distributed music synthesis, Csound music synthesis package, multiple servers, networks, music, communication protocols, distributed multimedia
53Ilya Issenin, Nikil D. Dutt Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications. Search on Bibsonomy CODES+ISSS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF customized memory hierarchy, hierarchical TDMA buses, data reuse, multiprocessor system-on-chip, communication synthesis
52Jan Madsen, Bjarne Hald An approach to interface synthesis. Search on Bibsonomy ISSS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF channel optimization, client-side interface description, client/server module synthesis, communication events formalization, existing module reuse, multiple client/server environment, one-sided interface description, server interface description, software reusability, application program interfaces, client-server systems, subroutines, interface synthesis, point-to-point communication
51Jian Liu, Jicheng Fu, Yansheng Zhang, Farokh B. Bastani, I-Ling Yen, Ann T. Tai, Savio N. Chau Deductive Glue Code Synthesis for Embedded Software Systems Based on Code Patterns. Search on Bibsonomy ISORC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Automated code synthesis, Deductive code synthesis, Real-time system, Code patterns
49Bengt Svantesson, Ahmed Hemani, Peeter Ellervee, Adam Postula, Johnny Öberg, Axel Jantsch, Hannu Tenhunen A Novell Allocation Strategy for Control and Memory Intensive Telecommunication Circiuts. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF Application specific High-Level Synthesis, High-Level Synthesis for telecommunication, ATM
48Alessandro Balboni, William Fornaciari, M. Vincenzi, Donatella Sciuto The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems. Search on Bibsonomy ISSS The full citation details ... 1996 DBLP  DOI  BibTeX  RDF virtual instruction set, control-dominated hardware-software system, retargetable code synthesis, real-time systems, embedded systems, software development, performance estimation, embedded computing, software synthesis, real-time constraints, system synthesis, static scheduling
46Ti-Yen Yen, Wayne H. Wolf Communication synthesis for distributed embedded systems. Search on Bibsonomy ICCAD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF analysis algorithm, real-time systems, embedded systems, CAD, distributed processing, distributed embedded systems, interprocess communication, delay bounds, system buses, communication links, co-synthesis, synthesis algorithm, hardware-software co-synthesis
46Chih-Tung Chen, Kayhan Küçükçakar High-level scheduling model and control synthesis for a broad range of design applications. Search on Bibsonomy ICCAD The full citation details ... 1997 DBLP  DOI  BibTeX  RDF multi-phase clocking, relative scheduling, architectural power optimization, high-level synthesis, pipelining, multi-threading, behavioral synthesis, control synthesis, architectural synthesis, scheduling model
46H. Fatih Ugurdag, Thomas E. Fuhrman Autocircuit: a clock edge general behavioral synthesis system with a direct path to physical datapath. Search on Bibsonomy ICCD The full citation details ... 1996 DBLP  DOI  BibTeX  RDF Autocircuit, clock edge general behavioral synthesis system, physical datapaths, next-generation synthesis tool, behavioral HDL input descriptions, data-flow representations, use-trees, raw-states, word-oriented synthesis, unique parameterized netlist representation, high level synthesis, high-level design
45Vladimir Castro Alves, A. Ribeiro Antunes, Meryem Marzouki A Pragmatic, Systematic And Flexible Synthesis For Testability Methodology. Search on Bibsonomy Asian Test Symposium The full citation details ... 1996 DBLP  DOI  BibTeX  RDF high-level synthesis for testability, systematic flexible synthesis, testability methodology, industrial tools, pragmatic synthesis, AMICAL synthesis, programmable test pattern generation, BUS-based circuit, embedded test paths, high level synthesis, design for testability, BIST, automatic generation, data path, scan path
44Eike Grimpe, Frank Oppenheimer Extending the SystemC synthesis subset by object-oriented features. Search on Bibsonomy CODES+ISSS The full citation details ... 2003 DBLP  DOI  BibTeX  RDF C/C++ based design, object-orientation, high-level synthesis, SystemC, system level design, hardware description language, hardware synthesis
44James D. Edge, Adrian Hilton, Philip J. B. Jackson Model-based synthesis of visual speech movements from 3D video. Search on Bibsonomy SIGGRAPH Posters The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
44Jean-Marc Daveau, Tarek Ben Ismail, Ahmed Amine Jerraya Synthesis of system-level communication by an allocation-based approach. Search on Bibsonomy ISSS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF allocation-based approach, high level primitives, interconnected processes, protocol selection, system-level communication synthesis, protocols, high level synthesis, systems analysis, cost function, interface synthesis, communication control
44Saurabh Srivastava 0001, Sumit Gulwani, Jeffrey S. Foster From program verification to program synthesis. Search on Bibsonomy POPL The full citation details ... 2010 DBLP  DOI  BibTeX  RDF proof-theoretic program synthesis, verification
44J. C. Hwang, C. W. Huang, C. T. Cheng The Development of Load Characteristics Information Network System to Improve the Estimated Efficiency of Load Synthesis in Taipower. Search on Bibsonomy ICICIC (1) The full citation details ... 2006 DBLP  DOI  BibTeX  RDF load survey, load synthesis, network database, customer management
44Vijay Raghunathan, Srivaths Ravi 0001, Ganesh Lakshminarayana High-Level Synthesis with Variable-Latency Components. Search on Bibsonomy VLSI Design The full citation details ... 2000 DBLP  DOI  BibTeX  RDF variable latency units, data dependent computation, area-delay tradeoffs, High-level synthesis, performance optimization
44Oliver Bringmann 0001, Wolfgang Rosenstiel, Annette Muth, Georg Färber, Frank Slomka, Richard Hofmann Mixed Abstraction Level Hardware Synthesis from SDL for Rapid Prototyping. Search on Bibsonomy IEEE International Workshop on Rapid System Prototyping The full citation details ... 1999 DBLP  DOI  BibTeX  RDF Synthesis Methodology, Configurable VHDL Components, VHDL, Rapid Prototyping, SDL
43Saghir A. Shaikh, Jitendra Khare, Hans T. Heineken Manufacturability and Testability Oriented Synthesis. Search on Bibsonomy VLSI Design The full citation details ... 2000 DBLP  DOI  BibTeX  RDF Synthesis Optimization, CAD, System on Chip, Design for Manufacturability, High Level Test Synthesis
43Bharat P. Dave, Niraj K. Jha COHRA: Hardware-Software Co-Synthesis of Hierarchical Distributed Embedded System Architectures. Search on Bibsonomy VLSI Design The full citation details ... 1998 DBLP  DOI  BibTeX  RDF scheduling, distributed systems, embedded systems, hierarchy, allocation, system synthesis, hardware-software co-synthesis
42Mihhail Matskin, Enn Tyugu Strategies of Structural Synthesis of Programs. Search on Bibsonomy ASE The full citation details ... 1997 DBLP  DOI  BibTeX  RDF structural program synthesis strategies, deductive program synthesis method, compositional programming, decidable logical calculus, PSPACE complexity, independent subtasks, iteration synthesis, regular data structures, heuristics, programming environments, structured programming, proof search, search efficiency
42Ashutosh Mujumdar, Rajiv Jain, Kewal K. Saluja Incorporating testability considerations in high-level synthesis. Search on Bibsonomy J. Electronic Testing The full citation details ... 1994 DBLP  DOI  BibTeX  RDF Automatic synthesis of testable designs, loop breaking, high-level synthesis, binding, synthesis for testability
42Miodrag Potkonjak, Wayne H. Wolf Cost optimization in ASIC implementation of periodic hard-real time systems using behavioral synthesis techniques. Search on Bibsonomy ICCAD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF allocation algorithms, behavioral synthesis techniques, datapath synthesis criteria, multiple computational tasks, multiple-task examples, periodic hard-real time systems, real-time systems, high level synthesis, logic design, application specific integrated circuits, circuit CAD, circuit optimisation, cost optimization, rate-monotonic scheduling, task sharing, synthesis algorithm, ASIC implementation
40Hirozumi Yamaguchi, Khaled El-Fakih, Gregor von Bochmann, Teruo Higashino Protocol synthesis and re-synthesis with optimal allocation of resources based on extended Petri nets. Search on Bibsonomy Distributed Computing The full citation details ... 2003 DBLP  DOI  BibTeX  RDF Protocol re-synthesis, Distributed system, Petri net, Service specification, Protocol specification, Protocol synthesis
40Ali Dasdan Efficient algorithms for debugging timing constraint violations. Search on Bibsonomy Timing Issues in the Specification and Synthesis of Digital Systems The full citation details ... 2002 DBLP  DOI  BibTeX  RDF over-constraint resolution, scheduling, high-level synthesis, constraint satisfaction, timing constraints, behavioral synthesis, rate analysis
40Jason Cong, Kirill Minkovich Optimality Study of Logic Synthesis for LUT-Based FPGAs. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
40Bernd Finkbeiner, Sven Schewe Semi-automatic Distributed Synthesis. Search on Bibsonomy ATVA The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
40Reinaldo A. Bergamaschi Bridging the domains of high-level and logic synthesis. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
40Christian Blumenröhr, Dirk Eisenbiegler, Detlef Schmid On the efficiency of formal synthesis-experimental results. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
40Alex Orailoglu Microarchitectural synthesis for rapid BIST testing. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
40Viktor Kuncak, Mikaël Mayer, Ruzica Piskac, Philippe Suter Complete functional synthesis. Search on Bibsonomy PLDI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF bapa, synthesis procedure, decision procedure, presburger arithmetic
39Hideyuki Mizuno, Satoshi Takahashi Unit selection using k-nearest neighbor search for concatenative speech synthesis. Search on Bibsonomy IUCS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF concatenative speech synthesis, synthesis unit selection, nearest neighbor search, text to speech
39Sylvain Lefebvre 0001, Hugues Hoppe Parallel controllable texture synthesis. Search on Bibsonomy ACM Trans. Graph. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Gaussian stack, coordinate jitter, data amplification, neighborhood matching, runtime content synthesis, synthesis magnification
39Byoungro So, Pedro C. Diniz, Mary W. Hall Using estimates from behavioral synthesis tools in compiler-directed design space exploration. Search on Bibsonomy DAC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF synthesis techniques for reconfigurable computing, field-programmable-gate-array, high-level synthesis, rapid prototyping, design space exploration
39Bharat P. Dave, Niraj K. Jha CASPER: Concurrent Hardware-Software Co-Synthesis of Hard Real-Time Aperiodic and Periodic Specifications of Embedded System Architectures. Search on Bibsonomy DATE The full citation details ... 1998 DBLP  DOI  BibTeX  RDF aperiodic task graphs, scheduling, distributed systems, embedded systems, allocation, system synthesis, hardware-software co-synthesis
39S. C. Chan, Andrew K. C. Wong Synthesis and Recognition of Sequences. Search on Bibsonomy IEEE Trans. Pattern Anal. Mach. Intell. The full citation details ... 1991 DBLP  DOI  BibTeX  RDF sequences synthesis, sequences recognition, hierarchical sequence synthesis procedure, taxonomic hierarchy, unsupervised classification procedure, pattern recognition, probability, alignment, supervised classification, alphabet
39Raul Camposano Behavior-Preserving Transformations for High-Level Synthesis. Search on Bibsonomy Hardware Specification, Verification and Synthesis The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
38Indradeep Ghosh, Anand Raghunathan, Niraj K. Jha Design for hierarchical testability of RTL circuits obtained by behavioral synthesis. Search on Bibsonomy ICCD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF design for hierarchical testability, gate-level sequential test generation, controller data path circuits, large data path bit-widths, minimal test hardware, system-level test set, logic testing, high level synthesis, high level synthesis, integrated circuit testing, design for testability, design for testability, automatic testing, logic CAD, integrated circuit design, behavioral synthesis, logic gates, register-transfer level design, RTL circuits
37Farhana Sheikh, Andreas Kuehlmann, Kurt Keutzer Minimum-power retiming for dual-supply CMOS circuits. Search on Bibsonomy Timing Issues in the Specification and Synthesis of Digital Systems The full citation details ... 2002 DBLP  DOI  BibTeX  RDF dual-supply, retiming theory, low-power, synthesis, low-power design
36Mukund Sivaraman, Shail Aditya Cycle-time aware architecture synthesis of custom hardware accelerators. Search on Bibsonomy CASES The full citation details ... 2002 DBLP  DOI  BibTeX  RDF embedded hardware architecture synthesis, operator chaining, target clock period, timing during scheduling, high-level synthesis, timing analysis, delay analysis, clock frequency
36Krishnendu Chatterjee, Thomas A. Henzinger Assume-Guarantee Synthesis. Search on Bibsonomy TACAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
36Orna Kupferman, Nir Piterman, Moshe Y. Vardi Safraless Compositional Synthesis. Search on Bibsonomy CAV The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
36Keoncheol Shin, Taewhan Kim Tight integration of timing-driven synthesis and placement of parallel multiplier circuits. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
36Yuan Yun, Liping Wang 0001, Liwen Guan Dimensional synthesis of a 3-DOF parallel manipulator. Search on Bibsonomy SMC (6) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
36Áprád Furka Combinatorial synthesis on macroscopic solid support units. Search on Bibsonomy RECOMB The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
36Abderrazek Jemai, Polen Kission, Ahmed Amine Jerraya Architectural Simulation in the Context of Behavioral Synthesis. Search on Bibsonomy DATE The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
36Anand Raghunathan, Niraj K. Jha SCALP: an iterative-improvement-based low-power data path synthesis system. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
36Miodrag Potkonjak, Anantha Chandrakasan Synthesis and selection of DCT algorithms using behavioral synthesis-based algorithm space exploration. Search on Bibsonomy ICIP The full citation details ... 1995 DBLP  DOI  BibTeX  RDF DCT algorithms, behavioral synthesis-based algorithm space exploration, high level synthesis tools, behavioral design space, IC implementation, image processing, image processing, high level synthesis, discrete cosine transforms, discrete cosine transform, application specific integrated circuits, circuit layout CAD, video processing, fast algorithms, video signal processing, digital signal processing chips, design space
36Frank Vahid Procedure exlining: a transformation for improved system and behavioral synthesis. Search on Bibsonomy ISSS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF VHDL transformation tool, distinct computation, procedure exlining, procedure inlining, redundant sequences, statements, formal specification, distributed processing, VHDL, hardware description languages, remote procedure calls, behavioral synthesis, behavioral specification, system synthesis, procedure calls, synthesis tools
36Herman Schmit, Donald E. Thomas Array mapping in behavioral synthesis. Search on Bibsonomy ISSS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF array grouping, array mapping, memory components, memory design space, schedule length, scheduling, data structures, memory architecture, hardware description languages, binding, behavioral synthesis, access times, design representation, hardware synthesis, synthesis tool
36Oleg Golubitsky, Sean M. Falconer, Dmitri Maslov Synthesis of the optimal 4-bit reversible circuits. Search on Bibsonomy DAC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF quantum computing, logic synthesis, reversible circuits
36Li-Yi Wei, Jianwei Han, Kun Zhou, Hujun Bao, Baining Guo, Heung-Yeung Shum Inverse texture synthesis. Search on Bibsonomy ACM Trans. Graph. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF GPU techniques, texture mapping, texture synthesis
36Rastislav Bodík Software synthesis with sketching. Search on Bibsonomy PEPM The full citation details ... 2008 DBLP  DOI  BibTeX  RDF synthesis
36Jason Cong, Kirill Minkovich Optimality study of logic synthesis for LUT-based FPGAs. Search on Bibsonomy FPGA The full citation details ... 2006 DBLP  DOI  BibTeX  RDF optimization, logic synthesis, technology mapping, Boolean logic, FPGA lookup table
36Chuanliang Xia Analysis of Properties of Petri Synthesis Net. Search on Bibsonomy TAMC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF liveness and boundedness, Petri nets, synthesis, analysis
36Steve Zelinka, Michael Garland Jump map-based interactive texture synthesis. Search on Bibsonomy ACM Trans. Graph. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Interactive texture synthesis, jump maps, texturing surfaces
36U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee An algorithm for synthesis of large time-constrained heterogeneous adaptive systems. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF delay/cost table, hierarchical control data-flow graph, time-constrained synthesis, pipelining, reconfigurable computing, mixed integer linear programming, list scheduling
35Sumit Gulwani Dimensions in program synthesis. Search on Bibsonomy PPDP The full citation details ... 2010 DBLP  DOI  BibTeX  RDF deductive synthesis, inductive synthesis, sat solving, smt solving, machine learning, genetic programming, programming by demonstration, belief propagation, programming by examples, probabilistic inference
35Lech Józwiak, Artur Chojnacki, Aleksander Slusarczyk High-Quality Circuit Synthesis for Modern Technologies. Search on Bibsonomy ISQED The full citation details ... 2008 DBLP  DOI  BibTeX  RDF nano CMOS technologies, high-speed and low-power circuits, information-driven synthesis, multi-objective optimization, circuit synthesis
35Ganesh Ramanarayanan, Kavita Bala Constrained Texture Synthesis via Energy Minimization. Search on Bibsonomy IEEE Trans. Vis. Comput. Graph. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF detail synthesis, image analogies, Texture synthesis, super-resolution
35Girish Venkataramani, Tiberiu Chelcea, Seth Copen Goldstein, Tobias Bjerregaard SOMA: a tool for synthesizing and optimizing memory accesses in ASICs. Search on Bibsonomy CODES+ISSS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF high-level synthesis, memory synthesis
35Minjie Zhang, Chengqi Zhang Potential Cases, Methodologies, and Strategies of Synthesis of Solutions in Distributed Expert Systems. Search on Bibsonomy IEEE Trans. Knowl. Data Eng. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF Distributed expert systems, synthesis of solutions, synthesis strategies, inductive methods, methodologies, analysis methods
35P. A. Subrahmanyam What's in a Timing Discipline? Considerations in the Specification and Synthesis of Systems with Interacting Asynchronous and Synchronous Components. Search on Bibsonomy Hardware Specification, Verification and Synthesis The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
35Alex Orailoglu Microarchitectural synthesis of gracefully degradable, dynamically reconfigurable ASICs. Search on Bibsonomy ICCD The full citation details ... 1996 DBLP  DOI  BibTeX  RDF microarchitectural synthesis, dynamically reconfigurable ASICs, fault-tolerance scheme, band reconfiguration, multiple permanent faults, associated high-level synthesis procedure, hardware rebinding, high-level synthesis, application specific integrated circuits, graceful degradation
35Ahmad Abualsamid, Raed Alqadi, Parameswaran Ramanathan Distributed synthesis of real-time computer systems. Search on Bibsonomy IEEE Real Time Technology and Applications Symposium The full citation details ... 1995 DBLP  DOI  BibTeX  RDF engineering workstations, distributed synthesis, design library, processor estimation, application constraints, suitable architecture identification, application task scheduling, runtime speedup, scheduling, real-time systems, computational complexity, parallelization, CAD, distributed processing, high level synthesis, high-level synthesis, software libraries, workstation network, real-time computer systems, resource estimation, component library
35Nilanjan Mukherjee 0001, H. Kassab, Janusz Rajski, Jerzy Tyszer Arithmetic built-in self test for high-level synthesis. Search on Bibsonomy VTS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF arithmetic built-in self test, data path architectures, arithmetic blocks, compact test responses, testable circuit synthesis, logic testing, built-in self test, high level synthesis, high-level synthesis, integrated circuit testing, logic CAD, testability, abstract level, test vectors, state coverage
34Wen-Jong Fang, Allen C.-H. Wu Multiway FPGA partitioning by fully exploiting design hierarchy. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2000 DBLP  DOI  BibTeX  RDF fine-grained synthesis, functional clustering, multi-way partitioning, multiple-FPGA synthesis
34Joachim Keinert, Martin Streubühr, Thomas Schlichter, Joachim Falk, Jens Gladigau, Christian Haubelt, Jürgen Teich, Michael Meredith SystemCoDesigner - an automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF System design, hardware/software codesign
34Rajesh K. Gupta 0001, Sandeep K. Shukla, Nick Savoiu Efficient Simulation of Synthesis-Oriented System Level Designs. Search on Bibsonomy ISSS The full citation details ... 2002 DBLP  DOI  BibTeX  RDF simulation, SystemC, system-level design
34Jörg Henkel, Rolf Ernst, Ulrich Holtmann, Thomas Benner Adaptation of partitioning and high-level synthesis in hardware/software co-synthesis. Search on Bibsonomy ICCAD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
34Steven D. Johnson Manipulating Logical Organization with System Factorizations. Search on Bibsonomy Hardware Specification, Verification and Synthesis The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
33Toshiyuki Kimura, Munenori Naoe, Yoko Yamakata, Michiaki Katsumoto Subjective effect of synthesis conditions in 3D sound field reproduction system using a few transducers and wave field synthesis. Search on Bibsonomy IUCS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF microphone directivity, sound field reproduction, wave field synthesis
33Sandeep S. Kulkarni, Borzoo Bonakdarpour, Ali Ebnenasir Mechanical Verification of Automatic Synthesis of Fault-Tolerant Programs. Search on Bibsonomy LOPSTR The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Addition of faulttolerance, Fault-tolerance, Program transformation, Theorem proving, Program synthesis, PVS, Mechanical verification
33Oliver Bringmann 0001, Wolfgang Rosenstiel, Carsten Menn Controller Estimation for FPGA Target Architectures during High-Level Synthesis. Search on Bibsonomy ISSS The full citation details ... 2002 DBLP  DOI  BibTeX  RDF FPGA, controller, high-level synthesis, area estimation
33Greg Stitt, Frank Vahid Thread warping: a framework for dynamic synthesis of thread accelerators. Search on Bibsonomy CODES+ISSS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF dynamic synthesis, thread warping, warp processing, FPGA, synthesis, multi-core, threads, just-in-time compilation
33Andreas Hamfelt, Jørgen Fischer Nilsson Inductive Synthesis of Logic Programs by Composition of Combinatory Program Schemes. Search on Bibsonomy LOPSTR The full citation details ... 1998 DBLP  DOI  BibTeX  RDF logic program schemata, logical combinators, synthesis by composition and specialization of schemas, inductive synthesis, metalogic program environment
32Robert Wille, Daniel Große, Gerhard W. Dueck, Rolf Drechsler Reversible Logic Synthesis with Output Permutation. Search on Bibsonomy VLSI Design The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
32Rastislav Bodík Algorithmic Program Synthesis with Partial Programs and Decision Procedures. Search on Bibsonomy SAS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
32Almitra Pradhan, Ranga Vemuri Fast Analog Circuit Synthesis Using Sensitivity Based Near Neighbor Searches. Search on Bibsonomy DATE The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
32Yonghong Yang, Zhenyu (Peter) Gu, Changyun Zhu, Li Shang, Robert P. Dick Adaptive chip-package thermal analysis for synthesis and design. Search on Bibsonomy DATE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
32Xuejie Qin, Yee-Hong Yang Basic Gray Level Aura Matrices: Theory and its Application to Texture Synthesis. Search on Bibsonomy ICCV The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
32Ioannis A. Ypsilos, Adrian Hilton, Aseel Turkmani, Philip J. B. Jackson Speech-Driven Face Synthesis from 3D Video. Search on Bibsonomy 3DPVT The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
32Steve Roach, Jeffrey Van Baalen Experience Report on Automated Procedure Construction for Deductive Synthesis. Search on Bibsonomy ASE The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
32Makoto Nakashizuka, Hisakazu Kikuchi Edge-based image synthesis model and its application to image coding. Search on Bibsonomy ISCAS (4) The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
32Reinaldo A. Bergamaschi, Andreas Kuehlmann A system for production use of high-level synthesis. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 1993 DBLP  DOI  BibTeX  RDF
32Wencheng Wang, Feitong Liu, Peijie Huang, Enhua Wu Texture synthesis via the matching compatibility between patches. Search on Bibsonomy Science in China Series F: Information Sciences The full citation details ... 2009 DBLP  DOI  BibTeX  RDF texture patch, large textures, match, texture synthesis
32Xin Chen, Wencheng Wang Texture synthesis by interspersing patches in a chessboard pattern. Search on Bibsonomy VRCAI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF large textures, real-time synthesis, GPU
32Hyunh Van Luong, Sangjin Cho, Jong-Myon Kim, Uipil Chong Real-Time Sound Synthesis of Plucked String Instruments Using a Data Parallel Architecture. Search on Bibsonomy ICIC (1) The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Music synthesis, Plucked-string instrument, Data parallel architectures, Parallel processing, Physical modeling
32Paul Merrell Example-based model synthesis. Search on Bibsonomy SI3D The full citation details ... 2007 DBLP  DOI  BibTeX  RDF texture synthesis, procedural modeling
32Junhyung Um, Taewhan Kim Resource Sharing Combined with Layout Effects in High-Level Synthesis. Search on Bibsonomy VLSI Signal Processing The full citation details ... 2006 DBLP  DOI  BibTeX  RDF resource allocation, high-level synthesis, layout
32Holger Giese, Stefan Henkler, Martin Hirsch 0001, Florian Klein 0001 Nobody's perfect: interactive synthesis from parametrized real-time scenarios. Search on Bibsonomy SCESM The full citation details ... 2006 DBLP  DOI  BibTeX  RDF scenario-based synthesis, model checking, patterns, diagnosis
32Steve Roach, Jeffrey Van Baalen Automated Procedure Construction for Deductive Synthesis. Search on Bibsonomy Autom. Softw. Eng. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF synthesis, procedures, deductive, decision, partial deduction
32Catherine Blake Information synthesis: a new approach to explore secondary information in scientific literature. Search on Bibsonomy JCDL The full citation details ... 2005 DBLP  DOI  BibTeX  RDF information synthesis, information retrieval, information extraction, text mining, document summarization
32Sumit Gupta, Rajesh K. Gupta 0001, Nikil D. Dutt, Alexandru Nicolau Coordinated parallelizing compiler optimizations and high-level synthesis. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF dynamic CSE, parallelizing transformations, presynthesis, embedded systems, high-level synthesis, Code motions, common subexpression elimination
32Alex Doboli, Nagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri A two-layer library-based approach to synthesis of analog systems from VHDL-AMS specifications. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF genetic algorithms, branch-and-bound, performance estimation, VHDL-AMS, Analog synthesis
32Xinguo Liu, Yaohua Hu, Jingdan Zhang, Xin Tong 0001, Baining Guo, Heung-Yeung Shum Synthesis and Rendering of Bidirectional Texture Functions on Arbitrary Surfaces. Search on Bibsonomy IEEE Trans. Vis. Comput. Graph. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF texture mapping, texture synthesis, surfaces, Bidirectional texture function, reflectance and shading models, mesh parameterization
32Kai Kapp, Viktor K. Sabelfeld Automatic correct scheduling of control flow intensive behavioral descriptions in formal synthesis. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF scheduling, transformational design, formal synthesis
32Kiam Tian Seow, Chuan Ma, Makoto Yokoo Multiagent Planning as Control Synthesis. Search on Bibsonomy AAMAS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Discrete-Event Control Synthesis, Multiagent Planning, Multiagent Coordination
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