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Publication years (Num. hits)
1962-1969 (15) 1970-1976 (18) 1977-1981 (18) 1982-1983 (26) 1984-1985 (46) 1986 (38) 1987 (37) 1988 (53) 1989 (65) 1990 (99) 1991 (101) 1992 (96) 1993 (102) 1994 (165) 1995 (221) 1996 (202) 1997 (243) 1998 (247) 1999 (321) 2000 (367) 2001 (374) 2002 (584) 2003 (625) 2004 (794) 2005 (865) 2006 (1045) 2007 (1009) 2008 (1033) 2009 (722) 2010 (460) 2011 (445) 2012 (393) 2013 (426) 2014 (408) 2015 (435) 2016 (461) 2017 (443) 2018 (444) 2019 (62)
Publication types (Num. hits)
article(3811) book(6) incollection(29) inproceedings(9564) phdthesis(78) proceedings(20)
Venues (Conferences, Journals, ...)
PATMOS(898) DAC(509) IEEE Trans. on CAD of Integrat...(423) ICCAD(323) DATE(307) ASP-DAC(211) IEEE Trans. VLSI Syst.(177) ISCAS(173) ISQED(173) IEEE Trans. Communications(172) VLSI Design(156) CoRR(146) ISPD(125) ITC(119) ICCD(116) ACM Great Lakes Symposium on V...(115) More (+10 of total 2047)
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Found 13509 publication records. Showing 13508 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
82Amit Chowdhary, Karthik Rajagopal, Satish Venkatesan, Tung Cao, Vladimir Tiourin, Yegna Parasuram, Bill Halpin How accurately can we model timing in a placement engine? Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF differential timing analysis, linear programming, static timing analysis, timing-driven placement
82Liang-Chi Chen, Sandeep K. Gupta, Melvin A. Breuer A new framework for static timing analysis, incremental timing refinement, and timing simulation. Search on Bibsonomy Asian Test Symposium The full citation details ... 2000 DBLP  DOI  BibTeX  RDF incremental timing refinement, signal arrival, target fault, test generation efficiency, logic testing, delays, timing, test generation, integrated circuit testing, computation, automatic test pattern generation, ATPG, static timing analysis, delay model, timing simulation
76Natarajan Viswanathan, Gi-Joon Nam, Jarrod A. Roy, Zhuo Li 0001, Charles J. Alpert, Shyam Ramji, Chris Chu ITOP: integrating timing optimization within placement. Search on Bibsonomy ISPD The full citation details ... 2010 DBLP  DOI  BibTeX  RDF placement, timing optimization, physical synthesis
75John V. A. Janeri, Daylan B. Darby, Daniel D. Schnackenberg Building higher resolution synthetic clocks for signaling in covert timing channels. Search on Bibsonomy CSFW The full citation details ... 1995 DBLP  DOI  BibTeX  RDF higher resolution synthetic clocks, timing channel countermeasure, Boeing multilevel secure local area network, secure network server, internal timing channels, time reference clock granularity, fine-grained signaling clock, timing channel throughput, timing channel capacities, local area networks, security of data, worst-case analysis, covert timing channels
70Aloysius K. Mok, Guangtian Liu Early detection of timing constraint violation at runtime. Search on Bibsonomy RTSS The full citation details ... 1997 DBLP  DOI  BibTeX  RDF timing constraint violation detection, timing constraint compliance, conditional guarantees, satisfiability checking algorithm, timing constraint monitoring, time terms, timing constraint specification, real-time systems, real time applications
69Jeffrey J. P. Tsai, Steve Jennhwa Yang, Yao-Hsiung Chang Timing Constraint Petri Nets and Their Application to Schedulability Analysis of Real-Time System Specifications. Search on Bibsonomy IEEE Trans. Software Eng. The full citation details ... 1995 DBLP  DOI  BibTeX  RDF real-time systems, Petri nets, synthesis, timing analysis, Timing constraints, time Petri nets, timed Petri nets, specification and verification
66Avi Efrati, Moshe Kleyner Timing analysis challenges for high speed CPUs at 90nm and below. Search on Bibsonomy Timing Issues in the Specification and Synthesis of Digital Systems The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
64Ali Dasdan, Dinesh Ramanathan, Rajesh K. Gupta 0001 A timing-driven design and validation methodology for embedded real-time systems. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 1998 DBLP  DOI  BibTeX  RDF period assignment, period derivation, rate assignment, rate derivation, timing-driven codesign, requirements analysis, timing analysis, system-level design, performance verification
59Shuo Zhou, Yi Zhu, Yuanfang Hu, Ronald L. Graham, Mike Hutton, Chung-Kuan Cheng Timing model reduction for hierarchical timing analysis. Search on Bibsonomy ICCAD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF biclique-star replacement, hierarchical timing analysis
58Duane S. Boning, Joseph Panganiban, Karen Gonzalez-Valentin, Sani R. Nassif, Chandler McDowell, Anne E. Gattiker, Frank Liu Test structures for delay variability. Search on Bibsonomy Timing Issues in the Specification and Synthesis of Digital Systems The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
58Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Sarma B. K. Vrudhula Statistical timing analysis using bounds and selective enumeration. Search on Bibsonomy Timing Issues in the Specification and Synthesis of Digital Systems The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
58Leo Motus, R. Kinksaar, Tonu Naks, M. Pall Enhancing object modelling technique with timing analysis capabilities. Search on Bibsonomy ICECCS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF enhanced object modelling technique, timing analysis capabilities, timing correctness, software implementation problems, specification problems, time-constraint elicitation, Q-model, noncontradiction analysis, time modelling requirements, performance, software engineering, real-time systems, real-time systems, data integrity, timing, scheduling algorithms, timing constraints, object-oriented methods, consistency checking, application domain, integrity checking, design problems
58Zhuo Feng, Peng Li 0001 A methodology for timing model characterization for statistical static timing analysis. Search on Bibsonomy ICCAD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
57Lo Ko, Christopher A. Healy, Emily Ratliff, Robert D. Arnold, David B. Whalley, Marion G. Harmon Supporting the specification and analysis of timing constraints. Search on Bibsonomy IEEE Real Time Technology and Applications Symposium The full citation details ... 1996 DBLP  DOI  BibTeX  RDF timing constraints analysis, real-time programmers, user-friendly environment, user specification, real-time systems, user interface, formal specification, timing, synchronisation, timing constraints, computer aided software engineering, C language, C program, project support environments
57Tai M. Chung, Henry G. Dietz Static scheduling of hard real-time code with instruction-level timing accuracy. Search on Bibsonomy RTCSA The full citation details ... 1996 DBLP  DOI  BibTeX  RDF timing fault, instruction-level timing accuracy, high-level language code, instruction-level, compiler code scheduling, genetic search algorithm, real-time systems, timing analysis, processor scheduling, search space
56Louis Scheffer Explicit computation of performance as a function of process variation. Search on Bibsonomy Timing Issues in the Specification and Synthesis of Digital Systems The full citation details ... 2002 DBLP  DOI  BibTeX  RDF static timing, process variation, yield, statistical timing
56Mukund Sivaraman, Andrzej J. Strojwas Timing analysis based on primitive path delay fault identification. Search on Bibsonomy ICCAD The full citation details ... 1997 DBLP  DOI  BibTeX  RDF primitive path delay faults, correlated delay, floating mode, timing analysis, timing verification, false path, path delay fault testing
55Steven Gianvecchio, Haining Wang Detecting covert timing channels: an entropy-based approach. Search on Bibsonomy ACM Conference on Computer and Communications Security The full citation details ... 2007 DBLP  DOI  BibTeX  RDF detection, covert timing channels
54Markus Lindgren, Hans Hansson, Henrik Thane Using measurements to derive the worst-case execution time. Search on Bibsonomy RTCSA The full citation details ... 2000 DBLP  DOI  BibTeX  RDF execution time analysis, program flow analysis, low level timing information, low level timing analysis, program execution times, timing measurements, instrumented version, program fragments, non-exhaustive measurements, program paths, realistic processor model, scheduling, real-time systems, real time systems, embedded systems, worst-case execution time, pipeline processing, schedulability analysis, program diagnostics, architectural modeling, pipeline architectures, flow graphs, timing estimates, target architecture, system of linear equations
54Christopher J. Thompson, Andrew L. Goertzen A Method for Determination of the Timing Stability of PET Scanners. Search on Bibsonomy IEEE Trans. Med. Imaging The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
54Aloysius K. Mok, Guangtian Liu Efficient Run-Time Monitoring of Timing Constraints. Search on Bibsonomy IEEE Real Time Technology and Applications Symposium The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
54Vinod Narayanan, Barbara A. Chappell, Bruce M. Fleischer Static timing analysis for self resetting circuits. Search on Bibsonomy ICCAD The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
54Sung-Soo Lim, Young Hyun Bae, Gyu Tae Jang, Byung-Do Rhee, Sang Lyul Min, Chang Yun Park, Heonshik Shin, Kunsoo Park, Soo-Mook Moon, Chong-Sang Kim An Accurate Worst Case Timing Analysis for RISC Processors. Search on Bibsonomy IEEE Trans. Software Eng. The full citation details ... 1995 DBLP  DOI  BibTeX  RDF pipelined execution, real-time system, Cache memory, worst case execution time, RISC processor
52Amir Masoud Gharehbaghi, Bijan Alizadeh, Masahiro Fujita Aggressive overclocking support using a novel timing error recovery technique on FPGAs (abstract only). Search on Bibsonomy FPGA The full citation details ... 2010 DBLP  DOI  BibTeX  RDF overclocking, timing error detection, timing error recovery, fpga
52Ho Kyoung Lee, Woo Jin Lee, Heung Seok Chae, Yong Rae Kwon Specification and analysis of timing requirements for real-time systems in the CBD approach. Search on Bibsonomy Real-Time Systems The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Real-time system, Petri nets, Component, Timing analysis, Timing constraints, CBD, Compositional analysis
52Liang-Chi Chen, Sandeep K. Gupta, Melvin A. Breuer TA-PSV - Timing Analysis for Partially Specified Vectors. Search on Bibsonomy J. Electronic Testing The full citation details ... 2002 DBLP  DOI  BibTeX  RDF timing analysis for partially specified vectors (TA-PSV), crosstalk test generation (ATPG), static timing analysis (STA), delay model
50Ali Dasdan Efficient algorithms for debugging timing constraint violations. Search on Bibsonomy Timing Issues in the Specification and Synthesis of Digital Systems The full citation details ... 2002 DBLP  DOI  BibTeX  RDF over-constraint resolution, scheduling, high-level synthesis, constraint satisfaction, timing constraints, behavioral synthesis, rate analysis
50Kurt Keutzer, Michael Orshansky From blind certainty to informed uncertainty. Search on Bibsonomy Timing Issues in the Specification and Synthesis of Digital Systems The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
50Musab AlTurki, Dinakar Dhurjati, Dachuan Yu, Ajay Chander, Hiroshi Inamura Formal Specification and Analysis of Timing Properties in Software Systems. Search on Bibsonomy FASE The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
50Guilan Dai, Rujuan Liu, Chongchong Zhao, Changjun Hu Timing Constraints Specification and Verification for Web Service Compositions. Search on Bibsonomy APSCC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
49Ed Grochowski, Murali Annavaram, Paul Reed Implications of device timing variability on full chip timing. Search on Bibsonomy ISPD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
49Murali Annavaram, Ed Grochowski, Paul Reed Implications of Device Timing Variability on Full Chip Timing. Search on Bibsonomy HPCA The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
49Min Pan, Chris C. N. Chu, Hai Zhou Timing yield estimation using statistical static timing analysis. Search on Bibsonomy ISCAS (3) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
49Tobias Thiel Have I Really Met Timing? - Validating PrimeTime Timing Reports with Spice. Search on Bibsonomy DATE The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
48Uwe Fassnacht, Jürgen Schietke Timing Analysis and Optimization of a High-Performance CMOS Processor Chipset. Search on Bibsonomy DATE The full citation details ... 1998 DBLP  DOI  BibTeX  RDF Timing, static timing analysis, timing optimization
47Dipankar Das 0002, P. P. Chakrabarti, Rajeev Kumar Scenario-based timing verification of multiprocessor embedded applications. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF execution scenarios, real time systems, static timing analysis, Timing verification
47David A. Papa, Tao Luo 0002, Michael D. Moffitt, Chin Ngai Sze, Zhuo Li 0001, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov RUMBLE: an incremental, timing-driven, physical-synthesis optimization algorithm. Search on Bibsonomy ISPD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF static timing analysis, timing-driven placement
47Stephen D. Posluszny, N. Aoki, David Boerstler, Paula K. Coulman, Sang H. Dhong, Brian K. Flachs, H. Peter Hofstee, N. Kojima, Ohsang Kwon, K. Lee, David Meltzer, Kevin J. Nowka, J. Park, J. Peter, Joel Silberman, Osamu Takahashi, Paul Villarrubia "Timing closure by design, " a high frequency microprocessor design methodology. Search on Bibsonomy DAC The full citation details ... 2000 DBLP  DOI  BibTeX  RDF chip integration, dynamic circuits0, CAD, methodology, microprocessor, timing analysis, PLA, timing closure
47Wei-Tek Tsai, Hessam S. Sarjoughian, Wu Li, Xin Sun 0003 Timing specification and analysis for service-oriented simulation. Search on Bibsonomy SpringSim The full citation details ... 2009 DBLP  DOI  BibTeX  RDF service-oriented simulation, timing specifications and analysis, DEVS
47Shihheng Tsai, Chung-Yang Huang A false-path aware formal static timing analyzer considering simultaneous input transitions. Search on Bibsonomy DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF critical path selection, multiple input transitioning, formal method, static timing analysis, false path
47Hanif Fatemi, Soroush Abbaspour, Massoud Pedram, Amir H. Ajami, Emre Tuncer SACI: statistical static timing analysis of coupled interconnects. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2006 DBLP  DOI  BibTeX  RDF coupled interconnect, sources of variation, crosstalk noise, statistical timing analysis
47Mike Hutton, David Karchmer, Bryan Archell, Jason Govig Efficient static timing analysis and applications using edge masks. Search on Bibsonomy FPGA The full citation details ... 2005 DBLP  DOI  BibTeX  RDF cut-path, multicycle, thru-x, FPGA, placement, timing analysis
47Chandramouli Visweswariah, K. Ravindran, Kerim Kalafala, Steven G. Walker, S. Narayan First-order incremental block-based statistical timing analysis. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF variability, incremental, statistical timing
47Yu Cao, Xiaodong Yang, Xuejue Huang, Dennis Sylvester Switch-Factor Based Loop RLC Modeling for Efficient Timing Analysis. Search on Bibsonomy ICCAD The full citation details ... 2003 DBLP  DOI  BibTeX  RDF RLC model, loop inductance, switch-factor, current return loop, data-bus and clock, static timing analysis, slew rate
46Bhavana Thudi, David T. Blaauw Efficient switching window computation for cross-talk noise. Search on Bibsonomy Timing Issues in the Specification and Synthesis of Digital Systems The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
46Parimala Viswanath, Pranav Murthy, Debajit Das, R. Venkatraman, Ajoy Mandal, Arvind Veeravalli, H. Udayakumar Optimization strategies to improve statistical timing. Search on Bibsonomy ISQED The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
46Euiseok Hwang, Rohit Negi, B. V. K. Vijaya Kumar Extended Kalman Filter Based Acquisition Timing Recovery for Magnetic Recording Read Channels. Search on Bibsonomy ICC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
46Chan-Gun Lee, Aloysius K. Mok, Prabhudev Konana Monitoring of Timing Constraints with Confidence Threshold Requirements. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2007 DBLP  DOI  BibTeX  RDF fault tolerance, Constraints, monitors, temporal logic, real-time and embedded systems
46Chee Sing Lee 0002, Wei Ting Loke, Wenjuan Zhang, Yajun Ha Fast and Accurate Interval-Based Timing Estimator for Variability-Aware FPGA Physical Synthesis Tools. Search on Bibsonomy FPL The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
46Aravind R. Nayak, John R. Barry, German S. Feyh, Steven W. McLaughlin Timing Recovery With Frequency Offset and Random Walk: Cramér-Rao Bound and a Phase- Locked Loop Postprocessor. Search on Bibsonomy IEEE Trans. Communications The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
46Aravind R. Nayak, John R. Barry, German S. Feyh, Steven W. McLaughlin Timing Recovery With Frequency Offset and Random Walk: Cramer-Rao Bound and a Phase-Locked Loop Postprocessor. Search on Bibsonomy IEEE Trans. Communications The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
46Chandramouli Visweswariah, K. Ravindran, Kerim Kalafala, Steven G. Walker, S. Narayan, Daniel K. Beece, Jeff Piaget, Natesan Venkateswaran, Jeffrey G. Hemmett First-Order Incremental Block-Based Statistical Timing Analysis. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
46Chan-Gun Lee, Aloysius K. Mok, Prabhudev Konana Monitoring of Timing Constraints with Confidence Threshold Requirements. Search on Bibsonomy RTSS The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
45Kewen Li, Mingxiao Yu, Lu Liu, Timing Li, Jiannan Zhai Feature Selection Method Based on Weighted Mutual Information for Imbalanced Data. Search on Bibsonomy International Journal of Software Engineering and Knowledge Engineering The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
45Kewen Li, Lu Liu, Jiannan Zhai, Taghi M. Khoshgoftaar, Timing Li The improved grey model based on particle swarm optimization algorithm for time series prediction. Search on Bibsonomy Eng. Appl. of AI The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
45Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye Trade-off analysis between timing error rate and power dissipation for adaptive speed control with timing error prediction. Search on Bibsonomy ASP-DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
45Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen Block based statistical timing analysis with extended canonical timing model. Search on Bibsonomy ASP-DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
45Cristinel Ababei, Kia Bazargan Timing Minimization by Statistical Timing hMetis-based Partitioning. Search on Bibsonomy VLSI Design The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
44Rajesh K. Gupta 0001 A framework for interactive analysis of timing constraints in embedded systems. Search on Bibsonomy CODES The full citation details ... 1996 DBLP  DOI  BibTeX  RDF constraint satisfiability, performance evaluation, real-time systems, embedded systems, timing, computability, logic design, satisfiability, timing constraints, interactive analysis, timing performance
44Steve Brown, Germán Gutiérrez, Reed Nelson, Chris VanKrevelen A gate-array based 500 MHz triple channel ATE controller with 40 pS timing verniers. Search on Bibsonomy VTS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF emitter-coupled logic, triple channel ATE controller, timing verniers, precision edge timing, drive waveforms, returning signals, system clock frequency, ECL, 500 MHz, 40 ps, timing, clocks, automatic test equipment, logic arrays, programmable controllers, gate array, high speed testing
44Hong-Yean Hsieh, Wentai Liu, Ralph K. Cavin III, C. Thomas Gray Concurrent timing optimization of latch-based digital systems. Search on Bibsonomy ICCD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF concurrent timing optimization, latch-based digital systems, digital system timing, intentional clock skew, latch-based designed systems, multi-phase clocking, resynchronization, latches insertion, optimisation, timing, logic design, flip-flops, retiming, mixed integer linear program, race conditions, integrated framework, wave pipelining, hazards and race conditions, clock period
44Vinod Narayananan, David LaPotin, Rajesh Gupta 0003, Gopalakrishnan Vijayan PEPPER - a timing driven early floorplanner. Search on Bibsonomy ICCD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF PEPPER, timing driven early floorplanner, chip complexities, early analysis, performance critical CMOS chips, wireability, floorplan optimization process, performance, computational complexity, optimisation, timing, system design, circuit layout CAD, CMOS integrated circuits, static timing analysis, integrated circuit layout, area, interconnect delay
44Anirudh Devgan Accurate device modeling techniques for efficient timing simulation of integrated circuits. Search on Bibsonomy ICCD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF device modeling techniques, Fast-to-evaluate and Accurate Simplified Transistor, aggressive MOS technologies, FAST models, timing, AGES, circuit analysis computing, integrated circuits, circuit simulators, transient analysis, transistors, transistor, transient simulator, timing simulation, timing simulator, electronic engineering computing, semiconductor device models
43Sibin Mohan, Frank Mueller Hybrid Timing Analysis of Modern Processor Pipelines via Hardware/Software Interactions. Search on Bibsonomy IEEE Real-Time and Embedded Technology and Applications Symposium The full citation details ... 2008 DBLP  DOI  BibTeX  RDF hybrid timing anlalysis, hardware/software interactions, real-time systems, embedded systems, computer architecture, timing analysis, worst-case execution time, out-of-order execution
43Sreeja Raj, Sarma B. K. Vrudhula, Janet Meiling Wang A methodology to improve timing yield in the presence of process variations. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF timing analysis, gate sizing, timing yield
43Martin Foltin, Brian Foutz, Sean Tyler Efficient stimulus independent timing abstraction model based on a new concept of circuit block transparency. Search on Bibsonomy DAC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF timing analysis, VLSI design, timing model, circuit optimization
43Peter A. Beerel, Ken S. Stevens, Hoshik Kim Relative Timing Based Verification of Timed Circuits and Systems. Search on Bibsonomy ASYNC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF Relative Timing, Verification and Timed Circuits, Timing Constraints
43Karim Khordoc, Eduard Cerny Semantics and verification of action diagrams with linear timing. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 1998 DBLP  DOI  BibTeX  RDF compatibility of interfaces, hardware interfaces, causality, timing verification, timing diagrams
43Sung-Kwan Kim, Sang Lyul Min, Rhan Ha Efficient worst case timing analysis of data caching. Search on Bibsonomy IEEE Real Time Technology and Applications Symposium The full citation details ... 1996 DBLP  DOI  BibTeX  RDF efficient worst case timing analysis, accurate timing analysis, pipelined execution, multiple memory locations, pointer based references, dynamic load/store instructions, WCET overestimation, global data flow analysis, benchmark programs, real-time systems, computational complexity, data caching, cache storage, instruction sets, reduced instruction set computing, data dependence analysis, cache block
43Shuichi Oikawa, Hideyuki Tokuda Efficient timing management for user-level real-time threads. Search on Bibsonomy IEEE Real Time Technology and Applications Symposium The full citation details ... 1995 DBLP  DOI  BibTeX  RDF efficient timing management, user-level real-time threads, specified time, upcalled user-level scheduler, user-level scheduler overhead, shared user-level timers, shared kernel/user structure, upcall performance, scheduling, performance evaluations, software engineering, real-time systems, resource allocation, timing, shared memory systems, kernel, processor scheduling, software performance evaluation, operating system kernels, hints, virtual processor
43Zhuo Li 0001, David A. Papa, Charles J. Alpert, Shiyan Hu, Weiping Shi, Cliff C. N. Sze, Nancy Ying Zhou Ultra-fast interconnect driven cell cloning for minimizing critical path delay. Search on Bibsonomy ISPD The full citation details ... 2010 DBLP  DOI  BibTeX  RDF gate duplication, physical synthesis, timing-driven placement
43Ratnakar Goyal, Harindranath Parameswaran, Sachin Shrivastava Computation of Waveform Sensitivity Using Geometric Transforms for SSTA. Search on Bibsonomy ISQED The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Timing Library, Accuracy, SSTA
43Farid N. Najm, Noel Menezes Statistical timing analysis based on a timing yield model. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF statistical timing analysis, principal components, timing yield
42Lei Ju, Bach Khoa Huynh, Abhik Roychoudhury, Samarjit Chakraborty Timing analysis of esterel programs on general-purpose multiprocessors. Search on Bibsonomy DAC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF multiprocessor, timing analysis, synchronous language, esterel
42Wilsaan M. Joiner, Mark Shelhamer A model of time estimation and error feedback in predictive timing behavior. Search on Bibsonomy Journal of Computational Neuroscience The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Error feedback, Prediction, Timing, Saccade
42Khaled R. Heloue, Farid N. Najm Parameterized timing analysis with general delay models and arbitrary variation sources. Search on Bibsonomy DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF nonlinear delay, parameterized timing analysis, variability
42Steven Gianvecchio, Haining Wang, Duminda Wijesekera, Sushil Jajodia Model-Based Covert Timing Channels: Automated Modeling and Evasion. Search on Bibsonomy RAID The full citation details ... 2008 DBLP  DOI  BibTeX  RDF traffic modeling, evasion, covert timing channels
42Stephan Thesing Modeling a system controller for timing analysis. Search on Bibsonomy EMSOFT The full citation details ... 2006 DBLP  DOI  BibTeX  RDF aiT, verification, static analysis, VHDL, timing analysis, WCET, worst-case execution time, avionics, peripherals
42Alan Wassyng, Mark Lawford, Xiayong Hu Timing Tolerances in Safety-Critical Software. Search on Bibsonomy FM The full citation details ... 2005 DBLP  DOI  BibTeX  RDF timing tolerances, real-time, requirements, safety-critical
42Alejandro Hevia, Marcos A. Kiwi Strength of two data encryption standard implementations under timing attacks. Search on Bibsonomy ACM Trans. Inf. Syst. Secur. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF cryptography, cryptanalysis, data encryption standard, timing attack
42Savithri Sundareswaran, David T. Blaauw, Abhijit Dharchoudhury A Three-Tier Assertion Technique for Spice Verification of Transistor Level Timing Analysis. Search on Bibsonomy VLSI Design The full citation details ... 1999 DBLP  DOI  BibTeX  RDF spice verification, primary-path, secondary-path, timing analysis, assertion, assertibility
42S. Balajee, Ananta K. Majhi Automated AC (Timing) Characterization for Digital Circuit Testing. Search on Bibsonomy VLSI Design The full citation details ... 1998 DBLP  DOI  BibTeX  RDF Timing Characterization, STIL, Setup and Hold Time
42Supratik Chakraborty, David L. Dill, Kun-Yung Chang, Kenneth Y. Yun Timing Analysis of Extended Burst-Mode Circuits. Search on Bibsonomy ASYNC The full citation details ... 1997 DBLP  DOI  BibTeX  RDF Extended burst-mode circuits, 3D design style, global timing constraints, uncertain component delays, thirteen-valued signal algebra, polynomial-time
42Benjamin Carrión Schäfer, Taewhan Kim Hotspots Elimination and Temperature Flattening in VLSI Circuits. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
42Serge Egelman, Janice Y. Tsai, Lorrie Faith Cranor, Alessandro Acquisti Timing is everything?: the effects of timing and placement of online privacy indicators. Search on Bibsonomy CHI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF website indicators, privacy, timing, mental models, privacy policies, usable privacy and security
41Navin Kashyap, David L. Neuhoff Data Synchronization With Timing: The Variable-Rate Case. Search on Bibsonomy IEEE Trans. Information Theory The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
41Seung Joon Lee, Norman C. Beaulieu A Novel Pulse Designed to Jointly Optimize Symbol Timing Estimation Performance and the Mean Squared Error of Recovered Data. Search on Bibsonomy IEEE Trans. Wireless Communications The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
41Liu Yang, Sheqin Dong, Yuchun Ma, Xianlong Hong Interconnect Power Optimization Based on Timing Analysis. Search on Bibsonomy ISVLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
41Yinglong Ma, Beihong Jin, Yuancheng Li, Kehe Wu A Timing Analysis Model for Ontology Evolutions Based on Distributed Environments. Search on Bibsonomy PAKDD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
41Zhi Tian, Georgios B. Giannakis A GLRT approach to data-aided timing acquisition in UWB radios-Part II: training sequence design. Search on Bibsonomy IEEE Trans. Wireless Communications The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
41Ken Tseng, Mark Horowitz False coupling exploration in timing analysis. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
41Rob A. Rutenbar, Li-C. Wang, Kwang-Ting Cheng, Sandip Kundu Static statistical timing analysis for latch-based pipeline designs. Search on Bibsonomy ICCAD The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
41Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, T. M. Mak Diagnosis-Based Post-Silicon Timing Validation Using Statistical Tools and Methodologies. Search on Bibsonomy ITC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
41Cho W. Moon, Harish Kriplani, Krishna P. Belkhale Timing model extraction of hierarchical blocks by graph reduction. Search on Bibsonomy DAC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
41Rita Yu Chen, Paul Yip, Georgios K. Konstadinidis, Andrew Demas, Fabian Klass, Rob Mains, Margaret Schmitt, Dina Bistry Timing Window Applications in UltraSPARC-IIIi? Microprocessor Design. Search on Bibsonomy ICCD The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
41Hsiao-Pin Su, Allen C.-H. Wu, Youn-Long Lin A timing-driven soft-macro placement and resynthesis method in interaction with chip floorplanning. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
41Rajat Aggarwal, Rajeev Murgai, Masahiro Fujita Speeding up technology-independent timing optimization by network partitioning. Search on Bibsonomy ICCAD The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
41Louise E. Moser, P. M. Melliar-Smith Analysis of Timing Hazards in Ada Programs. Search on Bibsonomy ACM Conference on Computer Science The full citation details ... 1993 DBLP  DOI  BibTeX  RDF Ada
41Michiaki Muraoka, Hirokazu Iida, Hideyuki Kikuchihara, Michio Murakami, Kazuyuki Hirakawa ACTAS: an accurate timing analysis system for VLSI. Search on Bibsonomy DAC The full citation details ... 1985 DBLP  DOI  BibTeX  RDF
41Hatice Kose-Bagci, Frank Broz, Qiming Shen, Kerstin Dautenhahn, Chrystopher L. Nehaniv As Time Goes By: Representing and Reasoning About Timing in Human-Robot Interaction Studies. Search on Bibsonomy AAAI Spring Symposium: It's All in the Timing The full citation details ... 2010 DBLP  BibTeX  RDF
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