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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 2 occurrences of 2 keywords
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Results
Found 8 publication records. Showing 8 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
120 | Ivan Miro Panades, Fabien Clermidy, Pascal Vivet, Alain Greiner |
Physical Implementation of the DSPIN Network-on-Chip in the FAUST Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Second International Symposium on Networks-on-Chips, NOCS 2008, 5-6 April 2008, Newcastle University, UK. Proceedings, pp. 139-148, 2008, IEEE Computer Society, 978-0-7695-3098-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
DSPIN, ANOC, physical implementation, FAUST, bi-synchronous FIFO, network-on-chip, NoC |
37 | Weng-Geng Ho, Kwen-Siong Chong, Ne Kyaw Zwa Lwin, Bah-Hwee Gwee, Joseph S. Chang |
High robustness energy- and area-efficient dynamic-voltage-scaling 4-phase 4-rail asynchronous-logic Network-on-Chip (ANoC). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, Portugal, May 24-27, 2015, pp. 1913-1916, 2015, IEEE, 978-1-4799-8391-9. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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37 | Sylvain Durand, Suzanne Lesecq, Edith Beigné, Diego Puschini |
Event-based DVFS control in GALS-ANoC MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACC ![In: American Control Conference, ACC 2013, Washington, DC, USA, June 17-19, 2013, pp. 5074-5079, 2013, IEEE, 978-1-4799-0177-7. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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37 | Peng Zhang 0011, Chuang Lin 0002, Yixin Jiang, Patrick P. C. Lee, John C. S. Lui |
ANOC: Anonymous Network-Coding-Based Communication with Efficient Cooperation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Sel. Areas Commun. ![In: IEEE J. Sel. Areas Commun. 30(9), pp. 1738-1745, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
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37 | Yvain Thonnart, Edith Beigné, Pascal Vivet |
Design and Implementation of a GALS Adapter for ANoC Based Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 15th IEEE Symposium on Asynchronous Circuits and Systems, ASYNC 2009, Chapel Hill, NC, USA, May 17-20, 2009, pp. 13-22, 2009, IEEE Computer Society, 978-1-4244-3933-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
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37 | Yvain Thonnart, Edith Beigné, Alexandre Valentian, Pascal Vivet |
Automatic Power Regulation Based on an Asynchronous Activity Detection and its Application to ANOC Node Leakage Reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 14th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2008, Newcastle upon Tyne, UK, April 7-10, 2008, pp. 48-57, 2008, IEEE Computer Society, 978-0-7695-3107-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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28 | Xuan-Tu Tran, Jean Durupt, François Bertrand, Vincent Beroulle, Chantal Robach |
A DFT Architecture for Asynchronous Networks-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 11th European Test Symposium, ETS 2006, Southhampton, UK, May 21-24, 2006, pp. 219-224, 2006, IEEE Computer Society, 0-7695-2566-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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28 | Jerome Quartana, Laurent Fesquet, Marc Renaudin |
Modular Asynchronous Network-on-Chip: Application to GALS Systems Rapid Prototyping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 195-207, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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