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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 26 occurrences of 21 keywords
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Results
Found 32 publication records. Showing 31 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
102 | Jiaoyan Chen, Dilip P. Vasudevan, Emanuel M. Popovici, Michel P. Schellekens |
Reversible online BIST using bidirectional BILBO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 7th Conference on Computing Frontiers, 2010, Bertinoro, Italy, May 17-19, 2010, pp. 257-266, 2010, ACM, 978-1-4503-0044-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
bilbo, bist, testing, reversible logic |
102 | Sen-Pin Lin, Charles Njinda, Melvin A. Breuer |
Generating a family of testable designs using the BILBO methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 4(1), pp. 71-89, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
BILBO design system, built-in self-test, test scheduling, synthesis for testability |
63 | G. M. Beumer, Qian Tao, Asker M. Bazen, Raymond N. J. Veldhuis |
A Landmark Paper in Face Recognition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FGR ![In: Seventh IEEE International Conference on Automatic Face and Gesture Recognition (FGR 2006), 10-12 April 2006, Southampton, UK, pp. 73-78, 2006, IEEE Computer Society, 0-7695-2503-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
face registration, Viola-Jones, landmark correction, face recognition, landmarking, likelihood ratio |
63 | O. A. Petlin, Stephen B. Furber |
Built-In Self-Testing of Micropipelines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '97), 7-10 April 1997, Eindhoven, The Netherlands, pp. 22-29, 1997, IEEE Computer Society, 0-8186-7922-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Built-in self-test, Design for test, Asynchronous design, Micropipelines |
63 | Mohammed Fadle Abdulla, C. P. Ravikumar, Anshul Kumar |
A Novel BIST Architecture With Built-in Self Check. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India, pp. 57-60, 1996, IEEE Computer Society, 0-8186-7228-5. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
51 | Rachel Bilbo, Zhi Li, Kendal Norman, Gautam Golwala, Sathya Sundaram, Perry Lee, Jan P. Allebach |
Understanding fashion aesthetics: training a neural network based predictor using popularity scores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IQSP ![In: Image Quality and System Performance XVI, Electronic Imaging 2019, IQSP, Burlingame, CA, USA, 13-17 January 2019., 2019, Society for Imaging Science and Technology. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
42 | Albrecht P. Stroele, Hans-Joachim Wunderlich |
Hardware-optimal test register insertion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(6), pp. 531-539, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
42 | Kwanghyun Kim, Joseph G. Tront, Dong Sam Ha |
Automatic Insertion of BIST Hardware Using VHDL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 25th ACM/IEEE Conference on Design Automation, DAC '88, Anaheim, CA, USA, June 12-15, 1988., pp. 9-15, 1988, ACM. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP BibTeX RDF |
|
42 | Andrzej Krasniewski, Alexander Albicki |
Simulation-free estimation of speed degradation in NMOS self-testing circuits for CAD applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 22nd ACM/IEEE conference on Design automation, DAC 1985, Las Vegas, Nevada, USA, 1985., pp. 808-811, 1985, ACM, 0-8186-0635-5. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
|
32 | Xuedong Li, Walter Yuan, Dezhong Peng, Qiaozhu Mei, Yue Wang 0035 |
When BERT meets Bilbo: a learning curve analysis of pretrained language model on disease classification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BMC Medical Informatics Decis. Mak. ![In: BMC Medical Informatics Decis. Mak. 21-S(9), pp. 377, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
32 | Xuedong Li, Walter Yuan, Dezhong Peng, Qiaozhu Mei, Yue Wang 0035 |
When BERT Meets Bilbo: A Learning Curve Analysis of Pretrained Language Model on Disease Classification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICHI ![In: 8th IEEE International Conference on Healthcare Informatics, ICHI 2020, Oldenburg, Germany, November 30 - December 3, 2020, pp. 1-2, 2020, IEEE, 978-1-7281-5382-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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32 | Elaheh Sadredini, Mohammadreza Najafi, Mahmood Fathy, Zainalabedin Navabi |
BILBO-friendly Hybrid BIST Architecture with Asymmetric Polynomial Reseeding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1711.08458, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
32 | Amal Htait, Sébastien Fournier, Patrice Bellot |
Bilbo-Val: Automatic Identification of Bibliographical Zone in Papers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LREC ![In: Proceedings of the Tenth International Conference on Language Resources and Evaluation LREC 2016, Portorož, Slovenia, May 23-28, 2016., 2016, European Language Resources Association (ELRA). The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP BibTeX RDF |
|
32 | Abdelhakim Latoui, Farid Djahli |
An Optical BILBO for Online Testing of Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test ![In: IEEE Des. Test 30(3), pp. 34-48, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
32 | Young-Min Kim, Patrice Bellot, Jade Tavernier, Elodie Faath, Marin Dacos |
Evaluation of BILBO reference parsing in digital humanities via a comparison of different tools. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Symposium on Document Engineering ![In: ACM Symposium on Document Engineering, DocEng '12, Paris, France, September 4-7, 2012, pp. 209-212, 2012, ACM, 978-1-4503-1116-8. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
32 | Kazuteru Namba, Hideo Ito |
Construction of BILBO FF with Soft-Error-Tolerant Capability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Inf. Syst. ![In: IEICE Trans. Inf. Syst. 94-D(5), pp. 1045-1050, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
32 | Kazuteru Namba, Hideo Ito |
Soft Error Tolerant BILBO FF. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2010, Kyoto, Japan, October 6-8, 2010, pp. 73-81, 2010, IEEE Computer Society, 978-1-4244-8447-8. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
32 | Ioannis Voyiatzis, Dimitris Kehagias |
A SiC Pair Generator for a Bilbo Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 15(5), pp. 739-756, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
32 | Anupam Basu, Thomas Charles Wilson, Dilip K. Banerji, Jayanti C. Majithia |
An Approach to Minimize Testability Overhead for BILBO based Built-In-Self-Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: Proceedings of the Fifth International Conference on VLSI Design, VLSI Design 1992, Bangalore, India, January 4-7, 1992, pp. 354-355, 1992, IEEE Computer Society, 0-8186-2465-5. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
32 | M. Martinez, N. P. Cagigal, Salvador Bracho |
Arithmetical logical unit design for a processor with BILBO techniques: Functional simulation and test strategies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocessing and Microprogramming ![In: Microprocessing and Microprogramming 28(1-5), pp. 109-115, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
32 | Andrzej Krasniewski, Alexander Albicki |
Automatic Design of Exhaustively Self-Testing Chips with Bilbo Modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings International Test Conference 1985, Philadelphia, PA, USA, November 1985, pp. 362-371, 1985, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP BibTeX RDF |
|
28 | Albrecht P. Stroele, Hans-Joachim Wunderlich |
Test register insertion with minimum hardware cost. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1995, San Jose, California, USA, November 5-9, 1995, pp. 95-101, 1995, IEEE Computer Society / ACM, 0-8186-7213-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
test register insertion, BILBO, CBILBO, Built-in self-test |
28 | Peter D. Hortensius, Robert D. McLeod, Howard C. Card |
Cellular Automata-Based Signature analysis for Built-in Self-Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 39(10), pp. 1273-1283, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
signature analysis properties, one-dimensional cellular automata, cyclic-group rules, CALBO, cellular automata-based logic block observation, BILBO, built-in block observation, logic testing, built-in self-test, built-in self test, LFSR, linear feedback shift register, finite automata, test pattern generation |
28 | Thomas W. Williams, Kenneth P. Parker |
Design for Testability - A Survey. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 31(1), pp. 2-15, 1982. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP DOI BibTeX RDF |
Built-In Logic Block Observation (BILBO), Level Sensitive Scan Design (LSSD), Random Access Scan, Scan/Set Logic, testing, test generation, self test, Signature Analysis, Scan Path |
21 | Alodeep Sanyal, Kunal P. Ganeshpure, Sandip Kundu |
An Improved Soft-Error Rate Measurement Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(4), pp. 596-600, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
21 | Doaa A. Nassar, Aly E. Salama |
A heuristic DSP BIST insertion algorithm with minimum area overhead. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 585-588, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Aiman H. El-Maleh, Yahya E. Osais |
A retiming-based test pattern generator design for built-in self test of data path architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 550-553, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
21 | Mohammed Fadle Abdulla, C. P. Ravikumar, Anshul Kumar |
Efficient Implementation of Multiple On-Chip Signature Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 297-302, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
21 | Kwanghyun Kim, Joseph G. Tront, Dong Sam Ha |
BIDES: A BIST design expert system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 2(2), pp. 165-179, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
knowledge-based expert system, Built-in self-test, design for testability, pseudorandom testing |
21 | Andrzej Krasniewski, Slawomir Pilarski |
Circular self-test path: a low-cost BIST technique for VLSI circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(1), pp. 46-55, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
21 | Paolo Camurati, Paolo Gianoglio, Renato Gianoglio, Paolo Prinetto |
ESTA: an expert system for DFT rule verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(11), pp. 1172-1180, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
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