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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 38 occurrences of 26 keywords
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Results
Found 45 publication records. Showing 45 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
112 | Nirav Dave, Arvind, Michael Pellauer |
Scheduling as Rule Composition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 5th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2007), May 30 - June 1st, Nice, France, pp. 51-60, 2007, IEEE Computer Society, 1-4244-1050-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
104 | Nirav Dave |
Designing a reorder buffer in Bluespec. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 2nd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2004), 23-25 June 2004, San Diego, California, USA, Proceedings, pp. 93-102, 2004, IEEE Computer Society, 0-7803-8509-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
104 | Arvind |
Bluespec: A language for hardware design, simulation, synthesis and verification Invited Talk. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 1st ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2003), 24-26 June 2003, Mont Saint-Michel, France, Proceedings, pp. 249-, 2003, IEEE Computer Society, 0-7695-1923-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
82 | Ravi Nanavati |
Experience report: a pure shirt fits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFP ![In: Proceeding of the 13th ACM SIGPLAN international conference on Functional programming, ICFP 2008, Victoria, BC, Canada, September 20-28, 2008, pp. 347-352, 2008, ACM, 978-1-59593-919-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
functional programming, Haskell, monads, Bluespec |
67 | Teemu Pitkänen, Vesa-Matti Hartikainen, Nirav Dave, Gopal Raghavan |
802.15.3 Transmitter: A Fast Design Cycle Using OFDM Framework in Bluespec. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation, 8th International Workshop, SAMOS 2008, Samos, Greece, July 21-24, 2008. Proceedings, pp. 65-74, 2008, Springer, 978-3-540-70549-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
67 | Hiren D. Patel, Sandeep K. Shukla, E. Mednick, Rishiyur S. Nikhil |
A rule-based model of computation for SystemC: integrating SystemC and Bluespec for co-design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 27-29 July 2006, Embassy Suites, Napa, California, USA, pp. 39-48, 2006, IEEE Computer Society, 1-4244-0421-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
67 | Rishiyur S. Nikhil |
Bluespec System Verilog: efficient, correct RTL from high level specifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 2nd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2004), 23-25 June 2004, San Diego, California, USA, Proceedings, pp. 69-70, 2004, IEEE Computer Society, 0-7803-8509-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
56 | Flavius Gruian, Mark Westmijze |
VHDL vs. Bluespec system verilog: a case study on a Java embedded architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2008 ACM Symposium on Applied Computing (SAC), Fortaleza, Ceara, Brazil, March 16-20, 2008, pp. 1492-1497, 2008, ACM, 978-1-59593-753-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
embedded systems, java processor, Bluespec |
48 | Gaurav Singh 0006, Sandeep K. Shukla |
Model Checking Bluespec Specified Hardware Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 39-43, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
48 | Hiren D. Patel, Sandeep K. Shukla |
Tackling an abstraction gap: co-simulating SystemC DE with bluespec ESL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 279-284, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
48 | Flavius Gruian, Mark Westmijze |
BluEJAMM: A Bluespec Embedded Java Architecture with Memory Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SYNASC ![In: Proceedings of the Ninth International Symposium on Symbolic and Numeric Algorithms for Scientific Computing, SYNASC 2007, Timisoara, Romania, September 26-29, 2007, pp. 459-466, 2007, IEEE Computer Society, 978-0-7695-3078-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
48 | Nirav Dave, Man Cheuk Ng, Arvind |
Automatic synthesis of cache-coherence protocol processors using Bluespec. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 3rd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2005), 11-14 July 2005, Verona, Italy, Proceedings, pp. 25-34, 2005, IEEE Computer Society, 0-7803-9227-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
45 | Gaurav Singh 0006, Sandeep K. Shukla |
Verifying Compiler Based Refinement of BluespecTM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPIN ![In: Model Checking Software, 15th International SPIN Workshop, Los Angeles, CA, USA, August 10-12, 2008, Proceedings, pp. 250-269, 2008, Springer, 978-3-540-85113-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Bluespec System Verilog (BSV), Formal Verification, Hardware Designs, SPIN Model Checker |
45 | Flavius Gruian, Mark Westmijze |
BlueJEP: a flexible and high-performance Java embedded processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
JTRES ![In: Proceedings of the 5th International Workshop on Java Technologies for Real-time and Embedded Systems, JTRES 2007, Institute of Computer Engineering, Vienna University of Technology, 26-28 September 2007, Vienna, Austria, pp. 222-229, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
embedded systems, Java processor, Bluespec |
37 | Man Cheuk Ng, Muralidaran Vijayaraghavan, Nirav Dave, Arvind, Gopal Raghavan, Jamey Hicks |
From WiFi to WiMAX: Techniques for High-Level IP Reuse across Different OFDM Protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 5th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2007), May 30 - June 1st, Nice, France, pp. 71-80, 2007, IEEE Computer Society, 1-4244-1050-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
37 | Gaurav Singh 0006, Sandeep K. Shukla |
Low-power hardware synthesis from TRS-based specifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 27-29 July 2006, Embassy Suites, Napa, California, USA, pp. 49-58, 2006, IEEE Computer Society, 1-4244-0421-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Thomas Bourgeat, Clément Pit-Claudel, Adam Chlipala, Arvind |
The essence of Bluespec: a core language for rule-based hardware design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the 41st ACM SIGPLAN International Conference on Programming Language Design and Implementation, PLDI 2020, London, UK, June 15-20, 2020, pp. 243-257, 2020, ACM, 978-1-4503-7613-6. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
30 | David J. Greaves |
Research Note: An Open Source Bluespec Compiler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1905.03746, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
30 | David J. Greaves |
Further sub-cycle and multi-cycle schedulling support for Bluespec Verilog. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: Proceedings of the 17th ACM-IEEE International Conference on Formal Methods and Models for System Design, MEMOCODE 2019, La Jolla, CA, USA, October 9-11, 2019., pp. 2:1-2:11, 2019, ACM, 978-1-4503-6997-8. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
30 | Oriol Arcas-Abella, Nehir Sönmez |
Bluespec SystemVerilog. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGAs for Software Programmers ![In: FPGAs for Software Programmers, pp. 165-172, 2016, Springer, 978-3-319-26406-6. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
30 | David J. Greaves |
Layering RTL, SAFL, Handel-C and Bluespec constructs on Chisel HCL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 13. ACM/IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE 2015, Austin, TX, USA, September 21-23, 2015, pp. 108-117, 2015, IEEE, 978-1-5090-0237-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
30 | Paulo Matias, Rafael Tuma Guariento, Lírio Onofre Baptista de Almeida, Jan Frans Willem Slaets |
Low-Resource Bluespec Design of a Modular Acquisition and Stimulation System for Neuroscience (Abstract Only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, USA, February 22-24, 2015, pp. 274, 2015, ACM, 978-1-4503-3315-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
30 | Arvind |
Bluespec and Haskell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPCDSL@ICFP ![In: Proceedings of the 1st annual workshop on Functional programming concepts in domain-specific languages, FPCDSL@ICFP 2013, Boston, Massachusetts, USA, September 22, 2013, pp. 1-2, 2013, ACM, 978-1-4503-2380-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
30 | Samir Ouchani, Otmane Aït Mohamed, Mourad Debbabi |
A formal verification framework for Bluespec System Verilog. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FDL ![In: Proceedings of the 2013 Forum on specification and Design Languages, FDL 2013, Paris, France, September 24-26, 2013, pp. 1-7, 2013, IEEE, 978-2-9530504-8-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP BibTeX RDF |
|
30 | Sergio H. M. Durand, Vanderlei Bonato |
A tool to support Bluespec SystemVerilog coding based on UML diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IECON ![In: 38th Annual Conference on IEEE Industrial Electronics Society, IECON 2012, Montreal, QC, Canada, October 25-28, 2012, pp. 4670-4675, 2012, IEEE, 978-1-4673-2419-9. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
30 | Flavius Gruian, Mehmet Ali Arslan |
Java bytecode to hardware made easy with bluespec system verilog. ![Search on Bibsonomy](Pics/bibsonomy.png) |
JTRES ![In: The 10th International Workshop on Java Technologies for Real-time and Embedded Systems, JTRES '12, Copenhagen, Denmark, October 24-26, 2012, pp. 80-87, 2012, ACM, 978-1-4503-1688-0. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
30 | Dominic Richards, David R. Lester |
A monadic approach to automated reasoning for Bluespec SystemVerilog. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Innov. Syst. Softw. Eng. ![In: Innov. Syst. Softw. Eng. 7(2), pp. 85-95, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
30 | Dominic Richards, David R. Lester |
A Prototype Embedding of Bluespec SystemVerilog in the PVS Theorem Prover. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NASA Formal Methods ![In: Second NASA Formal Methods Symposium - NFM 2010, Washington D.C., USA, April 13-15, 2010. Proceedings, pp. 139-148, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
30 | Arvind, Rishiyur S. Nikhil |
Hands-on Introduction to Bluespec System Verilog (BSV) (Abstract). ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 6th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2008), June 5-7, 2008, Anaheim, CA, USA, pp. 205-206, 2008, IEEE Computer Society, 978-1-4244-2417-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Mohammed M. Farag, Lee W. Lerner, Cameron D. Patterson |
Thwarting Software Attacks on Data-Intensive Platforms with Configurable Hardware-Assisted Application Rule Enforcement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: International Conference on Field Programmable Logic and Applications, FPL 2011, September 5-7, Chania, Crete, Greece, pp. 207-212, 2011, IEEE Computer Society, 978-1-4577-1484-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
software attacks, Tailored Trustworthy Space, security, formal verification, cognitive radio, reconfigurable hardware, data-intensive computing, Bluespec |
26 | Jirí Simsa, Satnam Singh |
Designing hardware with dynamic memory abstraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010, pp. 69-72, 2010, ACM, 978-1-60558-911-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
c to gates, high-level synthesis, parallel execution, dynamic memory, bluespec |
26 | Flavius Gruian, Mark Westmijze |
Investigating hardware micro-instruction folding in a Java embedded processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
JTRES ![In: Proceedings of the 8th International Workshop on Java Technologies for Real-Time and Embedded Systems, JTRES 2010, Prague, Czech Republic, August 19-21, 2010, pp. 102-108, 2010, ACM, 978-1-4503-0122-0. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
BlueJEP, bytecode folding, embedded systems, Java processors, Bluespec |
26 | Rishiyur S. Nikhil |
Using GPCE principles for hardware systems and accelerators: (bridging the gap to HW design). ![Search on Bibsonomy](Pics/bibsonomy.png) |
GPCE ![In: Generative Programming and Component Engineering, 8th International Conference, GPCE 2009, Denver, Colorado, USA, October 4-5, 2009, Proceedings, pp. 1-2, 2009, ACM, 978-1-60558-494-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
bluespec systemverilog, bsv, energy efficient computing, fpga, high level synthesis, high performance computing, haskell, hardware accelerators, hardware/software codesign, term rewriting systems, hybrid computing |
19 | Daniel Gajski, Todd M. Austin, Steve Svoboda |
What input-language is the best choice for high level synthesis (HLS)? ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 857-858, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
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19 | Edgar G. Daylight, Sandeep K. Shukla |
On the Difficulties of Concurrent-System Design, Illustrated with a 2×2 Switch Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FM ![In: FM 2009: Formal Methods, Second World Congress, Eindhoven, The Netherlands, November 2-6, 2009. Proceedings, pp. 273-288, 2009, Springer, 978-3-642-05088-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
adaptability, non-functional requirements, formal specification languages, local reasoning |
19 | Hiren D. Patel, Sandeep K. Shukla |
On Cosimulating Multiple Abstraction-Level System-Level Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(2), pp. 394-398, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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19 | Kermin Fleming, Chun-Chieh Lin, Nirav Dave, Arvind, Gopal Raghavan, Jamey Hicks |
H.264 Decoder: A Case Study in Multiple Design Points. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 6th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2008), June 5-7, 2008, Anaheim, CA, USA, pp. 165-174, 2008, IEEE Computer Society, 978-1-4244-2417-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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19 | Michal Karczmarek, Arvind |
Synthesis from multi-cycle atomic actions as a solution to the timing closure problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 24-31, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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19 | Rishiyur S. Nikhil |
Composable Guarded Atomic Actions: a Bridging Model for SoC Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSD ![In: Seventh International Conference on Application of Concurrency to System Design (ACSD 2007), 10-13 July 2007, Bratislava, Slovak Republic, pp. 23-28, 2007, IEEE Computer Society, 978-0-7695-2902-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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19 | Jae W. Lee, Myron King, Krste Asanovic |
Continual hashing for efficient fine-grain state inconsistency detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings, pp. 33-40, 2007, IEEE, 1-4244-1258-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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19 | Nirav Dave, Michael Pellauer, S. Gerding, Arvind |
802.11a transmitter: a case study in microarchitectural exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 27-29 July 2006, Embassy Suites, Napa, California, USA, pp. 59-68, 2006, IEEE Computer Society, 1-4244-0421-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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19 | Ritwik Bhattacharya, Steven M. German, Ganesh Gopalakrishnan |
Exploiting Symmetry and Transactions for Partial Order Reduction of Rule Based Specifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPIN ![In: Model Checking Software, 13th International SPIN Workshop, Vienna, Austria, March 30 - April 1, 2006, Proceedings, pp. 252-270, 2006, Springer, 3-540-33102-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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19 | Michael Pellauer, Mieszko Lis, Don Baltus, Rishiyur S. Nikhil |
Synthesis of synchronous assertions with guarded atomic actions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 3rd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2005), 11-14 July 2005, Verona, Italy, Proceedings, pp. 15-24, 2005, IEEE Computer Society, 0-7803-9227-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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19 | Roland E. Wunderlich, James C. Hoe |
In-system FPGA prototyping of an itanium microarchitecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, FPGA 2004, Monterey, California, USA, February 22-24, 2004, pp. 255, 2004, ACM, 1-58113-829-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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19 | Roland E. Wunderlich, James C. Hoe |
In-System FPGA Prototyping of an Itanium Microarchitecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 11-13 October 2004, San Jose, CA, USA, Proceedings, pp. 288-294, 2004, IEEE Computer Society, 0-7695-2231-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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