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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 12 occurrences of 12 keywords
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Results
Found 36 publication records. Showing 36 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
220 | Kevin Ryan, Sansiri Tanachutiwat, Wei Wang 0003 |
3D CMOL Crossnet for Neuromorphic Network Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NanoNet ![In: Nano-Net - Third International ICST Conference, NanoNet 2008, Boston, MA, USA, September 14-16, 2008, Revised Selected Papers, pp. 1-5, 2008, Springer, 978-3-642-02426-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
CMOS-Nano Hybrid System, CMOL, Crossnet, Neuromorphic Network, 3D IC |
115 | Dmitri B. Strukov, Konstantin K. Likharev |
A reconfigurable architecture for hybrid CMOS/Nanodevice circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, FPGA 2006, Monterey, California, USA, February 22-24, 2006, pp. 131-140, 2006, ACM, 1-59593-292-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
integrated hybrid circuits, architecture, programmable logic, nanoelectronics, programmable interconnect |
100 | Massoud Masoumi, Farshid Raissi, Mahmoud Ahmadian |
NanoCMOS-Molecular Realization of Rijndael. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 285-297, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
VLSI realization, CMOL, Rijndael |
97 | Jung Hoon Lee, Konstantin Likharev |
In Situ Training of CMOL CrossNets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IJCNN ![In: Proceedings of the International Joint Conference on Neural Networks, IJCNN 2006, part of the IEEE World Congress on Computational Intelligence, WCCI 2006, Vancouver, BC, Canada, 16-21 July 2006, pp. 2749-2756, 2006, IEEE, 0-7803-9490-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
74 | Changjian Gao, Mazad S. Zaveri, Dan W. Hammerstrom |
CMOS / CMOL architectures for spiking cortical column. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IJCNN ![In: Proceedings of the International Joint Conference on Neural Networks, IJCNN 2008, part of the IEEE World Congress on Computational Intelligence, WCCI 2008, Hong Kong, China, June 1-6, 2008, pp. 2441-2448, 2008, IEEE, 978-1-4244-1820-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
74 | Jung Hoon Lee, Konstantin Likharev |
CMOL CrossNets as Pattern Classifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWANN ![In: Computational Intelligence and Bioinspired Systems, 8th International Work-Conference on Artificial Neural Networks, IWANN 2005, Vilanova i la Geltrú, Barcelona, Spain, June 8-10, 2005, Proceedings, pp. 446-454, 2005, Springer, 3-540-26208-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
46 | Konstantin Likharev |
Defect-Tolerant Hybrid CMOS/Nanoelectronic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA, pp. 504-504, 2008, IEEE Computer Society, 978-0-7695-3365-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
46 | Özgür Türel, Konstantin Likharev |
CrossNets: Neuromorphic Networks for Nanoelectronic Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICANN ![In: Artificial Neural Networks and Neural Information Processing - ICANN/ICONIP 2003, Joint International Conference ICANN/ICONIP 2003, Istanbul, Turkey, June 26-29, 2003, Proceedings, pp. 753-762, 2003, Springer, 3-540-40408-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
31 | Xiaobo Sharon Hu, Alexander Khitun, Konstantin K. Likharev, Michael T. Niemier, Mingqiang Bao, Kang L. Wang |
Design and defect tolerance beyond CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 223-230, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
cmol, nanotechnology, defect tolerance, qca, spin wave |
28 | Luis A. Camuñas-Mesa, Elisa Vianello, Carlo Reita, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco |
A CMOL-Like Memristor-CMOS Neuromorphic Chip-Core Demonstrating Stochastic Binary STDP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2209.06068, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
28 | Luis A. Camuñas-Mesa, Elisa Vianello, Carlo Reita, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco |
A CMOL-Like Memristor-CMOS Neuromorphic Chip-Core Demonstrating Stochastic Binary STDP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Emerg. Sel. Topics Circuits Syst. ![In: IEEE J. Emerg. Sel. Topics Circuits Syst. 12(4), pp. 898-912, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
28 | Xiaojing Zha, Yinshui Xia, Shang-Luan Xie, Zhufei Chu |
Defect-Tolerant Mapping of CMOL Circuit Targeting Delay Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 36(5), pp. 1118-1132, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
28 | Jihye Kim, Hayoung Lee, Seokjun Jang, Sungho Kang 0001 |
Fine-Grained Defect Diagnosis for CMOL FPGA Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 8, pp. 163140-163151, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
28 | Xiaojing Zha, Yinshui Xia |
Defective cell reuse based defect-tolerance method for CMOL cell mapping optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 105, pp. 104863, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
28 | Xiaojing Zha, Yinshui Xia |
Defect-Tolerant Mapping of CMOL Circuits with Delay Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: GLSVLSI '20: Great Lakes Symposium on VLSI 2020, Virtual Event, China, September 7-9, 2020, pp. 451-456, 2020, ACM, 978-1-4503-7944-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
28 | Jihye Kim, Hayoung Lee, Seokjun Jang, Hogyeong Kim, Sungho Kang 0001 |
Memory-like Defect Diagnosis for CMOL FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISOCC ![In: International SoC Design Conference, ISOCC 2020, Yeosu, South Korea, October 21-24, 2020, pp. 139-140, 2020, IEEE, 978-1-7281-8331-2. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
28 | Advait Madhavan, Tim Sherwood, Dmitri B. Strukov |
High-Throughput Pattern Matching With CMOL FPGA Circuits: Case for Logic-in-Memory Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 26(12), pp. 2759-2772, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
28 | Dingheng Chen, Yinshui Xia, Zhongfeng Wang 0001 |
Stuck-at-close defect propagation and its blocking technique in CMOL cell mapping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 72, pp. 100-108, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
28 | Xiaojing Zha, Yinshui Xia |
Genetic algorithm based on divide-and-conquer strategy for defect-tolerant CMOL mapping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 12th IEEE International Conference on ASIC, ASICON 2017, Guiyang, China, October 25-28, 2017, pp. 863-866, 2017, IEEE, 978-1-5090-6625-4. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
28 | Sadiq M. Sait, Feras Chikh Oughali, Abdalrahman M. Arafeh |
Engineering a Memetic Algorithm from Discrete Cuckoo Search and Tabu Search for Cell Assignment of Hybrid Nanoscale CMOL Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 25(4), pp. 1650023:1-1650023:18, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
28 | Melika Payvand, Luke Theogarajan |
Exploiting local connectivity of CMOL architecture for highly parallel orientation selective neuromorphic chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NANOARCH ![In: Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2015, Boston, MA, USA, July 8-10, 2015, pp. 187-192, 2015, IEEE Computer Society, 978-1-4673-7849-9. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
28 | Pravin Mane, Nishil Talati, Ameya Riswadkar, Bhavan Jasani, C. K. Ramesha |
Implementation of NOR Logic Based on Material Implication on CMOL FPGA Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSID ![In: 28th International Conference on VLSI Design, VLSID 2015, Bangalore, India, January 3-7, 2015, pp. 523-528, 2015, IEEE Computer Society, 978-1-4799-6658-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
28 | Advait Madhavan, Dmitri B. Strukov |
Mapping of image and network processing tasks on high-throughput CMOL FPGA circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, pp. 82-87, 2012, IEEE, 978-1-4673-2657-5. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
28 | Sadiq M. Sait, Abdalrahman M. Arafeh |
Efficient CMOL nanoscale hybrid circuit cell assignment using simulated evolution heuristic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Great Lakes Symposium on VLSI 2012, GLSVLSI'12, Salt Lake City, UT, USA, May 3-4, 2012, pp. 21-26, 2012, ACM, 978-1-4503-1244-8. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
28 | Zine Abid, Ming Liu 0022, Wei Wang 0003 |
3D Integration of CMOL Structures for FPGA Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 60(4), pp. 463-471, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
28 | Ahmad Afifi, Ahmad Ayatollahi, Farshid Raissi |
CMOL implementation of spiking neurons and spike-timing dependent plasticity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 39(4), pp. 357-372, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
28 | Jung Hoon Lee |
Scaling-efficient in-situ training of CMOL CrossNet classifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Neural Networks ![In: Neural Networks 24(10), pp. 1136-1142, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
28 | Konstantin K. Likharev |
Biologically Inspired Computing in CMOL CrossNets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI Fall Symposium: Biologically Inspired Cognitive Architectures ![In: Biologically Inspired Cognitive Architectures, Papers from the 2009 AAAI Fall Symposium, Arlington, Virginia, USA, November 5-7, 2009, 2009, AAAI. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP BibTeX RDF |
|
28 | Konstantin K. Likharev |
CMOL: Second life for silicon. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 39(2), pp. 177-183, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
28 | William N. N. Hung, Changjian Gao, Xiaoyu Song, Dan W. Hammerstrom |
Defect-Tolerant CMOL Cell Assignment via Satisfiability ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/0705.4320, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
28 | Changjian Gao, Dan W. Hammerstrom |
Cortical Models Onto CMOL and CMOS - Architectures and Performance/Price. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(11), pp. 2502-2515, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
28 | Dmitri B. Strukov, Konstantin K. Likharev |
Prospects for the development of digital CMOL circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NANOARCH ![In: 2007 IEEE International Symposium on Nanoscale Architectures, NANOARCH 2007, San Jose, CA, USA, October 21-22, 2007, pp. 109-116, 2007, IEEE Computer Society, 978-1-4244-1790-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
28 | Dmitri B. Strukov, Konstantin K. Likharev |
CMOL FPGA circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CDES ![In: Proceedings of the 2006 International Conference on Computer Design & Conference on Computing in Nanotechnology, CDES 2006, Las Vegas, Nevada, USA, June 26-29, 2006, pp. 213-219, 2006, CSREA Press, 1-60132-009-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP BibTeX RDF |
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28 | Konstantin K. Likharev |
CMOL: possible hybrid semiconductor/nanodevice circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECCTD ![In: Proceedings of the 2005 European Conference on Circuit Theory and Design, ECCTD 2005, Cork, Ireland, August 29th - September 1st 2005, pp. 237-238, 2005, IEEE, 0-7803-9066-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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28 | Jung Hoon Lee, Xiaolong Ma, Konstantin Likharev |
CMOL CrossNets: Possible Neuromorphic Nanoelectronic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NIPS ![In: Advances in Neural Information Processing Systems 18 [Neural Information Processing Systems, NIPS 2005, December 5-8, 2005, Vancouver, British Columbia, Canada], pp. 755-762, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
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23 | T. Srinivasan 0001, M. Sandhya, N. Srikrishna |
An Efficient Parallel IP Lookup Technique using CREW Based Multiprocessor Organization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CNSR ![In: Fourth Annual Conference on Communication Networks and Services Research (CNSR 2006), 24-25 May 2006, Moncton, New Brunswick, Canada, pp. 221-226, 2006, IEEE Computer Society, 0-7695-2578-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
High performance routing, Parallel Algorithm, IP Address Lookup |
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