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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 4 occurrences of 4 keywords
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Results
Found 7 publication records. Showing 7 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
60 | Henrik Eriksson, Per Larsson-Edefors, Atila Alvandpour |
A 2.8 ns 30 uW/MHz area-efficient 32-b Manchester carry-bypass adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 84-87, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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48 | Steven M. Nowick, Kenneth Y. Yun, Ayoob E. Dooply, Peter A. Beerel |
Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '97), 7-10 April 1997, Eindhoven, The Netherlands, pp. 210-, 1997, IEEE Computer Society, 0-8186-7922-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
completion detection, Brent-Kung, Carry-Bypass, asynchronous, adders, hazards, high-performance design |
32 | Joseph F. Kruy |
A fast conditional sum adder using carry bypass logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS Fall Joint Computing Conference (1) ![In: Proceedings of the 1965 fall joint computer conference, part I, AFIPS 1965 (Fall, part I), Las Vegas, Nevada, USA, November 30 - December 1, 1965, pp. 695-703, 1965, ACM, 978-1-4503-7885-7. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
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28 | Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo |
Fast Low-Power 64-Bit Modular Hybrid Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings, pp. 609-617, 2005, Springer, 3-540-29013-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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14 | Hwang-Cherng Chow, I-Chyn Wey |
A 3.3 V 1 GHz low-latency pipelined Booth multiplier with new Manchester carry-pass adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 121-124, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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14 | Diederik Verkest, Luc J. M. Claesen, Hugo De Man |
Correctness proofs of parameterized hardware modules in the CATHEDRAL-II synthesis environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EURO-DAC ![In: European Design Automation Conference, EURO-DAC 1990, Glasgow, Scotland, UK, March 12-15, 1990, pp. 62-66, 1990, IEEE Computer Society, 0-8186-2024-2. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
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14 | Patrick C. McGeer, Robert K. Brayton |
Efficient Algorithms for Computing the Longest Viable Path in a Combinational Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 26th ACM/IEEE Design Automation Conference, Las Vegas, Nevada, USA, June 25-29, 1989., pp. 561-567, 1989, ACM Press. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
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