Search results for "Core2"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
131	Mitsuru Matsui, Junko Nakajima	On the Power of Bitslice Implementation on Intel Core2 Processor.	CHES	2007	DBLP DOI BibTeX RDF	Fast Software Encryption, Bitslice, KASUMI, Core2, AES
77		Core2-Duo / Core2-Quad Processors.	Encyclopedia of Parallel Computing	2011	DBLP DOI BibTeX RDF
60	Bingru Yang, Zhangyan Xu, Wei Song 0004, Jing Gao	Comparison Study on Different Core Attributes.	ICFIE	2007	DBLP DOI BibTeX RDF	HU’s discernibility matrix, Positive region, Simplified discernibility matrix, Rough set, Core, Information entropy
53	Pascal Junod, Marco Macchetti	Revisiting the IDEA Philosophy.	FSE	2009	DBLP DOI BibTeX RDF	IDEA block cipher, WIDEA compression function, Intel Core2 CPU, wordslice implementation
39	José Varela Aldás, Fernando Saá	Remote Monitoring of Electrical Parameters Using M5Stack Core2.	HCI (46)	2023	DBLP DOI BibTeX RDF
39	José Varela Aldás, Jorge Buele, Hairo Mosquera, Guillermo Palacios Navarro 0001	Development of a WBGT Index Meter Based on M5Stack Core2.	HCI (47)	2022	DBLP DOI BibTeX RDF
20	Dimitris Theodoropoulos, Georgi Kuzmanov, Georgi Gaydadjiev	A 3d-audio reconfigurable processor.	FPGA	2010	DBLP DOI BibTeX RDF	reconfigurable computing, communication systems, beamforming, 3d-audio, wave field synthesis
20	Yong Dou, Yuanwu Lei, Guiming Wu, Song Guo 0003, Jie Zhou 0007, Li Shen	FPGA accelerating double/quad-double high precision floating-point applications for ExaScale computing.	ICS	2010	DBLP DOI BibTeX RDF	double-double precision, high precision floating-point multiplication and accumulation (HP-MAC), quad-double precision, FPGA
20	Jaehyun Park 0005, Donghwa Shin, Naehyuck Chang, Massoud Pedram	Accurate modeling and calculation of delay and energy overheads of dynamic voltage scaling in modern high-performance microprocessors.	ISLPED	2010	DBLP DOI BibTeX RDF	DVS overhead model, PLL, DVFS, DC-DC converter
20	Yanteng Sun, Peng Li 0031, Guochang Gu, Yuan Wen, Yuan Liu, Dong Liu	HMMer acceleration using systolic array based reconfigurable architecture.	FPGA	2009	DBLP DOI BibTeX RDF	reconfigurable., systolic array, acceleration, hmmer
20	David B. Thomas, Lee W. Howes, Wayne Luk	A comparison of CPUs, GPUs, FPGAs, and massively parallel processor arrays for random number generation.	FPGA	2009	DBLP DOI BibTeX RDF	mppa, fpga, monte-carlo, random numbers, gpu
20	Yanteng Sun, Peng Li, Guochang Gu, Yuan Wen, Yuan Liu, Dong Liu	Accelerating HMMer on FPGAs using systolic array based architecture.	IPDPS	2009	DBLP DOI BibTeX RDF
20	Konstantis Daloukas, Christos D. Antonopoulos, Nikolaos Bellas	Implementation of a wide-angle lens distortion correction algorithm on the cell broadband engine.	ICS	2009	DBLP DOI BibTeX RDF	cell b.e., heterogeneous multi-core processors, real-time, parallel programming, image warping, stencil computation
20	Matthew Dixon, Jike Chong, Kurt Keutzer	Acceleration of market value-at-risk estimation.	SC-WHPCF	2009	DBLP DOI BibTeX RDF
20	Jean-Luc Beuchat, Emmanuel López-Trejo, Luis Martínez-Ramos, Shigeo Mitsunari, Francisco Rodríguez-Henríquez	Multi-core Implementation of the Tate Pairing over Supersingular Elliptic Curves.	CANS	2009	DBLP DOI BibTeX RDF	supersingular curve, multi-core, Tate pairing, finite field arithmetic, ? T pairing
20	David B. Thomas, Wayne Luk	Credit Risk Modelling using Hardware Accelerated Monte-Carlo Simulation.	FCCM	2008	DBLP DOI BibTeX RDF
20	Qiwei Jin, David B. Thomas, Wayne Luk, Benjamin Cope	Exploring Reconfigurable Architectures for Binomial-Tree Pricing Models.	ARC	2008	DBLP DOI BibTeX RDF
20	Kyriakos Stavrou, Marios Nikolaides, Demos Pavlou, Samer Arandi, Paraskevas Evripidou, Pedro Trancoso	TFlux: A Portable Platform for Data-Driven Multithreading on Commodity Multicore Systems.	ICPP	2008	DBLP DOI BibTeX RDF
20	Guodong Rong, Tiow Seng Tan, Thanh-Tung Cao, Stephanus	Computing two-dimensional Delaunay triangulation using graphics hardware.	SI3D	2008	DBLP DOI BibTeX RDF	computational geometry, Voronoi diagram, graphics hardware, GPGPU
20	Zeeshan Patoli, Michael Gkion, Abdullah Al-Barakati, Wei Zhang 0030, Paul F. Newbury, Martin White	How to Build an Open Source Render Farm Based on Desktop Grid Computing.	IMTIC	2008	DBLP DOI BibTeX RDF	CPU scavenging, Desktop Grid computing, Render farm, Blender Render Farm, Open Source
20	Takeshi Fukaya, Yusaku Yamamoto, Shao-Liang Zhang	A dynamic programming approach to optimizing the blocking strategy for the Householder QR decomposition.	CLUSTER	2008	DBLP DOI BibTeX RDF
20	Nam-Kyung Lee, Nakhoon Baek, Kwan Woo Ryu	Real-Time Simulation of Surface Gravity Ocean Waves Based on the TMA Spectrum.	International Conference on Computational Science (2)	2007	DBLP DOI BibTeX RDF	Ocean wave, TMA, Simulation, Computer graphics