Search results for "DfX"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
217	Jarkko Hyysalo, Sanja Aaramaa, Jouni Similä, Samuli Saukkonen, Pekka Belt, Jari Lehto	A New Way to Organize DFX in a Large Organization.	PROFES	2009	DBLP DOI BibTeX RDF	Design for excellence (DFX), DFX organizational implementation, industrial management, requirements engineering
74	Chun Te Ewe, Peter Y. K. Cheung, George A. Constantinides	Dual Fixed-Point: An Efficient Alternative to Floating-Point Computation.	FPL	2004	DBLP DOI BibTeX RDF
64	George Q. Huang, Kai-Ling Mak	The DFX shell: A generic framework for applying 'Design for X' (DFX) tools.	Int. J. Comput. Integr. Manuf.	1998	DBLP DOI BibTeX RDF
49	Hak-Soo Mok, Jong-Rae Cho, Kwang-Sup Moon	Design for Environment-Friendly Product.	ICCSA (3)	2006	DBLP DOI BibTeX RDF
49	Yervant Zorian, Juan Antonio Carballo	T1: Design for Manufacturability.	Asian Test Symposium	2005	DBLP DOI BibTeX RDF
32	Seongmin Hong, Seungjae Moon, Junsoo Kim 0002, Sungjae Lee, Minsub Kim, Dongsoo Lee, Joo-Young Kim 0001	DFX: A Low-latency Multi-FPGA Appliance for Accelerating Transformer-based Text Generation.	CoRR	2022	DBLP DOI BibTeX RDF
32	Claudio Favi, Federico Campi, Michele Germani, Marco Mandolini	Engineering knowledge formalization and proposition for informatics development towards a CAD-integrated DfX system for product design.	Adv. Eng. Informatics	2022	DBLP DOI BibTeX RDF
32	Seongmin Hong, Seungjae Moon, Junsoo Kim 0002, Sungjae Lee, Minsub Kim, Dongsoo Lee, Joo-Young Kim 0001	DFX: A Low-latency Multi-FPGA Appliance for Accelerating Transformer-based Text Generation.	HCS	2022	DBLP DOI BibTeX RDF
32	Yu-Xuan Hsueh, Jui-Hung Cheng, Jia-Hong Shen, Zih-Ling He, Bai-Chau Chen	Educational AGV Design by AHP and DFX Methods.	HCI (3)	2022	DBLP DOI BibTeX RDF
32	Seongmin Hong, Seungjae Moon, Junsoo Kim 0002, Sungjae Lee, Minsub Kim, Dongsoo Lee, Joo-Young Kim 0001	DFX: A Low-latency Multi-FPGA Appliance for Accelerating Transformer-based Text Generation.	MICRO	2022	DBLP DOI BibTeX RDF
32	Salem Abdennadher, Arani Sinha, Yonghyun Kim	Analog/Mixed Signal IP DFx from a Foundry perspective.	LATS	2019	DBLP DOI BibTeX RDF
32	Amitava Majumdar 0002, Balakrishna Jayadev	Handling Clock-Domain Crossings in Dual Clock-Edge Logic for DFx Features.	ATS	2018	DBLP DOI BibTeX RDF
32	Nicole M. Radziwill, Morgan C. Benton	Design for X (DfX) in the Internet of Things (IoT).	CoRR	2017	DBLP BibTeX RDF
32	Saman Adham, Jonathan Chang, Hung-Jen Liao, John Hung, Ting-Hua Hsieh	The importance of DFX, a foundry perspective.	ITC	2014	DBLP DOI BibTeX RDF
32	Zoe Conroy, James J. Grealish, Harrison Miles, Anthony J. Suto, Alfred L. Crouch, Skip Meyers	Board assisted-BIST: Long and short term solutions for testpoint erosion - Reaching into the DFx toolbox.	ITC	2012	DBLP DOI BibTeX RDF
32	Xavier Vera	DFx for massively multiprocessors.	IOLTS	2009	DBLP DOI BibTeX RDF
32	Robert C. Aitken	DFX and Productivity.	VLSI Design	2009	DBLP DOI BibTeX RDF
32	Ishwar Parulkar, Sriram Anandakumar, Gaurav Agarwal, Gordon Liu, Krishna Rajan, Frank Chiu, Rajesh Pendurkar	DFX of a 3rd Generation, 16-core/32-thread UltraSPARC- CMT Microprocessor.	ITC	2008	DBLP DOI BibTeX RDF
32	Hans G. Kerkhoff, Xiao Zhang 0002	Design of an Infrastructural IP Dependability Manager for a Dependable Reconfigurable Many-Core Processor.	DELTA	2010	DBLP DOI BibTeX RDF	DfX, reliability, SoC, dependability, reconfiguration, availability, BIST, many-core processors
25	Nathaniel J. August	A Robust and Efficient Pre-Silicon Validation Environment for Mixed-Signal Circuits on Intel's Test Chips.	ISQED	2008	DBLP DOI BibTeX RDF	pre-silicon, validation, mixed-signal
25	Rene Segers	If It's All about Yield, Why Talk about Testing?	ETS	2007	DBLP DOI BibTeX RDF