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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 6 occurrences of 6 keywords
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Results
Found 11 publication records. Showing 11 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
76 | Irith Pomeranz, Sudhakar M. Reddy |
EXTEST: a method to extend test sequences of synchronous sequential circuits to increase the fault coverage. |
VTS |
1997 |
DBLP DOI BibTeX RDF |
EXTEST, test generation procedure, logic testing, fault coverage, synchronous sequential circuits, test sequences |
47 | Chen Fu, Barbara G. Ryder |
Navigating error recovery code in Java applications. |
eTX |
2005 |
DBLP DOI BibTeX RDF |
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40 | Ran Wang 0002, Guoliang Li 0004, Rui Li 0084, Jun Qian, Krishnendu Chakrabarty |
ExTest Scheduling and Optimization for 2.5-D SoCs With Wrapped Tiles. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2017 |
DBLP DOI BibTeX RDF |
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40 | Ran Wang 0002, Guoliang Li 0004, Rui Li 0084, Jun Qian, Krishnendu Chakrabarty |
ExTest scheduling for 2.5D system-on-chip integrated circuits. |
VTS |
2015 |
DBLP DOI BibTeX RDF |
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23 | Erik Jan Marinissen, Bart Vermeulen, Henk D. L. Hollmann, Ben Bennetts |
Minimizing Pattern Count for Interconnect Test under a Ground Bounce Constraint. |
IEEE Des. Test Comput. |
2003 |
DBLP DOI BibTeX RDF |
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23 | Suzette Vandivier, Mark Wahl, Jeff Rearick |
First IC Validation of IEEE Std. 1149.6. |
ITC |
2003 |
DBLP DOI BibTeX RDF |
1149.6, test receiver |
23 | Dave Stang, Ramaswami Dandapani |
An Implementation of IEEE 1149.1 to Avoid Timing Violations and Other Practical In-Compliance Improvements. |
ITC |
2002 |
DBLP DOI BibTeX RDF |
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23 | Jin-Hua Hong, Chung-Hung Tsai, Cheng-Wen Wu |
Hierarchical system test by an IEEE 1149.5 MTM-bus slave-module interface core. |
IEEE Trans. Very Large Scale Integr. Syst. |
2000 |
DBLP DOI BibTeX RDF |
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23 | Sungju Park, Taehyung Kim |
A New IEEE 1149.1 Boundary Scan Design for the Detection of Delay Defects. |
DATE |
2000 |
DBLP DOI BibTeX RDF |
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23 | Kanad Chakraborty, Pinaki Mazumder |
A programmable boundary scan technique for board-level, parallel functional duplex march testing of word-oriented multiport static RAMs. |
ED&TC |
1997 |
DBLP DOI BibTeX RDF |
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23 | Jin-Hua Hong, Chung-Hung Tsai, Cheng-Wen Wu |
Hierarchical Testing Using the IEEE Std 1149.5 Module Test and Maintenance Slave Interface Module. |
Asian Test Symposium |
1996 |
DBLP DOI BibTeX RDF |
MTM Bus, Boundary Scan, Hierarchical Testing |
Displaying result #1 - #11 of 11 (100 per page; Change: )
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