Search results for "FPAA"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
97	Ming Liu, Hua Yu, Wei Wang 0003	FPAA Based on Integration of CMOS and Nanojunction Devices for Neuromorphic Applications.	NanoNet	2008	DBLP DOI BibTeX RDF	Field programmable analog arrays (FPAA), Nanojunction devices, Operational amplifier (Op-amp)
81	Tiago R. Balen, Fernanda Lima Kastensmidt, Marcelo Lubaszewski, Michel Renovell	Single Event Upset in SRAM-based Field Programmable Analog Arrays: Effects and Mitigation.	ISVLSI	2007	DBLP DOI BibTeX RDF
81	Haibo Wang 0005, Sarma B. K. Vrudhula	Behavioral synthesis of field programmable analog array circuits.	ACM Trans. Design Autom. Electr. Syst.	2002	DBLP DOI BibTeX RDF	Programmable circuits, analog synthesis
73	Paul E. Hasler, Christopher M. Twigg	An OTA-based Large-Scale Field Programmable Analog Array (FPAA) for faster On-Chip Communication and Computation.	ISCAS	2007	DBLP DOI BibTeX RDF
73	Joachim Becker, Stanis Trendelenburg, Fabian Henrici, Yiannos Manoli	A field programmable Gm-C filter array (FPAA) for online adaptation to environmental changes.	AHS	2007	DBLP DOI BibTeX RDF
65	Joachim Becker, Stanis Trendelenburg, Fabian Henrici, Yiannos Manoli	Synthesis of analog filters on an evolvable hardware platform using a genetic algorithm.	GECCO	2007	DBLP DOI BibTeX RDF	hardware realization, genetic algorithm, computer aided design, synthesis, evolvable hardware, microelectronics
65	Puxuan Dong, Griff L. Bilbro, Mo-Yuen Chow	Implementation of Artificial Neural Network for Real Time Applications Using Field Programmable Analog Arrays.	IJCNN	2006	DBLP DOI BibTeX RDF
65	I. Faik Baskaya, Sasank Reddy, Sung Kyu Lim, Tyson S. Hall, David V. Anderson	Mapping algorithm for large-scale field programmable analog array.	ISPD	2005	DBLP DOI BibTeX RDF	floating gates, mapping, field programmable analog array
57	Brian McGinley, Patrick Rocke, Fearghal Morgan, John Maher	Reconfigurable analogue hardware evolution of adaptive spiking neural network controllers.	GECCO	2008	DBLP DOI BibTeX RDF	FPAA hardware evolution, analogue neural networks., spiking neural networks
57	Sree Ganesan, Ranga Vemuri	A Methodology for Rapid Prototyping of Analog Systems.	ICCD	1999	DBLP DOI BibTeX RDF	rapid prototyping, technology mapping, placement and routing, FPAA, field-programmable analog arrays
56	Csaba Petre, Craig Schlottmann, Paul E. Hasler	Automated conversion of Simulink designs to analog hardware on an FPAA.	ISCAS	2008	DBLP DOI BibTeX RDF
49	I. Faik Baskaya, Sasank Reddy, Sung Kyu Lim, David V. Anderson	Placement for large-scale floating-gate field-programable analog arrays.	IEEE Trans. Very Large Scale Integr. Syst.	2006	DBLP DOI BibTeX RDF
49	Amit Laknaur, Sai Raghuram Durbha, Haibo Wang 0005	Built-In-Self-Testing Techniques for Programmable Capacitor Arrays.	J. Electron. Test.	2006	DBLP DOI BibTeX RDF	programmable capacitor array, built-in-self-testing, analog testing, field programmable analog array
49	Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler, David V. Anderson	Developing Large-Scale Field-Programmable Analog Arrays.	IPDPS	2004	DBLP DOI BibTeX RDF
49	Baidya Nath Ray, Parimal Pal Chaudhuri, Prasanta Kumar Nandi	Design of OTA Based Field Programmable Analog Array.	VLSI Design	2000	DBLP DOI BibTeX RDF	Operational Transconductance Amplifier(OTA), Amplitude Modulation (AM), Frequency Modulation (FM)
48	Tiago R. Balen, Antonio Q. Andrade, Florence Azaïs, Marcelo Lubaszewski, Michel Renovell	Applying the Oscillation Test Strategy to FPAA's Configurable Analog Blocks.	J. Electron. Test.	2005	DBLP DOI BibTeX RDF	FPAA test, Oscillation Test Strategy (OTS), Built-In Self Test (BIST), analog testing
41	Patrick Rocke, Brian McGinley, John Maher, Fearghal Morgan, Jim Harkin	Investigating the Suitability of FPAAs for Evolved Hardware Spiking Neural Networks.	ICES	2008	DBLP DOI BibTeX RDF	FPAA Hardware Evolution, Analogue Neural Networks, Spiking Neural Networks
41	Patrick Rocke, Brian McGinley, Fearghal Morgan, John Maher	Reconfigurable Hardware Evolution Platform for a Spiking Neural Network Robotics Controller.	ARC	2007	DBLP DOI BibTeX RDF	Genetic Algorithm, Evolutionary Computation, Reconfigurable Hardware, Spiking Neural Networks, FPAA
41	Gustavo Pereira, Antonio Andrade Jr., Tiago R. Balen, Marcelo Lubaszewski, Florence Azaïs, Michel Renovell	Testing the Interconnect Networks and I/O Resources of Field Programmable Analog Arrays.	VTS	2005	DBLP DOI BibTeX RDF	FPAA testing, Mixed-signal test, interconnect testing, oscillation-based test
40	Stanis Trendelenburg, Joachim Becker, Fabian Henrici, Yiannos Manoli	A GP algorithm for efficient synthesis of GM-C filters on a hexagonal FPAA structure.	GECCO	2008	DBLP DOI BibTeX RDF	filter synthesis, genetic programming, evolvable hardware, microelectronics
40	A. Fathima Jabeen, M. Y. Sanavullah	FPAA Based Bandwidth Recovery in Satellite Subsystems via Intrinsic Evolution.	FSKD (3)	2008	DBLP DOI BibTeX RDF
40	Christopher M. Twigg, Paul E. Hasler, I. Faik Baskaya	A Self-Contained Large-Scale FPAA Development Platform.	ISCAS	2007	DBLP DOI BibTeX RDF
40	Erik Schüler, Luigi Carro	A Low Power FPAA for Wide Band Applications.	FPL	2004	DBLP DOI BibTeX RDF
40	Joachim Becker, Yiannos Manoli	A continuous-time field programmable analog array (FPAA) consisting of digitally reconfigurable GM-cells.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
40	Stuart Colsell, Reuben Edwards	Adaptive Real-Time Systems and the FPAA.	FPL	2003	DBLP DOI BibTeX RDF
33	Diego Pedro Morales, Antonio García 0001, Alberto J. Palma, Miguel A. Carvajal, Encarnación Castillo, Luis F. Capitán-Vallvey	Enhancing ADC resolution through Field Programmable Analog Array dynamic reconfiguration.	FPL	2008	DBLP DOI BibTeX RDF
33	Adrian Stoica, Didier Keymeulen, Ricardo Salem Zebulum, Mohammad M. Mojarradi, Srinivas Katkoori, Taher Daud	Adaptive and Evolvable Analog Electronics for Space Applications.	ICES	2007	DBLP DOI BibTeX RDF	Adaptive Hardware, Field Programmable Arrays
33	Kofi M. Odame, Christopher M. Twigg, Arindam Basu, Paul E. Hasler	Studying Nonlinear Dynamical Systems on a Reconfigurable Analog Platform.	ISCAS	2007	DBLP DOI BibTeX RDF
33	Ricardo Salem Zebulum, Mohammad M. Mojarradi, Adrian Stoica, Didier Keymeulen, Taher Daud	Self-Reconfigurable Analog Arrays: Off-The Shelf Adaptive Electronics for Space Applications.	AHS	2007	DBLP DOI BibTeX RDF
33	Wei Zhang, Yuanxiang Li 0001, Guoliang He	Intrinsic Evolution of Frequency Splitter with a New Analog EHW Platform.	ISICA	2007	DBLP DOI BibTeX RDF
33	John Maher, Brian McGinley, Patrick Rocke, Fearghal Morgan	Intrinsic Hardware Evolution of Neural Networks in Reconfigurable Analogue and Digital Devices.	FCCM	2006	DBLP DOI BibTeX RDF
33	Silviu Ionita, Emil Sofron	Field-Programmable Analog Filters Array with Applications for Fuzzy Inference Systems.	HIS	2004	DBLP DOI BibTeX RDF
33	Ji Luo 0003, Joseph B. Bernstein, J. Ari Tuchman, Hu Huang 0001, Kuan-Jung Chung, Anthony L. Wilson	A High Performance Radiation-Hard Field Programmable Analog Array .	ISQED	2004	DBLP DOI BibTeX RDF
33	Haibo Wang 0005, Suchitra Kulkarni, Spyros Tragoudas	On-line Testing Field Programmable Analog Array Circuits.	ITC	2004	DBLP DOI BibTeX RDF
33	Tiago R. Balen, Antonio Andrade Jr., Florence Azaïs, Michel Renovell, Marcelo Lubaszewski	Testing the Configurable Analog Blocks of Field Programmable Analog Arrays.	ITC	2004	DBLP DOI BibTeX RDF
33	James M. Hereford, Charles Pruitt	Robust Sensor Systems using Evolvable Hardware.	Evolvable Hardware	2004	DBLP DOI BibTeX RDF
33	José Franco Machado do Amaral, Jorge Luís Machado do Amaral, Cristina Costa Santini, Ricardo Tanscheit, Marley M. B. R. Vellasco, Marco Aurélio Cavalcanti Pacheco	Towards Evolvable Analog Fuzzy Logic Controllers.	Evolvable Hardware	2002	DBLP DOI BibTeX RDF
33	Bogdan Pankiewicz, Marek Wójcikowski, Stanislaw Szczepanski, Yichuang Sun	A CMOS field programmable analog array and its application in continuous-time OTA-C filter design.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
24	Tiago R. Balen, José Vicente Calvano, Marcelo Lubaszewski, Michel Renovell	Built-In Self-Test of Field Programmable Analog Arrays based on Transient Response Analysis.	J. Electron. Test.	2007	DBLP DOI BibTeX RDF	Analog built-in self-test, Transient response analysis, FPAA
24	Tiago R. Balen, José Vicente Calvano, Marcelo Lubaszewski, Michel Renovell	Functional Test of Field Programmable Analog Arrays.	VTS	2006	DBLP DOI BibTeX RDF	analog built-in self-test, transient response analysis, FPAA
24	David Varghese, J. Neil Ross	A continuous-time hierarchical field programmable analogue array for rapid prototyping and hierarchical approach to analogue systems design.	SBCCI	2005	DBLP DOI BibTeX RDF	HFPAA, differential difference amplifier, interconnectivity analysis, non-permuting grouped combinations listing algorithm, rents rule, second generation current-conveyor, hierarchical architecture, FPAA
24	Eric E. Fabris, Luigi Carro, Sergio Bampi	Modeling and designing high performance analog reconfigurable circuits.	SBCCI	2004	DBLP DOI BibTeX RDF	analog programmability, band-pass sigma-delta modulator, analog design, FPAA
24	Sree Ganesan, Ranga Vemuri	Technology Mapping and Retargeting for Field-Programmable Analog Arrays.	DATE	2000	DBLP DOI BibTeX RDF	Rapid prototyping Field-programmable analog arrays, Technology Mapping, Retargeting, FPAA
24	Mary Ann George, Ahmed S. Elwakil, Anis Allagui, Costas Psychalinos	Design of Complex-Order PI/PID Speed Controllers and its FPAA Realization.	IEEE Access	2023	DBLP DOI BibTeX RDF
24	Ahmed M. Hassanein, Ahmed H. Madian, Ahmed Gomaa Radwan, Lobna A. Said	On the Design Flow of the Fractional-Order Analog Filters Between FPAA Implementation and Circuit Realization.	IEEE Access	2023	DBLP DOI BibTeX RDF
24	Jennifer Hasler	The Rise of SoC FPAA Devices.	CICC	2022	DBLP DOI BibTeX RDF
24	Jennifer Hasler, Sahil Shah	An SoC FPAA Based Programmable, Ladder-Filter Based, Linear-Phase Analog Filter.	IEEE Trans. Circuits Syst. I Regul. Pap.	2021	DBLP DOI BibTeX RDF
24	Kenan Altun	FPAA Implementations of Fractional-Order Chaotic Systems.	J. Circuits Syst. Comput.	2021	DBLP DOI BibTeX RDF
24	Alejandro Macho, Manuel Garcia Teruel, Félix García Loro, Pablo Baizán, Manuel Blázquez, Elio San Cristóbal, Gabriel Díaz 0001, Rosario Gil 0001, Manuel Castro 0001	Dynamic reconfiguration in FPAA for technical and nontechnical education in a global environment.	Comput. Appl. Eng. Educ.	2021	DBLP DOI BibTeX RDF
24	Aishwarya Natarajan, Jennifer Hasler	Implementation of Synapses with Hodgkin Huxley Neurons on the FPAA.	ISCAS	2019	DBLP DOI BibTeX RDF
24	Krit Angkeaw, Witthawas Pongyart, Pipat Prommee	Design and Implementation of FPAA based LQR Controller for Magnetic Levitation Control System.	TSP	2019	DBLP DOI BibTeX RDF
24	Szymon Szczesny	HDL-Based Synthesis System With Debugger for Current-Mode FPAA.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2018	DBLP DOI BibTeX RDF
24	Aishwarya Natarajan, Jennifer Hasler	Hodgkin-Huxley Neuron and FPAA Dynamics.	IEEE Trans. Biomed. Circuits Syst.	2018	DBLP DOI BibTeX RDF
24	Jennifer Hasler, Sahil Shah	VMM + WTA Embedded Classifiers Learning Algorithm Implementable on SoC FPAA Devices.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2018	DBLP DOI BibTeX RDF
24	Sahil Shah, Jennifer Hasler	SoC FPAA Hardware Implementation of a VMM+WTA Embedded Learning Classifier.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2018	DBLP DOI BibTeX RDF
24	Luis Abraham Sánchez-Gaspariano, Carlos Muñiz-Montero, Yazmin Gaytan Luis, Victor Rodolfo Gonzalez-Diaz, Jesús Manuel Muñoz-Pacheco, Roberto C. Ambrosio-Lazaro, Alejandro Díaz-Sánchez, Pedro Guzman Simon	High-level design of a 2nd order DT-SDM via SIMSIDES and its FPAA implementation.	CONIELECOMP	2018	DBLP DOI BibTeX RDF
24	Jennifer Hasler	Circuit Implementations Teaching a Junior Level Circuits Course Utilizing the SoC FPAA.	ISCAS	2018	DBLP DOI BibTeX RDF
24	Jennifer Hasler, Sahil Shah	Enabling Embedded Learning and Classification implemented on SoC FPAA devices.	ISCAS	2018	DBLP DOI BibTeX RDF
24	Sihwan Kim, Sahil Shah, Jennifer Hasler	Calibration of Floating-Gate SoC FPAA System.	IEEE Trans. Very Large Scale Integr. Syst.	2017	DBLP DOI BibTeX RDF
24	Szymon Szczesny	Current-Mode FPAA with CMRR Elimination and Low Sensitivity to Mismatch.	Circuits Syst. Signal Process.	2017	DBLP DOI BibTeX RDF
24	Ting Yang, Junfeng Hu 0002, Wei Geng, Yili Fu, Mahdi Tavakoli	FPAA-Based Control of Bilateral Teleoperation Systems for Enhanced User Task Performance.	Presence Teleoperators Virtual Environ.	2017	DBLP DOI BibTeX RDF
24	Ayanga D. Kalupahana, Nisal Hemadasa, Nipun Wijerathne, Anuranga Ranasinghe, Ajith Pasqual	FPAA and FPGA based universal sensor node design.	ICST	2017	DBLP DOI BibTeX RDF
24	Enis Günay, Kenan Altun	A performance comparison study of programmable platforms: FPAA and FPGA implementation of COOK communication system.	ECCTD	2017	DBLP DOI BibTeX RDF
24	Jennifer Hasler, Aishwarya Natarajan, Sahil Shah, Sihwan Kim	SoC FPAA immersed junior level circuits course.	MSE	2017	DBLP DOI BibTeX RDF
24	Alejandro Macho, Manuel Garcia Teruel, Pablo Baizán, Manuel Blázquez, Félix García Loro, Elio San Cristóbal, Gabriel Díaz 0001, Rosario Gil 0001, Manuel Castro 0001	Dynamic reconfiguration in FPAA and its use in education.	FIE	2017	DBLP DOI BibTeX RDF
24	Aishwarya Natarajan, Jennifer Hasler	Using SoC FPAA and integrated simulator for implementation of circuits and systems in education.	ISCAS	2017	DBLP DOI BibTeX RDF
24	Sahil Shah, Jennifer Hasler	Low power speech detector on a FPAA.	ISCAS	2017	DBLP DOI BibTeX RDF
24	Sihwan Kim, Sahil Shah, Jennifer Hasler	Floating-gate FPAA calibration for analog system design and built-in self test.	ISCAS	2017	DBLP DOI BibTeX RDF
24	Robert Suszynski	Quick method for parameter research of higher order sigma-delta modulators using dynamically reprogrammable FPAA.	MIXDES	2017	DBLP DOI BibTeX RDF
24	Krzysztof Wawryn, Robert Suszynski	Prototyping of WTA ANNs using FPAA devices.	MIXDES	2017	DBLP DOI BibTeX RDF
24	Enis Günay, Kenan Altun	FPAA implementation of CNN based chaos generator.	SIU	2017	DBLP DOI BibTeX RDF
24	Suma George, Sihwan Kim, Sahil Shah, Jennifer Hasler, Michelle Collins, Farhan Adil, Richard B. Wunderlich, Stephen Nease, Shubha Ramakrishnan	A Programmable and Configurable Mixed-Mode FPAA SoC.	IEEE Trans. Very Large Scale Integr. Syst.	2016	DBLP DOI BibTeX RDF
24	Sahil Shah, Caitlin N. Teague, Omer T. Inan, Jennifer Hasler	A proof-of-concept classifier for acoustic signals from the knee joint on a FPAA.	IEEE SENSORS	2016	DBLP DOI BibTeX RDF
24	Sahil Shah, Jennifer Hasler, Sihwan Kim, Ishan Lal, Matt Kagle, Michelle Collins	Demonstration of a remote FPAA system for research and education.	ISCAS	2016	DBLP DOI BibTeX RDF
24	Benjamin Bolte, Sahil Shah, Sihwan Kim, Philip Hwang, Jennifer Hasler	Live demonstration: FPAA Demonstration Controlled through Android-Based Device.	ISCAS	2016	DBLP DOI BibTeX RDF
24	Sihwan Kim, Farhan Adil, Scott Koziol, Stephen Nease, Michelle Collins, Sahil Shah, Matt Kagle, Jennifer Hasler	SoC FPAA IC, PCB, and tool demonstration.	ISCAS	2016	DBLP DOI BibTeX RDF
24	Sahil Shah, Jennifer Hasler, Sihwan Kim, Ishan Lal, Matt Kagle, Michelle Collins	A remote FPAA system for research and education.	ISCAS	2016	DBLP DOI BibTeX RDF
24	Jennifer Hasler, Sihwan Kim, Sahil Shah, Farhan Adil, Michelle Collins, Scott Koziol, Stephen Nease	Transforming mixed-signal circuits class through SoC FPAA IC, PCB, and toolset.	EWME	2016	DBLP DOI BibTeX RDF
24	Daniel DeDorigo, Yiannos Manoli	An OTA-C signal processing FPAA with 305 MHz GBW and integrated frequency-independent filter tuning.	A-SSCC	2016	DBLP DOI BibTeX RDF
24	Robert Suszynski, Jacek Marciniak, Krzysztof Wawryn	An artificial neural network for classification a quality of a coal fuel in combustion chambers using FPAA.	MIXDES	2016	DBLP DOI BibTeX RDF
24	Mika Laiho, Jennifer O. Hasler, Jiantao Zhou 0003, Chao Du, Wei Lu 0003, Eero Lehtonen, Jussi H. Poikonen	FPAA/Memristor Hybrid Computing Infrastructure.	IEEE Trans. Circuits Syst. I Regul. Pap.	2015	DBLP DOI BibTeX RDF
24	Michelle Collins, Jennifer Hasler, Suma George	Analog systems education: An integrated toolset and FPAA SoC boards.	MSE	2015	DBLP DOI BibTeX RDF
24	Manuel C. Felgueiras, André V. Fidalgo, Gustavo Ribeiro Alves, Guilherme Costa, Luis Schlichting, Golberi S. Ferreira	A remote lab to support e-learning on FPAA.	exp.at	2015	DBLP DOI BibTeX RDF
24	Stephen Brink, Jennifer Hasler, Richard B. Wunderlich	Adaptive Floating-Gate Circuit Enabled Large-Scale FPAA.	IEEE Trans. Very Large Scale Integr. Syst.	2014	DBLP DOI BibTeX RDF
24	Anthony S. Deese, Chika O. Nwankpa	Design and Testing of Custom FPAA Hardware With Improved Scalability for Emulation of Smart Grids.	IEEE Trans. Smart Grid	2014	DBLP DOI BibTeX RDF
24	Aditya Gour, Ramesh Sanga, R. P. Behera, P. Sahoo, Nagarajan Murali, Sav Satyamurty	Design and Development of FPGA and FPAA Based Remote Terminal Units for Nuclear Power Plants.	ISED	2014	DBLP DOI BibTeX RDF
24	Florian Kölbl, Raphael Guillaume, Jennifer Hasler, Sébastien Joucla, Blaise Yvert, Sylvie Renaud, Noëlle Lewis	A closed-loop charge balancing FPAA circuit with sub-nano-amp DC error for electrical stimulation.	BioCAS	2014	DBLP DOI BibTeX RDF
24	Mika Laiho, Eero Lehtonen, Jennifer O. Hasler, Jiantao Zhou 0003, Chao Du, Wei Lu 0003, Jussi H. Poikonen	Analog signal processing on a FPAA/memristor hybrid circuit.	ISCAS	2014	DBLP DOI BibTeX RDF
24	Soliman A. Mahmoud, Eman A. Soliman	Digitally programmable second generation current conveyor-based FPAA.	Int. J. Circuit Theory Appl.	2013	DBLP DOI BibTeX RDF
24	Stephen Brink, Jennifer Hasler, Richard B. Wunderlich	A large-scale FPAA enabling adaptive floating-gate circuits.	MWSCAS	2013	DBLP DOI BibTeX RDF
24	György Györök, Tamás Orosz, Margit Mako, Tamas Treiber	To achieve circuit robustness by co-operation of FPAA and embedded microcontroller.	SACI	2013	DBLP DOI BibTeX RDF
24	Daniel Fernández, Luís Martínez-Alvarado, Jordi Madrenas	A Translinear, Log-Domain FPAA on Standard CMOS Technology.	IEEE J. Solid State Circuits	2012	DBLP DOI BibTeX RDF
24	Craig Schlottmann, David Abramson 0002, Paul E. Hasler	A MITE-Based Translinear FPAA.	IEEE Trans. Very Large Scale Integr. Syst.	2012	DBLP DOI BibTeX RDF
24	Craig Schlottmann, Csaba Petre, Paul E. Hasler	A High-Level Simulink-Based Tool for FPAA Configuration.	IEEE Trans. Very Large Scale Integr. Syst.	2012	DBLP DOI BibTeX RDF
24	Craig Schlottmann, Paul E. Hasler	FPAA empowering cooperative analog-digital signal processing.	ICASSP	2012	DBLP DOI BibTeX RDF
24	Craig Schlottmann, Stephen Nease, Samuel A. Shapero, Paul E. Hasler	A mixed-mode FPAA SoC for analog-enhanced signal processing.	CICC	2012	DBLP DOI BibTeX RDF
24	Xuhai Chen, Min Du	Automatic gain control for multi-channel electrochemical detection system combining FPGA and FPAA.	BMEI	2012	DBLP DOI BibTeX RDF
24	Anthony S. Deese, Chika O. Nwankpa	Utilization of FPAA Technology for Emulation of Multiscale Power System Dynamics in Smart Grids.	IEEE Trans. Smart Grid	2011	DBLP DOI BibTeX RDF
24	Craig Schlottmann, Paul E. Hasler	A Highly Dense, Low Power, Programmable Analog Vector-Matrix Multiplier: The FPAA Implementation.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2011	DBLP DOI BibTeX RDF
24	Soliman A. Mahmoud, Kareem Ali, Mahmoud Rabea, Abdallah Amgad, Ahmed Adel, Ahmed Nasser, Hussien Mohamed, Yehea I. Ismail	Low power FPAA design based on OTA using 90nm CMOS technology.	ICEAC	2011	DBLP DOI BibTeX RDF