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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 12 occurrences of 10 keywords
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Results
Found 14 publication records. Showing 14 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
134 | Yao-Wen Chang, Kai Zhu 0001, Guang-Ming Wu, D. F. Wong 0001, C. K. Wong |
Analysis of FPGA/FPIC switch modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 8(1), pp. 11-37, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
FPIC, FPGA, synthesis, layout, Computer-aided design of VLSI |
117 | Yao-Wen Chang, D. F. Wong 0001, C. K. Wong |
Design and analysis of FPGA/FPIC switch modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 394-401, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
FPGA/FPIC switch modules, routing resources, FPIC, network-flow techniques, field programmable interconnect chip, field programmable gate arrays, FPGA, field programmable gate arrays, logic design, heuristic algorithm, programmable logic arrays, routability |
92 | Dinesh Bhatia, James Haralambides |
Resource requirements and layouts for field programmable interconnection chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 8(3), pp. 346-355, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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69 | David W. Matolak, Beibei Wang 0004 |
Efficient statistical parallel interference cancellation for DS-CDMA in Rayleigh fading channels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Wirel. Commun. ![In: IEEE Trans. Wirel. Commun. 6(2), pp. 566-574, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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69 | Yung-Fa Huang, Jyh-Horng Wen |
An Adaptive Full Parallel Interference Canceller with Imperfect Channel Estimation for CDMA Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACIS-ICIS ![In: 4th Annual ACIS International Conference on Computer and Information Science (ICIS 2005), 14-16 July 2005, Jeju Island, South Korea, pp. 707-712, 2005, IEEE Computer Society, 0-7695-2296-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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52 | Adam Postula, David Abramson 0001, Paul Logothetis |
The Design of a Specialised Processor for the Simulation of Sintering A. Postula. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 22rd EUROMICRO Conference '96, Beyond 2000: Hardware and Software Design Strategies, September 2-5, 1996, Prague, Czech Republic, pp. 501-508, 1996, IEEE Computer Society, 0-8186-7487-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
specialised processor, sintering simulation, metallurgical sintering, commercially available gate array technology, Xilinx FPGA, Aptix FPIC switch technology, FPGAs, Monte-Carlo simulation, special purpose computers |
46 | Rajani K. Mudi, Kalyan Majumdar, Chanchal Dey |
A Gain Adaptive Fuzzy Logic Controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFSS ![In: Advances in Soft Computing - AFSS 2002, 2002 AFSS International Conference on Fuzzy Systems. Calcutta, India, February 3-6, 2002, Proceedings, pp. 62-68, 2002, Springer, 3-540-43150-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
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36 | Nathan Jessurun, Olivia P. Dizon-Paradis, Jacob Harrison, Shajib Ghosh, Mark M. Tehranipoor, Damon L. Woodard, Navid Asadizanjani |
FPIC: A Novel Semantic Dataset for Optical PCB Assurance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 19(2), pp. 17:1-17:21, April 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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36 | Nathan Jessurun, Olivia P. Dizon-Paradis, Jacob Harrison, Shajib Ghosh, Mark M. Tehranipoor, Damon L. Woodard, Navid Asadizanjani |
FPIC: A Novel Semantic Dataset for Optical PCB Assurance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2202.08414, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP BibTeX RDF |
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36 | Mao-Hsu Yen, Chu Yu, Yih-Hsia Lin, Chang-Hsien Chung |
Hyper-Universal Switch Network for FPIC Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CISIS ![In: Seventh International Conference on Complex, Intelligent, and Software Intensive Systems, CISIS 2013, Taichung, Taiwan, July 3-5, 2013, pp. 456-460, 2013, IEEE Computer Society, 978-0-7695-4992-7. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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36 | Dinesh Bhatia, James Haralambides |
Bounds, designs and layouts for multi-terminal FPIC architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 28(2), pp. 141-156, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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36 | Yachyang Sun, C. L. Liu 0001 |
Routing in a New 2-Dimensional FPGA/FPIC Routing Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 31st Conference on Design Automation, San Diego, California, USA, June 6-10, 1994., pp. 171-176, 1994, ACM Press, 0-7803-1836-6. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
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23 | Wasimon Panichpattanakul, Watit Benjapolakul |
Fuzzy power control with weighting function in DS-CDMA cellular mobile communication system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 785-788, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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23 | Yachyang Sun, Ting-Chi Wang, Chak-Kuen Wong, C. L. Liu 0001 |
Routing for symmetric FPGAs and FPICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(1), pp. 20-31, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
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