Search results for "FPSLIC"

Found 12 publication records. Showing 12 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
99	M. Ernst, Michael Jung 0002, Felix Madlener, Sorin A. Huss, Rainer Blümel	A Reconfigurable System on Chip Implementation for Elliptic Curve Cryptography over GF(2n).	CHES	2002	DBLP DOI BibTeX RDF	$ mathbb {GF}(2^n)$ arithmetic, Karatsuba multiplication, VHDL model generator, coprocessor synthesis, FPGA hardware acceleration, Atmel FPSLIC platform, Elliptic Curve cryptography
66	Adam Megacz	A Library and Platform for FPGA Bitstream Manipulation.	FCCM	2007	DBLP DOI BibTeX RDF
65	Panayotis E. Nastou, Yannis C. Stamatiou	Dynamically Modifiable Ciphers Using a Reconfigurable CAST-128 Based Algorithm on ATMEL's FPSLIC(tm) Reconfigurable FPGA Architecture.	IPDPS	2002	DBLP DOI BibTeX RDF
55	Salvatore Pontarelli, Gian Carlo Cardarilli, A. Malvoni, Marco Ottavi, Marco Re, Adelio Salsano	System-on-Chip Oriented Fault-Tolerant Sequential Systems Implementation Methodology.	DFT	2001	DBLP DOI BibTeX RDF	FPSLIC, fault recover, fault tolerance, FPGA, System On Chip, reconfiguration, fault detection
44	Robert H. Klenke	A UAV-Based Computer Engineering Capstone Senior Design Project.	MSE	2005	DBLP DOI BibTeX RDF
44	Guy Lecurieux Lafayette	Programmable System Level Integration Brings System-on-Chip Design to the Desktop.	FPL	2000	DBLP DOI BibTeX RDF
42	Jiri Kadlec, Martin Danek	Design and Verification Methodology for Reconfigurable Designs in Atmel FPSLIC.	DDECS	2006	DBLP DOI BibTeX RDF
22	Ondrej Novák, Zdenek Plíva, Jiri Jenícek, Zbynek Mader, Michal Jarkovský	Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead.	DFT	2006	DBLP DOI BibTeX RDF
22	Roman Bartosinski, Martin Danek, Petr Honzík, Rudolf Matousek	Dynamic reconfiguration in FPGA-based SoC designs (abstract only).	FPGA	2005	DBLP DOI BibTeX RDF
22	Charles E. Stroud, John Sunwoo, Srinivas M. Garimella, Jonathan Harris	Built-In Self-Test for System-on-Chip: A Case Study.	ITC	2004	DBLP DOI BibTeX RDF
22	Jens Bieger, Sorin A. Huss, Michael Jung 0002, Stephan Klaus, Thomas Steininger	Rapid Prototyping for Configurable System-on-a-Chip Platforms: A Simulation Based Approach.	VLSI Design	2004	DBLP DOI BibTeX RDF
22	Maik Boden, Jörg Schneider, Klaus Feske, Steffen Rülke	Enhanced Reusability for SoC-Based HW/SW Co-Design.	DSD	2002	DBLP DOI BibTeX RDF

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