Search results for "FSB"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
94	Markku-Juhani Olavi Saarinen	Linearization Attacks Against Syndrome Based Hashes.	INDOCRYPT	2007	DBLP DOI BibTeX RDF	FSB, Syndrome Based Hashes, Provably Secure Hashes, Hash Function Cryptanalysis, Linearization Attack
93	Daniel J. Bernstein, Tanja Lange 0001, Ruben Niederhagen, Christiane Peters, Peter Schwabe	FSBday.	INDOCRYPT	2009	DBLP DOI BibTeX RDF	Birthday, FSB - Wagner, not much Memory, SHA-3
73	Mohammed Meziani, Özgür Dagdelen, Pierre-Louis Cayrel, Sidi Mohamed El Yousfi Alaoui	S-FSB: An Improved Variant of the FSB Hash Family.	ISA	2011	DBLP DOI BibTeX RDF
61	Eriko Nurvitadhi, Jumnit Hong, Shih-Lien Lu	Active Cache Emulator.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
61	Jumnit Hong, Eriko Nurvitadhi, Shih-Lien Lu	Design, implementation, and verification of active cache emulator (ACE).	FPGA	2006	DBLP DOI BibTeX RDF	FPGA-based emulator, real-time emulation, cache modeling
61	Chun-Wu Roger Leng, Dik Lun Lee	Optimal Weight Assignment for Signature Generation.	ACM Trans. Database Syst.	1992	DBLP DOI BibTeX RDF	coding methods, optimization, information retrieval, access method, document retrieval, text retrieval, signature file, superimposed coding
57	Jeffrey Allred, Jack Coyne, William Lynch, Vincent Natoli, Joseph Grecco, Joel Morrissette	Smith-Waterman implementation on a FSB-FPGA module using the Intel Accelerator Abstraction Layer.	IPDPS	2009	DBLP DOI BibTeX RDF
40	Liu Ling, Neal Oliver, Bhushan Chitlur, Qigang Wang, Alvin Chen, Wenbo Shen, Zhihong Yu, Arthur Sheiman, Ian McCallum, Joseph Grecco, Henry Mitchel, Dong Liu, Prabhat Gupta	High-performance, energy-efficient platforms using in-socket FPGA accelerators.	FPGA	2009	DBLP DOI BibTeX RDF	in-socket accelerator, fpga, agility
40	Perry H. Wang, Jamison D. Collins, Christopher T. Weaver, Belliappa Kuttanna, Shahram Salamian, Gautham N. Chinya, Ethan Schuchman, Oliver Schilling, Thorsten Doil, Sebastian Steibl, Hong Wang 0003	Intel® atomTM processor core made FPGA-synthesizable.	FPGA	2009	DBLP DOI BibTeX RDF	intel atom, synthesizable core, fpga, emulator
40	Cong Shen 0001, Michael P. Fitz	MIMO-OFDM Beamforming for Improved Channel Estimation.	IEEE J. Sel. Areas Commun.	2008	DBLP DOI BibTeX RDF
40	Hossain Shahriar, Mohammad Zulkernine	Mutation-Based Testing of Format String Bugs.	HASE	2008	DBLP DOI BibTeX RDF
40	Suvra Sekhar Das, Elisabeth de Carvalho, Ramjee Prasad	Variable Sub-Carrier Bandwidths in OFDM Systems.	VTC Spring	2007	DBLP DOI BibTeX RDF
40	Jenwei Hsieh, Tau Leng, Victor Mashayekhi, Reza Rooholamini	Impact of Level 2 Cache and Memory Subsystem on the Scalability of Clusters of Small-Scale SMP Servers.	CLUSTER	2000	DBLP DOI BibTeX RDF	Level 2 Cache, Clusters of SMP Servers, Parallel Benchmark, Performance Evaluation, Message Passing Interface, Memory Subsystem
36	Jean Frédéric Myoupo, Vianney Kengne Tchendji, Yannick Florian Yankam, Joël Casimir Tagne	FSB-DReViSeR: Flow Splitting-Based Dynamic Replacement of Virtual Service Resources for Mobile Users in Virtual Heterogeneous Networks.	J. Comput. Networks Commun.	2020	DBLP DOI BibTeX RDF
36	Zhiyong Li 0001, ShaoMiao Chen, Shiwen Zhang, Shilong Jiang, Yu Gu 0018, Mourad Nouioua	FSB-EA: Fuzzy search bias guided constraint handling technique for evolutionary algorithm.	Expert Syst. Appl.	2019	DBLP DOI BibTeX RDF
36	Mohammad Samadi Gharajeh	FSB-System: A Detection System for Fire, Suffocation, and Burn Based on Fuzzy Decision Making, MCDM, and RGB Model in Wireless Sensor Networks.	Wirel. Pers. Commun.	2019	DBLP DOI BibTeX RDF
36	Daniel J. Bernstein, Tanja Lange 0001, Ruben Niederhagen, Christiane Peters, Peter Schwabe	Implementing Wagner's generalized birthday attack against the SHA-3 round-1 candidate FSB.	IACR Cryptol. ePrint Arch.	2009	DBLP BibTeX RDF
20	Tao Wang 0004, Qigang Wang, Dong Liu, Michael Liao, Kevin Wang, Lu Cao, Li Zhao 0002, Ravi R. Iyer 0001, Ramesh Illikkal, John Du, Liang Wang	Hardware/Software Co-Simulation for Last Level Cache Exploration.	NAS	2009	DBLP DOI BibTeX RDF
20	Chen Huang 0005, Frank Vahid	Transmuting coprocessors: dynamic loading of FPGA coprocessors.	DAC	2009	DBLP DOI BibTeX RDF	coprocessing, FPGAs, online algorithms, dynamic optimization, acceleration, runtime configuration
20	David W. Siljenberg, Steve Baumgartner, Tim Buchholtz, Mark Maxson, Trevor Timpane, Jeff Johnson	Xbox360TM Front Side Bus - A 21.6 GB/s End-to-End Interface Design.	ASP-DAC	2007	DBLP DOI BibTeX RDF
20	Rodolfo Pellizzoni, Marco Caccamo	Toward the Predictable Integration of Real-Time COTS Based Systems.	RTSS	2007	DBLP DOI BibTeX RDF
20	Erika Gunadi, Mikko H. Lipasti	A position-insensitive finished store buffer.	ICCD	2007	DBLP DOI BibTeX RDF
20	Maarten Verboom, David Crombie, Evelien Dijk, Mildred Theunisz	Spoken Subtitles: Making Subtitled TV Programmes Accessible.	ICCHP	2002	DBLP DOI BibTeX RDF