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The graphs summarize 13 occurrences of 11 keywords
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Results
Found 14 publication records. Showing 14 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
104 | Ingo Sander, Axel Jantsch, Zhonghai Lu |
Development and Application of Design Transformations in ForSyDe. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 10364-10369, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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104 | Tarvo Raudvere, Ingo Sander, Ashish Kumar Singh, Axel Jantsch |
Verification of design decisions in ForSyDe. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2003, Newport Beach, CA, USA, October 1-3, 2003, pp. 176-181, 2003, ACM, 1-58113-742-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
design refinement, verification, system design |
81 | Ingo Sander, Axel Jantsch |
System modeling and transformational design refinement in ForSyDe [formal system design]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(1), pp. 17-32, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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81 | Ingo Sander, Axel Jantsch, Zhonghai Lu |
A Case Study of Hardware and Software Synthesis in ForSyDe. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSS ![In: Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), October 2-4, 2002, Kyoto, Japan, pp. 86-91, 2002, ACM / IEEE Computer Society, 1-58113-576-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
system design, design methodology, software synthesis, hardware synthesis |
60 | Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch |
EWD: A metamodeling driven customizable multi-MoC system modeling framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 12(3), pp. 33:1-33:43, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
ForSyDe, MoC, heterogeneous system design, interoperable modeling language, Metamodeling, metamodel, SystemC, functional language, denotational semantics, Ptolemy II |
34 | George Ungureanu, José Edil Guimarães de Medeiros, Timmy Sundström, Ingemar Söderquist, Anders Åhlander, Ingo Sander |
ForSyDe-Atom: Taming Complexity in Cyber Physical System Design with Layers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 20(2), pp. 10:1-10:27, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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34 | George Ungureanu |
ForSyDe-Atom: Design of Heterogeneous Embedded Systems: Taming Complexity with Layers, Atoms and Patterns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
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2021 |
RDF |
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34 | Ingo Sander, Axel Jantsch, Seyed-Hosein Attarzadeh-Niaki |
ForSyDe: System Design Using a Functional Language and Models of Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 99-140, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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34 | Hussein Ezzeddine, Johnny Öberg, Francesco Robino |
Validation of Pipelined Double-precision Floating Point operations in a multi-core environment implemented on FPGA using the ForSyDe/NoC system generator tool suite. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NORCHIP ![In: 2014 NORCHIP, Tampere, Finland, October 27-28, 2014, pp. 1-6, 2014, IEEE. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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34 | Ingo Sander, Axel Jantsch |
Modelling Adaptive Systems in ForSyDe. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VerAS@TPHOLs ![In: Proceedings of the First Workshop on Verification of Adaptive Systems, VerAS@TPHOLs 2007, Kaiserslautern, Germany, September 14, 2007, pp. 39-54, 2007, Elsevier. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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34 | Ingo Sander |
System Modeling and Design Refinement in ForSyDe. ![Search on Bibsonomy](Pics/bibsonomy.png) |
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2003 |
RDF |
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23 | Zhonghai Lu, Ingo Sander, Axel Jantsch |
Towards Performance-Oriented Pattern-Based Refinement of Synchronous Models onto NoC Communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August - 1 September 2006, Dubrovnik, Croatia, pp. 37-44, 2006, IEEE Computer Society, 0-7695-2609-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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23 | Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, Axel Jantsch |
Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 690-691, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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23 | Ingo Sander, Axel Jantsch |
Transformation based communication and clock domain refinement for system design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 281-286, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
design refinement, system design, system modeling |
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