Search results for "GNR"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
203	Saroj K. Nayak	Carbon nanotube, graphene and atomic wires as next generation interconnects: current status and future promise.	SLIP	2009	DBLP DOI BibTeX RDF	quantum simulation, performance, design, reliability
144	Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah, Daniel Gajski	Generic netlist representation for system and PE level design exploration.	CODES+ISSS	2006	DBLP DOI BibTeX RDF	GNR, NISC, modeling, synthesis, system design, architecture description language, application-specific processor
143	Tamer Ragheb, Yehia Massoud	On the modeling of resistance in graphene nanoribbon (GNR) for future interconnect applications.	ICCAD	2008	DBLP DOI BibTeX RDF
113	Xuebei Yang, Jyotsna Chauhan, Jing Guo, Kartik Mohanram	Graphene tunneling FET and its applications in low-power circuit design.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	graphene nanoribbons, tunneling fets, low-power
90	Sansiri Tanachutiwat, Wei Wang 0003	Exploring Multi-layer Graphene Nanoribbon Interconnects.	NanoNet	2008	DBLP DOI BibTeX RDF	Graphene, Modeling, Interconnect, Conductance
68	Siu-Yeung Cho, Tommy W. S. Chow	Robust face recognition using generalized neural reflectance model.	Neural Comput. Appl.	2006	DBLP DOI BibTeX RDF	Neural networks, Face recognition, Shape from shading
53	Kaustav Banerjee, Yasin Khatami, Chaitanya Kshirsagar, Seid Hadi Rasouli	Graphene based transistors: physics, status and future perspectives.	ISPD	2009	DBLP DOI BibTeX RDF	cnfet, gnr-fet., graphene, carbon nanotubes
45	Xuebei Yang, Gianluca Fiori, Giuseppe Iannaccone, Kartik Mohanram	Semi-analytical model for schottky-barrier carbon nanotube and graphene nanoribbon transistors.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	graphene nanoribbons, schottky-barrier, models, carbon nanotubes
32	Bita Gorjiara, Daniel Gajski	Automatic architecture refinement techniques for customizing processing elements.	DAC	2008	DBLP DOI BibTeX RDF	GNR, nanocoded architectures, no-instruction-set computer (NISC), refinement, high-level synthesis, power, ASIP, datapath, netlist
30	Zohmingliana, Bijit Choudhuri, Brinda Bhowmick	Design of Dual-Band Rectifier Circuit for RF Energy Harvesting Using Double-Gate Graphene Nanoribbon (GNR) Vertical Tunnel FET.	IEEE Trans. Consumer Electron.	2024	DBLP DOI BibTeX RDF
30	Chia-Heng Yen, Jin-Tai Yan	Layer-Minimization-Oriented GNR Area Routing.	ICECS	2023	DBLP DOI BibTeX RDF
30	Sandip Bhattacharya, Subhajit Das 0001, Shubham Tayal, J. Ajayan, Leo Joseph, Tarun Kumar Juluru, Arnab Mukhopadhyay, Sayan Kanungo, Debaprasad Das, Shashank Rebelli	Minimization of crosstalk noise and delay using reduced graphene nano ribbon (GNR) interconnect.	Microelectron. J.	2022	DBLP DOI BibTeX RDF
30	Konstantinos Rallis, Panagiotis Dimitrakis, Georgios Ch. Sirakoulis, Antonio Rubio 0001, Ioannis Karafyllidis	Current Characteristics of Defective GNR Nanoelectronic Devices.	NANOARCH	2022	DBLP DOI BibTeX RDF
30	Jin-Tai Yan	Single-Layer Delay-Driven GNR Nontree Routing Under Resource Constraint for Yield Improvement.	IEEE Trans. Very Large Scale Integr. Syst.	2020	DBLP DOI BibTeX RDF
30	Jin-Tai Yan	Delay-Constrained GNR Routing for Layer Minimization.	IEEE Trans. Very Large Scale Integr. Syst.	2020	DBLP DOI BibTeX RDF
30	Jin-Tai Yan, Po-Yuan Huang, Chien-Yi Wang	Construction of Obstacle-Avoiding Delay-Driven GNR Routing Tree.	TENCON	2020	DBLP DOI BibTeX RDF
30	Komal Sable, Manodipan Sahoo	Electrical and Thermal Analysis of Cu-CNT Composite TSV and GNR Interconnects.	ISDCS	2020	DBLP DOI BibTeX RDF
30	Jin-Tai Yan	Single-Layer GNR Routing for Minimization of Bending Delay.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2019	DBLP DOI BibTeX RDF
30	Mahdi Zarepour, Abdolali Abdipour, Gholamreza Moradi 0001	Modeling, analysis, and simulation of millimeter-wave Graphene Nano-Ribbon (GNR) cylindrical coupled transmission line.	Microelectron. J.	2019	DBLP DOI BibTeX RDF
30	Hader E. El-hmaily, Rabab Ezz-Eldin, Ahmed I. A. Galal, Hesham F. A. Hamed	High Performance GNR Power Gating for Low-Voltage CMOS Circuits.	CoRR	2019	DBLP BibTeX RDF
30	Jin-Tai Yan, Chia-Heng Yen	Construction of Delay-Driven GNR Routing Tree.	NEWCAS	2019	DBLP DOI BibTeX RDF
30	Subrata Das, Debesh Kumar Das	Floorplanning in Graphene Nanoribbon (GNR) Based Circuits.	ISVLSI	2018	DBLP DOI BibTeX RDF
30	Subrata Das, Debesh Kumar Das	A technique to construct global routing trees for graphene nanoribbon (GNR).	ISQED	2017	DBLP DOI BibTeX RDF
30	Parmjit Singh, Rajeevan Chandel, Neha Sharma	Stability analysis of SRAM cell using CNT and GNR field effect transistors.	IC3	2017	DBLP DOI BibTeX RDF
30	Waikhom Mona Chanu, Vikash Prasad, Debaprasad Das	Performance analysis of temperature dependent GNR interconnect.	VDAT	2016	DBLP DOI BibTeX RDF
30	Sandip Bhattacharya, Debaprasad Das, Hafizur Rahaman 0001	A Novel GNR Interconnect Model to Reduce Crosstalk Delay.	ISED	2014	DBLP DOI BibTeX RDF
30	Mohammad Reza Moslemi, Mohammad Hossein Sheikhi, Kamyar Saghafi, Mohammad Kazem Moravvej-Farshi	Electronic properties of a dual-gated GNR-FET under uniaxial tensile strain.	Microelectron. Reliab.	2012	DBLP DOI BibTeX RDF
30	Yuri N. Shunin, Yu. F. Zhukovskii, Nataly Burlutskaya, Stefano Bellucci	Theoretical Simulations on Electric Properties of CNT-Me and GNR-Me Interconnects Using Effective Media Approach.	FET	2011	DBLP DOI BibTeX RDF
30	N. G. Bheniye, P. M. Panchal, A. Gajarushi	High performance dual gate GNR fet.	ICWET	2011	DBLP DOI BibTeX RDF
23	Steven Euijong Whang, Omar Benjelloun, Hector Garcia-Molina	Generic entity resolution with negative rules.	VLDB J.	2009	DBLP DOI BibTeX RDF	Generic entity resolution, Negative rule, Data cleaning, Inconsistency
23	Suksun Hutangkabodee, Yahya H. Zweiri, Lakmal D. Seneviratne, Kaspar Althoefer	Validation of soil parameter identification for track-terrain interaction Dynamics.	IROS	2007	DBLP DOI BibTeX RDF