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The graphs summarize 4 occurrences of 3 keywords
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Found 3 publication records. Showing 3 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
66 | Sid Ahmed Ali Touati |
On the Periodic Register Need in Software Pipelining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 56(11), pp. 1493-1504, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Periodic Register Requirement, MAXLIVE, Periodic Register Sufficiency, Stage Scheduling, Instruction Level Parallelism, Software Pipelining |
59 | Mounira Bachir, Sid Ahmed Ali Touati, Albert Cohen 0001 |
Post-pass periodic register allocation to minimise loop unrolling degree. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Proceedings of the 2008 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'08), Tucson, AZ, USA, June 12-13, 2008, pp. 141-150, 2008, ACM, 978-1-60558-104-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
embedded code optimisation, periodic register allocation, software pipelining, loop unrolling |
46 | Shashi Deepa Arcot, Henry G. Dietz, Sarojini Priyadarshini Rajachidambaram |
Manipulating MAXLIVE for Spill-Free Register Allocation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 18th International Workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005, Revised Selected Papers, pp. 32-46, 2005, Springer, 978-3-540-69329-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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