Search results for "MMX"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
104	Helger Lipmaa	IDEA: A Cipher For Multimedia Architectures?	Selected Areas in Cryptography	1998	DBLP DOI BibTeX RDF	multimedia architectures, Pentium MMX, block ciphers, IDEA, fast implementations
89	Jih-Ching Chiu, Yu-Liang Chou, Hua-Yi Tzeng	A multi-streaming SIMD architecture for multimedia applications.	Conf. Computing Frontiers	2009	DBLP DOI BibTeX RDF	SIMD, streaming processing, streaming computing, processor-in-memory, mmx, multimedia extensions, pim
87	Yi-Shin Tung, Chia-Chiang Ho, Ja-Ling Wu	MMX-Based DCT and MC Algorithms for Real-Time Pure Software MPEG Decoding.	ICMCS, Vol. 1	1999	DBLP DOI BibTeX RDF	Pattern-Based IDCT, MPEG, Video Compression, MMX
63	Jong-Myon Kim	The Impact of Multimedia Extensions for Multimedia Applications on Mobile Computing Systems.	APCHI	2008	DBLP DOI BibTeX RDF	Mobile multimedia computing systems, Multiprocessor arrays, Parallel processing, Multimedia extensions
61	Alfred Strey, Martin Bange	Performance Analysis of Intel's MMX and SSE: A Case Study.	Euro-Par	2001	DBLP DOI BibTeX RDF
61	Gianni Conte, Stefano Tommesani, Francesco Zanichelli	The Long And Winding Road to High-Performance Image Processing with MMX/SSE.	CAMP	2000	DBLP DOI BibTeX RDF	SIMD on registers, high-performance image processing, image processing, image processing, instruction sets, real-time image processing, multimedia processing
56	Manuel Hernandez Calviño, Sergio Ruben Geninatti, José Ignacio Benavides Benítez	Developing an MMX Extension for the MicroBlaze Soft Processor.	ReConFig	2008	DBLP DOI BibTeX RDF	MicroBlaze, FPGA, MMX, FSL
56	Ravi Bhargava, Lizy Kurian John, Brian L. Evans, Ramesh Radhakrishnan	Evaluating MMX Technology Using DSP and Multimedia Applications.	MICRO	1998	DBLP DOI BibTeX RDF	machine measurement, digital signal processing, workload characterization, performance monitoring, MMX
55	Ville Lappalainen	Performance Analysis of Intel MMX Technology for an H.263 Video H.263 Video Encoder.	ACM Multimedia	1998	DBLP DOI BibTeX RDF	Intel MMX, performance, video encoder, H.263
47	Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis	Matrix register file and extended subwords: two techniques for embedded media processors.	Conf. Computing Frontiers	2005	DBLP DOI BibTeX RDF	embedded media processors, multimedia kernels, sub-word parallelism, register file
45	Randall J. Fisher, Henry G. Dietz	The Scc Compiler: SWARing at MMX 3DNow!	LCPC	1999	DBLP DOI BibTeX RDF
42	Jih-Ching Chiu, Kai-Ming Yang, Yu-Liang Chou	Design of a novel SIMD architecture by fusing operations and registers.	ICS	2009	DBLP DOI BibTeX RDF	processor-in-memory, mmx, simd, multimedia extensions, pim
32	Nigel C. Paver, Moinul H. Khan, Bradley C. Aldrich	Optimizing mobile multimedia using SIMD techniques.	Multim. Tools Appl.	2006	DBLP DOI BibTeX RDF	Multimedia, Mobile, Architecture, Programming, SIMD
32	Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis	Limitations of special-purpose instructions for similarity measurements in media SIMD extensions.	CASES	2006	DBLP DOI BibTeX RDF	sub-word parallelism, similarity measurements, SIMD
32	Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis	Accelerating Color Space Conversion Using Extended Subwords and the Matrix Register File.	ISM	2006	DBLP DOI BibTeX RDF	Color space conversion, SIMD architectures, multimedia extensions
32	Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis	Performance Comparison of SIMD Implementations of the Discrete Wavelet Transform.	ASAP	2005	DBLP DOI BibTeX RDF	SIMD extensions, Discrete Wavelet Transform, lifting scheme
32	John Y. Oliver, Venkatesh Akella, Frederic T. Chong	Efficient orchestration of sub-word parallelism in media processors.	SPAA	2004	DBLP DOI BibTeX RDF	sub word, parallelism, media processors, decoupled control
32	Deependra Talla, Lizy Kurian John, Doug Burger	Bottlenecks in Multimedia Processing with SIMD Style Extensions and Architectural Enhancements.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	bottlenecks in SIMD extensions, hardware address generation, low-overhead looping, superscalar general-purpose processors, performance evaluation, workload characterization, subword parallelism, Media processing, data reorganization
32	Junko Nakajima, Mitsuru Matsui	Performance Analysis and Parallel Implementation of Dedicated Hash Functions.	EUROCRYPT	2002	DBLP DOI BibTeX RDF	dedicated hash functions, Pentium III, parallel implementations
32	Jesús Corbal, Roger Espasa, Mateo Valero	On the Efficiency of Reductions in µ-SIMD Media Extensions.	IEEE PACT	2001	DBLP DOI BibTeX RDF
32	Gary R. Bradski, Vadim Pisarevsky	Intel's Computer Vision Library: Applications in Calibration, Stereo, Segmentation, Tracking, Gesture, Face and Object Recognition.	CVPR	2000	DBLP DOI BibTeX RDF
32	Jesús Corbal, Roger Espasa, Mateo Valero	Exploiting a New Level of DLP in Multimedia Applications.	MICRO	1999	DBLP DOI BibTeX RDF
32	Deependra Talla, Lizy Kurian John	Performance Evaluation and Benchmarking of Native Signal Processing.	Euro-Par	1999	DBLP DOI BibTeX RDF
30	Maria Ana Castro, Adrian E. Roitberg, Fabio D. Cukiernik	Simulation of mesogenic diruthenium tetracarboxylates: Development of a force field for coordination polymers of the MMX type.	J. Comput. Chem.	2013	DBLP DOI BibTeX RDF
30		MMX.	Encyclopedia of Parallel Computing	2011	DBLP DOI BibTeX RDF
30	N. C. Paver, Moinul H. Khan, Bradley C. Aldrich	Accelerating mobile multimedia using Intel Wireless MMX™ technology.	ISMSE	2004	DBLP DOI BibTeX RDF
30	Raymond R. Hoare, D. Swope, S. Bailey	A Width Expansion of MMX/SIMD Processing Architecture on an FPGA.	IASTED PDCS	2002	DBLP BibTeX RDF
30	Pohsiang Hsu, K. J. Ray Liu	Software Optimization of Video Codecs on Pentium Processor with MMX Technology.	EURASIP J. Adv. Signal Process.	2001	DBLP DOI BibTeX RDF
30	James C. Abel, Michael A. Julier	MMX-enabled Dolby Digital decoder.	IEEE Signal Process. Mag.	2000	DBLP DOI BibTeX RDF
30	Pohsiang Hsu, K. J. Ray Liu	Software Optimization of H.263 Video Encoder on Pentium Processor with MMX Technology.	IEEE International Conference on Multimedia and Expo (I)	2000	DBLP DOI BibTeX RDF
30	Julio Villalba, Javier Hormigo, Mario A. González, Emilio L. Zapata	MMX-Like Architecture Extension to Support the Rotation Operation.	IEEE International Conference on Multimedia and Expo (III)	2000	DBLP DOI BibTeX RDF
30	Aart J. C. Bik, Milind Girkar, Mohammad R. Haghighat	Incorporating Intel MMX technology into a Java JIT compiler.	Sci. Program.	1999	DBLP DOI BibTeX RDF
30	James C. Abel, Michael A. Julier	Implementation of a high-quality Dolby Digital decoder using MMX TM technology.	ICASSP	1999	DBLP DOI BibTeX RDF
30	Massimo Bertozzi, Alberto Broggi, Alessandra Fascioli, Stefano Tommesani	Addressing Real-Time Requirements of Automatic Vehicle Guidance with MMX Technology.	IPPS/SPDP Workshops	1999	DBLP DOI BibTeX RDF
30	Don Draper, Matt Crowley, John Holst, Greg Favor, Albrecht Schoy, Jeff Trull, Amos Ben-Meir, Rajesh Khanna, Dennis Wendell, Ravi Krishna, Joe Nolan, Dhiraj Mallick, Hamid Partovi, Mark Roberts, Mark Johnson, Thomas H. Lee	Circuit techniques in a 266-MHz MMX-enabled processor.	IEEE J. Solid State Circuits	1997	DBLP DOI BibTeX RDF
30	Alex Peleg, Sam Wilkie, Uri C. Weiser	Intel MMX for Multimedia PCs.	Commun. ACM	1997	DBLP DOI BibTeX RDF
30	Mooly Eden, Michael Kagan	The Pentium® processor with MMX™ technology.	COMPCON	1997	DBLP DOI BibTeX RDF
30	Michael A. Greene	Pentium® processor with MMX™ technology performance.	COMPCON	1997	DBLP DOI BibTeX RDF
30	Oded Lempel, Alex Peleg, Uri C. Weiser	Intel's MMX™ technology-a new instruction set extension.	COMPCON	1997	DBLP DOI BibTeX RDF
30	Alex Peleg, Uri C. Weiser	MMX technology extension to the Intel architecture.	IEEE Micro	1996	DBLP DOI BibTeX RDF
26	Juan Carlos Rojas, Miriam Leeser	Programming portable optimized multimedia applications.	ACM Multimedia	2003	DBLP DOI BibTeX RDF	TriMedia, optimization, multimedia, SIMD, portability, MMX, SSE, AltiVec, SSE2
26	Nathan T. Slingerland, Alan Jay Smith	Measuring the Performance of Multimedia Instruction Sets.	IEEE Trans. Computers	2002	DBLP DOI BibTeX RDF	VIS, MVI, multimedia, benchmarking, performance measurement, SIMD, subword parallel, MMX, SSE, AltiVec
26	Shaun Bangay	Implementation and applications of the distortion operator.	Afrigraph	2001	DBLP DOI BibTeX RDF	texturing, projection, lighting, image warping, MMX
16	Luigi Carro, Stephan Wong	Introduction to the Future of Reconfigurable Computing and Processor Architectures.	SAMOS	2009	DBLP DOI BibTeX RDF
16	Wojciech Bozejko, Jaroslaw Pempera, Czeslaw Smutnicki	Parallel Simulated Annealing for the Job Shop Scheduling Problem.	ICCS (1)	2009	DBLP DOI BibTeX RDF	scheduling, optimization, simulated annealing, job shop, parallel metaheuristics
16	Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis	Versatility of extended subwords and the matrix register file.	ACM Trans. Archit. Code Optim.	2008	DBLP DOI BibTeX RDF	SIMD programming, SIMD architectures, multimedia standards
16	Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis	Implementing the 2-D Wavelet Transform on SIMD-Enhanced General-Purpose Processors.	IEEE Trans. Multim.	2008	DBLP DOI BibTeX RDF
16	Dorit Nuzman, Ayal Zaks	Outer-loop vectorization: revisited for short SIMD architectures.	PACT	2008	DBLP DOI BibTeX RDF	SIMD, vectorization, data reuse, subword parallelism
16	Asadollah Shahbahrami, Ben H. H. Juurlink	Optimization of Content-Based Image Retrieval Functions.	ISM	2008	DBLP DOI BibTeX RDF
16	Byeong Kil Lee, Lizy Kurian John, Eugene John	Architectural enhancements for network congestion control applications.	IEEE Trans. Very Large Scale Integr. Syst.	2006	DBLP DOI BibTeX RDF
16	Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff	The CSI multimedia architecture.	IEEE Trans. Very Large Scale Integr. Syst.	2005	DBLP DOI BibTeX RDF
16	Ruby B. Lee, A. Murat Fiskiran	PLX: An Instruction Set Architecture and Testbed for Multimedia Information Processing.	J. VLSI Signal Process.	2005	DBLP DOI BibTeX RDF	multimedia, processor architecture, instruction set architecture, media processing, ISA
16	Luigi Di Stefano, Stefano Mattoccia, Federico Tombari	Speeding-up NCC-Based Template Matching Using Parallel Multimedia Instructions.	CAMP	2005	DBLP DOI BibTeX RDF
16	Reza Farivar 0003, Mahdi Fazeli, Hamid Sarbazi-Azad	A Cordic-Based Processor Extension for Scalar and Vector Processing.	IPDPS	2005	DBLP DOI BibTeX RDF
16	Jongmyon Kim, D. Scott Wills, Linda M. Wills	Architectural Enhancements for Color Image and Video Processing on Embedded Systems.	Asia-Pacific Computer Systems Architecture Conference	2005	DBLP DOI BibTeX RDF
16	Ying-li Tian, Max Lu, Arun Hampapur	Robust and Efficient Foreground Analysis for Real-Time Video Surveillance.	CVPR (1)	2005	DBLP DOI BibTeX RDF
16	Bo Fang, Guobin Shen, Shipeng Li 0001, Huifang Chen	Techniques for efficient DCT/IDCT implementation on generic GPU.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
16	Byeong Kil Lee, Lizy Kurian John, Eugene John	Architectural Support for Accelerating Congestion Control Applications in Network Processors.	ASAP	2005	DBLP DOI BibTeX RDF
16	Jongmyon Kim, D. Scott Wills, Linda M. Wills	Implementing and Evaluating Color-Aware Instruction Set for Low-Memory, Embedded Video Processing in Data Parallel Architectures.	EUC	2005	DBLP DOI BibTeX RDF
16	Esther Salamí, Mateo Valero	Initial Evaluation of Multimedia Extensions on VLIW Architectures.	SAMOS	2004	DBLP DOI BibTeX RDF
16	Jongmyon Kim, D. Scott Wills	Efficient Processing of Color Image Sequences Using a Color-Aware Instruction Set on Mobile Systems.	ASAP	2004	DBLP DOI BibTeX RDF
16	Gaël Rouvroy, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat	Efficient Uses of FPGAs for Implementations of DES and Its Experimental Linear Cryptanalysis.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	FPGA, Cryptography, DES, linear cryptanalysis, efficient implementations
16	Jongmyon Kim, Santithorn Bunchua, D. Scott Wills	Fast Color Image Processing Using Quantized Color Instruction Set.	ITCC	2003	DBLP DOI BibTeX RDF
16	Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff	Implementation of a Streaming Execution Unit.	DSD	2002	DBLP DOI BibTeX RDF
16	François Koeune, Gaël Rouvroy, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Pierre David, Jean-Didier Legat	An FPGA Implementation of the Linear Cryptanalysis.	FPL	2002	DBLP DOI BibTeX RDF
16	Ruby B. Lee, A. Murat Fiskiran, Zhijie Shi, Xiao Yang 0001	Refining Instruction Set Architecture for High-Performance Multimedia Processing in Constrained Environments.	ASAP	2002	DBLP DOI BibTeX RDF
16	Yen-Kuang Chen, Wen-Hsiao Peng	Implementation of Real-Time MPEG-4 FGS Encoder.	IEEE Pacific Rim Conference on Multimedia	2002	DBLP DOI BibTeX RDF
16	Ismaeil R. Ismaeil, Alen Docef, Faouzi Kossentini, Rabab K. Ward	A computation-distortion optimized framework for efficient DCT-based video coding.	IEEE Trans. Multim.	2001	DBLP DOI BibTeX RDF
16	Tatsuji Moriyoshi, Hiroshi Shinohara, Takashi Miyazaki, Ichiro Kuroda	Real-Time Software Video Codec with a Fast Adaptive Motion Vector Search.	J. VLSI Signal Process.	2001	DBLP DOI BibTeX RDF	motion estimation, MPEG-4, video codec
16	Ben H. H. Juurlink, Stamatis Vassiliadis, Dmitri Tcheressiz, Harry A. G. Wijshoff	Implementation and Evaluation of the Complex Streamed Instruction Set.	IEEE PACT	2001	DBLP DOI BibTeX RDF
16	Jesús Corbal, Roger Espasa, Mateo Valero	DLP + TLP Processors for the Next Generation of Media Workloads.	HPCA	2001	DBLP DOI BibTeX RDF
16	Sergio A. Cuenca, Francisco Ibarra, Rafael Álvarez	Reconfigurable Frame-Grabber for Real-Time Automated Visual Inspection (RT-AVI) Systems.	FPL	2001	DBLP DOI BibTeX RDF
16	Ruby B. Lee, A. Murat Fiskiran, Abdulla Bubsha	Multimedia Instructions In IA-64.	ICME	2001	DBLP DOI BibTeX RDF
16	Veselko Gustin, Patricio Bulic	Extracting SIMD Parallelism from 'for' Loops.	ICPP Workshops	2001	DBLP DOI BibTeX RDF
16	David M. Brooks, Margaret Martonosi	Value-based clock gating and operation packing: dynamic strategies for improving processor power and performance.	ACM Trans. Comput. Syst.	2000	DBLP DOI BibTeX RDF
16	James O. Henriksen	Adding animation to a simulation using ProofTM.	WSC	2000	DBLP DOI BibTeX RDF
16	Andrea Prati 0001	Exploring multimedia applications locality to improve cache performance.	ACM Multimedia	2000	DBLP DOI BibTeX RDF
16	Deependra Talla, Lizy Kurian John, Viktor S. Lapinskii, Brian L. Evans	Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures.	ICCD	2000	DBLP DOI BibTeX RDF
16	Dolores Barrios Rolanía, Daniel Manrique, Jaime Porras, Juan Rios	Real-Coded Genetic Algorithms Based on Mathematical Morphology.	SSPR/SPR	2000	DBLP DOI BibTeX RDF
16	David M. Brooks, Margaret Martonosi	Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance.	HPCA	1999	DBLP DOI BibTeX RDF
16	Donghui Wu, XiuQin Ye, WeiKang Gu	Tracking Vehicles in Image Sequence for Avoiding Obstacles.	ICIAP	1999	DBLP DOI BibTeX RDF
16	Shai Halevi, Hugo Krawczyk	MMH: Software Message Authentication in the Gbit/Second Rates.	FSE	1997	DBLP DOI BibTeX RDF