Search results for "MPU"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
92	Akihiro Tsutsui, Toshiaki Miyazaki	ANT-on-YARDS: FPGA/MPU hybrid architecture for telecommunication data processing.	IEEE Trans. Very Large Scale Integr. Syst.	1998	DBLP DOI BibTeX RDF
64	Kiyotaka Takahashi, Eigo Mori	Architectural Design of a DSP Scripting Language for Mobile Multimedia Terminals.	AINA (2)	2004	DBLP DOI BibTeX RDF
49	Yi-Ling Chen 0004, Shang-Hong Lai	Creating MPU implicit surfaces from unoriented point sets with orientation inference.	Vis. Comput.	2009	DBLP DOI BibTeX RDF	Orientation inference, Implicit surfaces, Sharp features
49	Christian Schumann, Steffen Oeltze, Ragnar Bade, Bernhard Preim	Visualisierung von Gefäßsystemen mit MPU Implicits.	Bildverarbeitung für die Medizin	2007	DBLP DOI BibTeX RDF
49	Yi-Ling Chen 0004, Shang-Hong Lai, Tung-Ying Lee	Generalized MPU Implicits Using Belief Propagation.	3DIM	2007	DBLP DOI BibTeX RDF
43	Bruno Rodrigues De Araújo, Joaquim Armando Pires Jorge	A Calligraphic Interface for Interactive Free-Form Modeling with Large Datasets.	SIBGRAPI	2005	DBLP DOI BibTeX RDF
34	Matthew S. Simpson, Bhuvan Middha, Rajeev Barua	Segment protection for embedded systems using run-time checks.	CASES	2005	DBLP DOI BibTeX RDF	MMU, MPU, ewmbedded systems, safe languages, segment protection, segmentation violations, reliability, compilers, virtual memory, memory safety, run-time checks
33	Hui Xie 0001, Kevin T. McDonnell, Hong Qin 0001	Surface Reconstruction of Noisy and Defective Data Sets.	IEEE Visualization	2004	DBLP DOI BibTeX RDF	MPU implicits, Modified Shepard’s Method, Computer Graphics, Surface Reconstruction, Surface Representation
27	Koichi Nose, Taro Fujii, Katsumi Togawa, Shunsuke Okumura, Kentaro Mikami, Daichi Hayashi, Teruhito Tanaka, Takao Toi	20.3 A 23.9TOPS/W @ 0.8V, 130TOPS AI Accelerator with 16× Performance-Accelerable Pruning in 14nm Heterogeneous Embedded MPU for Real-Time Robot Applications.	ISSCC	2024	DBLP DOI BibTeX RDF
27	Konstantinos A. Tsintotas, Loukas Bampis, Anastasios Taitzoglou, Ioannis Kansizoglou, Pavlos Kaparos, Chris Bliamis, Kyros Yakinthos, Antonios Gasteratos	The MPU RX-4 Project: Design, Electronics, and Software Development of a Geofence Protection System for a Fixed-Wing VTOL UAV.	IEEE Trans. Instrum. Meas.	2023	DBLP DOI BibTeX RDF
27	Xinfeng Xie, Peng Gu, Yufei Ding, Dimin Niu, Hongzhong Zheng, Yuan Xie 0008	MPU: Memory-centric SIMT Processor via In-DRAM Near-bank Computing.	ACM Trans. Archit. Code Optim.	2023	DBLP DOI BibTeX RDF
27	Nicolas Dejon, Chrystel Gaber, Gilles Grimaud	From MMU to MPU: adaptation of the Pip kernel to constrained devices.	CoRR	2023	DBLP DOI BibTeX RDF
27	Zeqiu Yu, Shuo Han, Ziheng Song	3D Medical Image Segmentation based on multi-scale MPU-Net.	CoRR	2023	DBLP DOI BibTeX RDF
27	Carsten Heinz, Andreas Koch 0001	$\mathrm {DD\text {-}MPU}$: Dynamic and Distributed Memory Protection Unit for Embedded System-on-Chips.	SAMOS	2023	DBLP DOI BibTeX RDF
27	Lili Zhang, Fanning Kong, Chaoyue Zhang, Zaifeng Shi	MPU-Net: Multi-decoder U-Net Based on Prior Information for Multi-material Decomposition in Spectral CT.	CISP-BMEI	2023	DBLP DOI BibTeX RDF
27	Xinfeng Xie, Peng Gu, Jiayi Huang 0001, Yufei Ding, Yuan Xie 0001	MPU-Sim: A Simulator for In-DRAM Near-Bank Processing Architectures.	IEEE Comput. Archit. Lett.	2022	DBLP DOI BibTeX RDF
27	Lan Luo, Xinhui Shao, Zhen Ling, Huaiyu Yan, Yumeng Wei, Xinwen Fu	fASLR: Function-Based ASLR via TrustZone-M and MPU for Resource-Constrained IoT Systems.	IEEE Internet Things J.	2022	DBLP DOI BibTeX RDF
27	Xinfeng Xie, Peng Gu, Yufei Ding, Dimin Niu, Hongzhong Zheng, Yuan Xie 0001	MPU: Towards Bandwidth-abundant SIMT Processor via Near-bank Computing.	CoRR	2021	DBLP BibTeX RDF
27	Gautier Berthou 0001, Kevin Marquet, Tanguy Risset, Guillaume Salagnac	MPU-based incremental checkpointing for transiently-powered systems.	DSD	2020	DBLP DOI BibTeX RDF
27	Abderrahmane Sensaoui, Oum-El-Kheir Aktouf, David Hély, Stephane Di Vito	An In-depth Study of MPU-Based Isolation Techniques.	J. Hardw. Syst. Secur.	2019	DBLP DOI BibTeX RDF
27	Wei Zhou 0026, Le Guan, Peng Liu 0005, Yuqing Zhang 0001	Good Motive but Bad Design: Why ARM MPU Has Become an Outcast in Embedded Systems.	CoRR	2019	DBLP BibTeX RDF
27	Thiruvengadam Vijayaraghavan, Amit Rajesh, Karthikeyan Sankaralingam	MPU-BWM: Accelerating Sequence Alignment.	IEEE Comput. Archit. Lett.	2018	DBLP DOI BibTeX RDF
27	Francesco Paci, Davide Brunelli, Luca Benini	Lightweight IO virtualization on MPU enabled microcontrollers.	SIGBED Rev.	2018	DBLP DOI BibTeX RDF
27	Yusuke Kitada, Jun Fujiwara, Nobumasa Hattori, Kensuke Kanda, Takayuki Fujita, Kazusuke Maenaka	Integration of MPU and ASICs for Low-Power Human Monitoring System.	SMC	2018	DBLP DOI BibTeX RDF
27	Jun Fujiwara, Nobumasa Hattori, Kensuke Kanda, Takayuki Fujita, Kazusuke Maenaka	Design and integration of MPU for human monitoring system.	SMC	2017	DBLP DOI BibTeX RDF
27	Francesco Paci, Davide Brunelli, Luca Benini	Lightweight IO Virtualization On MPU Enabled Microcontrollers.	EWiLi	2016	DBLP BibTeX RDF
27	Manuel Guillermo López, Boris Mederos, Oscar Dalmau Cedeño	GP-MPU Method for Implicit Surface Reconstruction.	MICAI (1)	2014	DBLP DOI BibTeX RDF
27	Wei-Ting Jonas Chan, Andrew B. Kahng, Siddhartha Nath, Ichiro Yamamoto	The ITRS MPU and SOC system drivers: Calibration and implications for design-based equivalent scaling in the roadmap.	ICCD	2014	DBLP DOI BibTeX RDF
27	Yuan Hu 0003, Wei Liu 0050	3D Face Recognition Based on MPU Implicits.	IEICE Trans. Inf. Syst.	2013	DBLP DOI BibTeX RDF
27	Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura	A Virus Scanning Engine Using an MPU and an IGU Based on Row-Shift Decomposition.	IEICE Trans. Inf. Syst.	2013	DBLP DOI BibTeX RDF
27	Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura	A Low-Cost and High-Performance Virus Scanning Engine Using a Binary CAM Emulator and an MPU.	ARC	2012	DBLP DOI BibTeX RDF
27	Tal Kaitz, Gaby Guri	CPU-MPU partitioning for C-RAN applications.	CHINACOM	2012	DBLP DOI BibTeX RDF
27	Yuusuke Tsukamoto, Shuhei Kawashima, Seiji Inoue, Shin Ito, Shinji Kataoka, Kazuyuki Kojima, Kyoko Hasegawa, Susumu Nakata, Satoshi Tanaka	Data fitting independent of grid structure using a volumic version of MPU.	J. Vis.	2011	DBLP DOI BibTeX RDF
27	Joël Porquet, Alain Greiner, Christian Schwarz	NoC-MPU: A secure architecture for flexible co-hosting on shared memory MPSoCs.	DATE	2011	DBLP DOI BibTeX RDF
27	Tung-Ying Lee, Shang-Hong Lai	3D non-rigid registration for MPU implicit surfaces.	CVPR Workshops	2008	DBLP DOI BibTeX RDF
27	Ilya Braude, Jeffrey Marker, Ken Museth, Jonathan Nissanov, David E. Breen	Contour-based surface reconstruction using MPU implicit models.	Graph. Model.	2007	DBLP DOI BibTeX RDF
27	Chia-Hao Yu, Chung-Kai Liu, Chih-Heng Kang, Tsun-Hsien Wang, Chih-Chien Shen, Shau-Yin Tseng	An Efficient DMA Controller for Multimedia Application in MPU Based SOC.	ICME	2007	DBLP DOI BibTeX RDF
27	Jie Chang	High-frequency and precision three-phase sine/PWM controller with near-zero frequency of MPU intervention-novel design supporting distributed AC drive systems.	IEEE Trans. Ind. Electron.	2005	DBLP DOI BibTeX RDF
27	Hiroo Masuda, Katsumi Tsuneno, Hisako Sato, Kazutaka Mori	TCAD/DA for MPU and ASIC Development.	ASP-DAC	1998	DBLP BibTeX RDF
27	Kazutaka Mori, Ken'ichi Kikushima, Fumio Ootsuka, Shin'ichiro Mitani	A new optimization strategy for CMOS device process in the era of 0.2 μm and beyond for MPU's and ASIC's.	CICC	1998	DBLP DOI BibTeX RDF
27	Akihiro Tsutsui, Toshiaki Miyazaki	YARDS: FPGA/MPU Hybrid Architecture for Telecommunication Data Processing.	FPGA	1997	DBLP DOI BibTeX RDF
27	Yasushi Ooi, Osamu Ohnishi, Yutaka Yokoyama, Yoichi Katayama, Masayuki Mizuno, Masakazu Yamashina, Hideo Takano, Naoya Hayashi, Ichiro Tamitani	An MPEG-2 encoder architecture based on a single-chip dedicated LSI with a control MPU.	ICASSP	1997	DBLP DOI BibTeX RDF
27	Robert H. Payne, José G. Delgado-Frias	MPU: A N-Tuple Matching Processor.	ICCD	1991	DBLP DOI BibTeX RDF
27	Robert N. Noyce	From Relays to MPU's.	Computer	1976	DBLP DOI BibTeX RDF
21	Yoonseo Choi, Hwansoo Han	Shared heap management for memory-limited java virtual machines.	ACM Trans. Embed. Comput. Syst.	2008	DBLP DOI BibTeX RDF	heap sharing, memory protection unit, garbage collection, Dynamic memory management
21	Shih-Hao Ou, Tay-Jyi Lin, Xiang Sheng Deng, Zhi Hong Zhuo, Chih-Wei Liu	Multithreaded coprocessor interface for multi-core multimedia SoC.	ASP-DAC	2008	DBLP DOI BibTeX RDF
21	Limin Liu, Ping Yan	A Bumpless Switching Scheme for Dynamic Reconfiguration.	CDVE	2007	DBLP DOI BibTeX RDF	bumpless switching, SoC, dynamic reconfiguration
21	Jacques-Olivier Klein, Lionel Lacassagne, Hervé Mathias, Sebastien Moutault, Antoine Dupret	Low Power Image Processing: Analog Versus Digital Comparison.	CAMP	2005	DBLP DOI BibTeX RDF
21	Bruno Rodrigues De Araújo, Joaquim A. Jorge	Curvature Dependent Polygonization of Implicit Surfaces.	SIBGRAPI	2004	DBLP DOI BibTeX RDF
21	Hiroyuki Sato, Mitsuo Ishii, Keiji Sato, Morio Ikesaka, Hiroaki Ishihata, Masanori Kakimoto, Katsuhiko Hirota, Kouichi Inoue	Fast image generation of construcitve solid geometry using a cellular array processor.	SIGGRAPH	1985	DBLP DOI BibTeX RDF	scan-line algorithms, computer graphics, computer aided design, solid modeling, constructive solid geometry, z-buffer, hidden surface removal
21	Gary Sawyer	Tools and techniques of microprocessor data transfer.	AFIPS National Computer Conference	1975	DBLP DOI BibTeX RDF