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Searching for phrase MUSTC-testing (changed automatically) with no syntactic query expansion in all metadata.

Publication years (Num. hits)
1995 (1)
Publication types (Num. hits)
inproceedings(1)
Venues (Conferences, Journals, ...)
VLSI Design(1)
Authors
Irith Pomeranz(1) Sitaran Yadavalli(1) Sudhakar M. Reddy(1)
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Found 1 publication records. Showing 1 according to the selection in the facets
Hits ?▲ Authors Title Venue Year Link Author keywords
133Sitaran Yadavalli, Irith Pomeranz, Sudhakar M. Reddy MUSTC-Testing: Multi-Stage-Combinational Test scheduling at the Register-Transfer Level. Search on Bibsonomy VLSI Design The full citation details ... 1995 DBLP  DOI  BibTeX  RDF MUSTC-testing, multi-stage-combinational test, control paths, signal types, module level pre-computed test sets, scheduling, logic testing, integrated circuit testing, combinational circuits, automatic testing, automatic test, register-transfer level, test scheduling, data-paths
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