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Found 11 publication records. Showing 11 according to the selection in the facets
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Authors |
Title |
Venue |
Year |
Link |
Author keywords |
20 | Vikram Pasham, Wilfrido Alejandro Moreno, Fernando J. Falquez |
Field Programmable Multi Chip Modules Using Programmable Laser Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the Tenth IEEE International Workshop on Rapid System Prototyping (RSP 1999), Clearwater, Florida, USA, June 16-18, 1999, pp. 210-, 1999, IEEE Computer Society, 0-7695-0246-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Multi-FPGAs, Laser Vertical Links, LPIC, MCM, Programmable interconnects |
12 | Fan Zhang 0024, Long Zheng 0003, Xiaofei Liao, Xinqiao Lv, Hai Jin 0001, Jiang Xiao |
An Effective 2-Dimension Graph Partitioning for Work Stealing Assisted Graph Processing on Multi-FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Big Data ![In: IEEE Trans. Big Data 8(5), pp. 1247-1258, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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12 | Guilherme Korol, Michael Guilherme Jordan, Mateus Beck Rutzig, Antonio Carlos Schneider Beck |
Synergistically Exploiting CNN Pruning and HLS Versioning for Adaptive Inference on Multi-FPGAs at the Edge. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 20(5s), pp. 59:1-59:26, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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12 | Ramon Nepomuceno, Renan Sterle, Guilherme Valarini, Márcio Machado Pereira, Hervé Yviquel, Guido Araujo |
Enabling OpenMP Task Parallelism on Multi-FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2103.10573, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
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12 | Ramon Nepomuceno, Renan Sterle, Guilherme Valarini, Márcio Machado Pereira, Hervé Yviquel, Guido Araujo |
Enabling OpenMP Task Parallelism on Multi-FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2021, Orlando, FL, USA, May 9-12, 2021, pp. 260, 2021, IEEE, 978-1-6654-3555-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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12 | Giorgia Fiscaletti, Marco Speziali, Luca Stornaiuolo, Marco D. Santambrogio, Donatella Sciuto |
Hardware resources analysis of BNNs splitting for FARD-based multi-FPGAs Distributed Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS Workshops ![In: 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2020, New Orleans, LA, USA, May 18-22, 2020, pp. 135-138, 2020, IEEE, 978-1-7281-7445-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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12 | Teng Wang, Lei Gong, Chao Wang 0003, Xuehai Zhou, Huaping Chen 0001 |
Design Exploration of Multi-FPGAs for Accelerating Deep Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: 2019 IEEE International Conference on Cluster Computing, CLUSTER 2019, Albuquerque, NM, USA, September 23-26, 2019, pp. 1-2, 2019, IEEE, 978-1-7281-4734-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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12 | Huanghui Shen, Zhensong Wang, Weimin Zheng |
Corner turn of SAR data based on multi-FPGAs parallel system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Electr. Eng. ![In: Comput. Electr. Eng. 38(5), pp. 1205-1212, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
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12 | Yan Xiao, Zhenhua Duan |
Dynamic Critical-Path based on Fit Degree scheduling for reconfigurable multi-FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSD ![In: 8th International Conference on Application of Concurrency to System Design (ACSD 2008), Xi'an, China, June 23-27, 2008, pp. 27-32, 2008, IEEE, 978-1-4244-1838-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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7 | Marvi Teixeira, Y. I. Rodroguez |
Parallel Cyclic Convolution Based on Recursive Formulations of Block Pseudocirculant Matrices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 56(7-1), pp. 2755-2770, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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7 | Vincenzo Rana, Chiara Sandionigi, Marco D. Santambrogio, Donatella Sciuto |
An adaptive genetic algorithm for dynamically reconfigurable modules allocation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: IFIP VLSI-SoC 2007, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Atlanta, GA, USA, 15-17 October 2007, pp. 128-133, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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