Search results for "NOCS"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
61	José Flich, Samuel Rodrigo, José Duato	An Efficient Implementation of Distributed Routing Algorithms for NoCs.	NOCS	2008	DBLP DOI BibTeX RDF	routing implementation, router architecture
58	Andrew B. Kahng, Bill Lin 0001, Kambiz Samadi, Rohit Sunkam Ramanujam	Trace-driven optimization of networks-on-chip configurations.	DAC	2010	DBLP DOI BibTeX RDF	networks-on-chip, virtual channel, greedy heuristics
58	Avinoam Kolodny	Networks on chips: keeping up with Rent's rule and Moore's law.	SLIP	2007	DBLP DOI BibTeX RDF	routing, timing, interconnect, power, on-chip network, wires
58	Aline Mello 0001, Leonel Tedesco, Ney Calazans, Fernando Moraes 0001	Virtual channels in networks on chip: implementation and evaluation on hermes NoC.	SBCCI	2005	DBLP DOI BibTeX RDF	performance, network-on-chip, virtual channel
57	Michihiro Koibuchi, Hiroki Matsutani, Hideharu Amano, Timothy Mark Pinkston	A Lightweight Fault-Tolerant Mechanism for Network-on-Chip.	NOCS	2008	DBLP DOI BibTeX RDF	fault tolerance, reliability, Network-on-Chip, routing algorithm, deadlock avoidance, on-chip network
57	Giovanni De Micheli	Design Technologies for Networks on Chips.	NOCS	2007	DBLP DOI BibTeX RDF
57	Antonio Pullini, Federico Angiolini, Paolo Meloni, David Atienza, Srinivasan Murali, Luigi Raffo, Giovanni De Micheli, Luca Benini	NoC Design and Implementation in 65nm Technology.	NOCS	2007	DBLP DOI BibTeX RDF
53	Jason Lee, Lesley Shannon	Predicting the performance of application-specific NoCs implemented on FPGAs.	FPGA	2010	DBLP DOI BibTeX RDF	performance, FPGAs, topologies, heterogeneous, NoCs, homogeneous, application-specific, routability
53	Akbar Sharifi, Hamid Sarbazi-Azad	Power Consumption and Performance Analysis of 3D NoCs.	Asia-Pacific Computer Systems Architecture Conference	2007	DBLP DOI BibTeX RDF	3D VLSI, 3D NoCs, Performance evaluation, Power consumption
51	Rafael Tornero, Juan Manuel Orduña, Andres Mejia, José Flich, José Duato	CART: Communication-Aware Routing Technique for Application-Specific NoCs.	DSD	2008	DBLP DOI BibTeX RDF
51	Rafael Tornero, Juan M. Orduña, Maurizio Palesi, José Duato	A Communication-Aware Topological Mapping Technique for NoCs.	Euro-Par	2008	DBLP DOI BibTeX RDF
51	Crispín Gómez Requena, María Engracia Gómez, Pedro Juan López Rodríguez, José Duato	An Efficient Switching Technique for NoCs with Reduced Buffer Requirements.	ICPADS	2008	DBLP DOI BibTeX RDF
51	Praveen Bhojwani, Jason D. Lee, Rabi N. Mahapatra	SAPP: scalable and adaptable peak power management in nocs.	ISLPED	2007	DBLP DOI BibTeX RDF	network-on-chip, NoC, peak power
51	Anthony Leroy, Paul Marchal, Adelina Shickova, Francky Catthoor, Frédéric Robert, Diederik Verkest	Spatial division multiplexing: a novel approach for guaranteed throughput on NoCs.	CODES+ISSS	2005	DBLP DOI BibTeX RDF	spatial division multiplexing, network-on-chip
51	César A. M. Marcon, Márcio Eduardo Kreutz, Altamiro Amadeu Susin, Ney Laert Vilar Calazans	Models for Embedded Application Mapping onto NoCs: Timing Analysis.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
49	Srikant Bharadwaj, Shomit Das, Yasuko Eckert, Mark Oskin, Tushar Krishna	DUB: dynamic underclocking and bypassing in nocs for heterogeneous GPU workloads.	NOCS	2021	DBLP DOI BibTeX RDF
49	Dai Cheol Jung, Scott Davidson 0004, Chun Zhao, Dustin Richmond, Michael Bedford Taylor	Ruche Networks: Wire-Maximal, No-Fuss NoCs : Special Session Paper.	NOCS	2020	DBLP DOI BibTeX RDF
49	Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Ishan G. Thakkar	PROTEUS: Rule-Based Self-Adaptation in Photonic NoCs for Loss-Aware Co-Management of Laser Power and Performance.	NOCS	2020	DBLP DOI BibTeX RDF
49	Chen Chen, Zirui Tao, Joshua San Miguel	Bufferless NoCs with Scheduled Deflection Routing.	NOCS	2020	DBLP DOI BibTeX RDF
49	Hyojun Son, Hanjoon Kim, Hao Wang 0011, Nam Sung Kim, John Kim	Ghost routers: energy-efficient asymmetric multicore processors with symmetric NoCs.	NOCS	2019	DBLP DOI BibTeX RDF
49	Michael Vonbun, Adrian Schiechel, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf	APEC: improved acknowledgement prioritization through erasure coding in bufferless NoCs.	NOCS	2019	DBLP DOI BibTeX RDF
49	Max Koenen, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf	Channel mapping strategies for effective protection switching in fail-operational hard real-time NoCs.	NOCS	2019	DBLP DOI BibTeX RDF
49	Vasil Pano, Ragh Kuttappa, Baris Taskin	3D NoCs with active interposer for multi-die systems.	NOCS	2019	DBLP DOI BibTeX RDF
49	Giovanni De Micheli	Keynote Talk: NoCs: A Short History of Success and a Long Future.	NOCS	2018	DBLP DOI BibTeX RDF
49	Travis H. Boraten, Avinash Karanth Kodi	Securing NoCs Against Timing Attacks with Non-Interference Based Adaptive Routing.	NOCS	2018	DBLP DOI BibTeX RDF
49	Sebastian Werner 0002, Pouya Fotouhi, Roberto Proietti, Xian Xiao, S. J. Ben Yoo	Towards Energy-Efficient High-Throughput Photonic NoCs for 2.5D Integrated Systems: A Case for AWGRs.	NOCS	2018	DBLP DOI BibTeX RDF
49	Ihsan El Masri, Pierre-Marie Martin, Hemanta Kumar Mondal, Rozenn Allanic, Thierry Le Gouguec, Cédric Quendo, Christian Roland, Jean-Philippe Diguet	Accurate Channel Models for Realistic Design Space Exploration of Future Wireless NoCs.	NOCS	2018	DBLP DOI BibTeX RDF
49	Hiroshi Nakahara, Ng. Anh Vu Doan, Ryota Yasudo, Hideharu Amano	XYZ-Randomization using TSVs for Low-Latency Energy Efficient 3D-NoCs.	NOCS	2017	DBLP DOI BibTeX RDF
49	Kshitij Bhardwaj, Weiwei Jiang 0002, Steven M. Nowick	Achieving Lightweight Multicast in Asynchronous NoCs Using a Continuous-Time Multi-Way Read Buffer.	NOCS	2017	DBLP DOI BibTeX RDF
49	Hyoukjun Kwon, Ananda Samajdar, Tushar Krishna	Rethinking NoCs for Spatial Neural Network Accelerators.	NOCS	2017	DBLP DOI BibTeX RDF
49	Ahmed Hemani, Syed Mohammad Asad Hassan Jafri, Shayesteh Masoumian	Synchoricity and NOCs could make Billion Gate Custom Hardware Centric SOCs Affordable.	NOCS	2017	DBLP DOI BibTeX RDF
49	Ishan G. Thakkar, Sai Vineel Reddy Chittamuru, Sudeep Pasricha	Run-time laser power management in photonic NoCs with on-chip semiconductor optical amplifiers.	NOCS	2016	DBLP DOI BibTeX RDF
49	Elena Kakoulli, Vassos Soteriou, Charalambos Koutsides, Kyriacos Kalli	Designing High-Performance, Power-Efficient NoCs With Embedded Silicon-in-Silica Nanophotonics.	NOCS	2015	DBLP DOI BibTeX RDF
49	Robert Hesse, Natalie D. Enright Jerger	Improving DVFS in NoCs with Coherence Prediction.	NOCS	2015	DBLP DOI BibTeX RDF
49	Wen Zong, Michael Opoku Agyeman, Xiaohang Wang 0001, Terrence S. T. Mak	Unbiased Regional Congestion Aware Selection Function for NoCs.	NOCS	2015	DBLP DOI BibTeX RDF
49	Hans-Joachim Wunderlich, Martin Radetzki	Multi-Layer Test and Diagnosis for Dependable NoCs.	NOCS	2015	DBLP DOI BibTeX RDF
49	Shaoteng Liu, Zhonghai Lu, Axel Jantsch	Highway in TDM NoCs.	NOCS	2015	DBLP DOI BibTeX RDF
49	Manoj Kumar 0001, Vijay Laxmi, Manoj Singh Gaur, Masoud Daneshtalab, Pankaj Kumar Srivastava, Seok-Bum Ko, Mark Zwolinski	A novel non-minimal/minimal turn model for highly adaptive routing in 2D NoCs.	NOCS	2014	DBLP DOI BibTeX RDF
49	Prasanna Venkatesh Rengasamy, Madhu Mutyam	Using packet information for efficient communication in NoCs.	NOCS	2014	DBLP DOI BibTeX RDF
49	I. Kotleas, D. Humphreys, Rasmus Bo Sørensen, Evangelia Kasapaki, Florian Brandner, Jens Sparsø	A loosely synchronizing asynchronous router for TDM-scheduled NOCs.	NOCS	2014	DBLP DOI BibTeX RDF
49	Gaoming Du, Miao Li, Zhonghai Lu, Minglun Gao, Chunhua Wang	An analytical model for worst-case reorder buffer size of multi-path minimal routing NoCs.	NOCS	2014	DBLP DOI BibTeX RDF
49	Chao Chen 0003, Tiansheng Zhang, Pietro Contu, Jonathan Klamkin, Ayse K. Coskun, Ajay Joshi	Sharing and placement of on-chip laser sources in silicon-photonic NoCs.	NOCS	2014	DBLP DOI BibTeX RDF
49	Jinho Lee, Kiyoung Choi	A deadlock-free routing algorithm requiring no virtual channel on 3D-NoCs with partial vertical connections.	NOCS	2013	DBLP DOI BibTeX RDF
49	Li Zhou, Avinash Karanth Kodi	PROBE: Prediction-based optical bandwidth scaling for energy-efficient NoCs.	NOCS	2013	DBLP DOI BibTeX RDF
49	Amit Verma, Pritpal S. Multani, Daniel Mueller-Gritschneder, Vladimir Todorov, Ulf Schlichtmann	A greedy approach for latency-bounded deadlock-free routing path allocation for application-specific NoCs.	NOCS	2013	DBLP DOI BibTeX RDF
49	Syed Minhaj Hassan, Sudhakar Yalamanchili	Centralized buffer router: A low latency, low power router for high radix NOCs.	NOCS	2013	DBLP DOI BibTeX RDF
49	Bo Zhao 0007, Youtao Zhang, Jun Yang 0002	A speculative arbiter design to enable high-frequency many-VC router in NoCs.	NOCS	2013	DBLP DOI BibTeX RDF
49	Dominic DiTomaso, Avinash Karanth Kodi, David W. Matolak, Savas Kaya, Soumyasanta Laha, William Rayess	Energy-efficient adaptive wireless NoCs architecture.	NOCS	2013	DBLP DOI BibTeX RDF
49	Ran Manevich, Israel Cidon, Avinoam Kolodny	Dynamic traffic distribution among hierarchy levels in hierarchical Networks-on-Chip (NoCs).	NOCS	2013	DBLP DOI BibTeX RDF
49	Ahmed Abousamra, Rami G. Melhem, Alex K. Jones	Déjà Vu Switching for Multiplane NoCs.	NOCS	2012	DBLP DOI BibTeX RDF
49	Yaniv Ben-Itzhak, Eitan Zahavi, Israel Cidon, Avinoam Kolodny	NoCs simulation framework for OMNeT++.	NOCS	2011	DBLP DOI BibTeX RDF
49	Daniel Gebhardt, JunBok You, Kenneth S. Stevens	Comparing Energy and Latency of Asynchronous and Synchronous NoCs for Embedded SoCs.	NOCS	2010	DBLP DOI BibTeX RDF	network, CAD, SoC, topology, asynchronous, floorplan, router, EDA, NoC, GALS
49	Chia-Hsin Owen Chen, Niket Agarwal, Tushar Krishna, Kyung-Hoae Koo, Li-Shiuan Peh, Krishna Saraswat	Physical vs. Virtual Express Topologies with Low-Swing Links for Future Many-Core NoCs.	NOCS	2010	DBLP DOI BibTeX RDF
49	Carles Hernández 0001, Antoni Roca 0001, Federico Silla, José Flich, José Duato	Improving the Performance of GALS-Based NoCs in the Presence of Process Variation.	NOCS	2010	DBLP DOI BibTeX RDF
49	Tushar N. K. Jain, Paul V. Gratz, Alexander Sprintson, Gwan Choi	Asynchronous Bypass Channels: Improving Performance for Multi-synchronous NoCs.	NOCS	2010	DBLP DOI BibTeX RDF	asynchronous interconnect, NoC, GALS, on-chip networks
49	Ruizhe Wu, Yi Wang 0007, Dan Zhao 0001	A Low-Cost Deadlock-Free Design of Minimal-Table Rerouted XY-Routing for Irregular Wireless NoCs.	NOCS	2010	DBLP DOI BibTeX RDF	Wireless Network-on-Chip, Segmented XY-Routing, Turn Classes-based Deadlock Avoidance
49	Ivo Bolsens	NoCs: It is about the memory and the programming model.	NOCS	2009	DBLP DOI BibTeX RDF
49	Marcos Hervé, Érika F. Cota, Fernanda Lima Kastensmidt, Marcelo Lubaszewski	Diagnosis of interconnect shorts in mesh NoCs.	NOCS	2009	DBLP DOI BibTeX RDF
49	Evgeni Krimer, Mattan Erez, Isaac Keslassy, Avinoam Kolodny, Isask'har Walter	Packet-level static timing analysis for NoCs.	NOCS	2009	DBLP DOI BibTeX RDF
49	Tarik Ono-Tesfaye, Mark R. Greenstreet	A modular synchronizing FIFO for NoCs.	NOCS	2009	DBLP DOI BibTeX RDF
49	Isask'har Walter, Israel Cidon, Ran Ginosar, Avinoam Kolodny	Access Regulation to Hot-Modules in Wormhole NoCs.	NOCS	2007	DBLP DOI BibTeX RDF	SoC, resource management, Network on-Chip, hotspot, wormhole
47	Asit K. Mishra, Reetuparna Das, Soumya Eachempati, Ravishankar R. Iyer 0001, Narayanan Vijaykrishnan, Chita R. Das	A case for dynamic frequency tuning in on-chip networks.	MICRO	2009	DBLP DOI BibTeX RDF
47	Srinivasan Murali, Ciprian Seiculescu, Luca Benini, Giovanni De Micheli	Synthesis of networks on chips for 3D systems on chips.	ASP-DAC	2009	DBLP DOI BibTeX RDF	topology synthesis, networks on chip, 3D, application-specific
47	Tomas Henriksson, Pieter van der Wolf	TTL Hardware Interface: A High-Level Interface for Streaming Multiprocessor Architectures.	ESTIMedia	2006	DBLP DOI BibTeX RDF
47	Stergios Stergiou, Federico Angiolini, Salvatore Carta, Luigi Raffo, Davide Bertozzi, Giovanni De Micheli	xpipes Lite: A Synthesis Oriented Design Library For Networks on Chips.	DATE	2005	DBLP DOI BibTeX RDF
45	Xuan-Tu Tran, Yvain Thonnart, Jean Durupt, Vincent Beroulle, Chantal Robach	A Design-for-Test Implementation of an Asynchronous Network-on-Chip Architecture and its Associated Test Pattern Generation and Application.	NOCS	2008	DBLP DOI BibTeX RDF	NoC testing, QDI asynchronous logic, Network-on-Chip, DfT, testability, NoC, Design-for-Test, GALS, SoC testing, testing methodology, on-chip communication, Globally Asynchronous - Locally Synchronous
45	Francisco Gilabert Villamón, Simone Medardoni, Davide Bertozzi, Luca Benini, María Engracia Gómez, Pedro López 0001, José Duato	Exploring High-Dimensional Topologies for NoC Design Through an Integrated Analysis and Synthesis Framework.	NOCS	2008	DBLP DOI BibTeX RDF	Interconnection networks, networks on chip, topologies, chip design
45	George Michelogiannakis, Dionisios N. Pnevmatikatos, Manolis Katevenis	Approaching Ideal NoC Latency with Pre-Configured Routes.	NOCS	2007	DBLP DOI BibTeX RDF
45	Sheng Xu, Ibis Benito, Wayne P. Burleson	Thermal Impacts on NoC Interconnects.	NOCS	2007	DBLP DOI BibTeX RDF
45	Cristian Grecu, André Ivanov, Partha Pratim Pande, Axel Jantsch, Erno Salminen, Ümit Y. Ogras, Radu Marculescu	Towards Open Network-on-Chip Benchmarks.	NOCS	2007	DBLP DOI BibTeX RDF	performance evaluation, metrics, benchmarks, networks-on-chip
45	José Flich, Andres Mejia, Pedro López 0001, José Duato	Region-Based Routing: An Efficient Routing Mechanism to Tackle Unreliable Hardware in Network on Chips.	NOCS	2007	DBLP DOI BibTeX RDF
41	Anelise Kologeski, Caroline Concatto, Luigi Carro, Fernanda Lima Kastensmidt	Improving Reliability in NoCs by Application-Specific Mapping Combined with Adaptive Fault-Tolerant Method in the Links.	ETS	2011	DBLP DOI BibTeX RDF	Data Splitting, Fault Tolerance, Mapping, Adaptive Routing, Links, NoCs
41	Akbar Sharifi, Reza Sabbaghi-Nadooshan, Hamid Sarbazi-Azad	The Shuffle-Exchange Mesh Topology for 3D NoCs.	ISPAN	2008	DBLP DOI BibTeX RDF	3D VLSI, 3D NoCs, Performance evaluation, SoC, Power consumption, Shuffle-Exchange
39	Igor Loi, Federico Angiolini, Luca Benini	Developing Mesochronous Synchronizers to Enable 3D NoCs.	DATE	2008	DBLP DOI BibTeX RDF
39	Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny	Routing table minimization for irregular mesh NoCs.	DATE	2007	DBLP DOI BibTeX RDF
39	Leonel Tedesco, Aline Mello 0001, Leonardo Giacomet, Ney Calazans, Fernando Gehm Moraes	Application driven traffic modeling for NoCs.	SBCCI	2006	DBLP DOI BibTeX RDF	QoS, applications, networks on chip, traffic modeling
39	Jirí Jaros, Milos Ohlídal, Václav Dvorák	Complexity of Collective Communications on NoCs.	PARELEC	2006	DBLP DOI BibTeX RDF
39	Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen	Evaluation and design trade-offs between circuit-switched and packet-switched NOCs for application-specific SOCs.	DAC	2006	DBLP DOI BibTeX RDF	application-specific designs, low-power, NOC, SOC
39	José Carlos S. Palma, César A. M. Marcon, Fernando Gehm Moraes, Ney Laert Vilar Calazans, Ricardo A. L. Reis, Altamiro Amadeu Susin	Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation.	SBCCI	2005	DBLP DOI BibTeX RDF	traffic effect, networks-on-chip, energy estimation, application mapping
39	Leonel Tedesco, Aline Mello 0001, Diego Garibotti, Ney Calazans, Fernando Moraes 0001	Traffic generation and performance evaluation for mesh-based NoCs.	SBCCI	2005	DBLP DOI BibTeX RDF	performance evaluation, networks on chip, traffic modeling
39	Srinivasan Murali, Giovanni De Micheli	SUNMAP: a tool for automatic topology selection and generation for NoCs.	DAC	2004	DBLP DOI BibTeX RDF	systems on chip, mapping, networks on chip, topology, SystemC
35	Anthony Leroy, Dragomir Milojevic, Diederik Verkest, Frédéric Robert, Francky Catthoor	Concepts and Implementation of Spatial Division Multiplexing for Guaranteed Throughput in Networks-on-Chip.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF
35	Huaxi Gu, Jiang Xu 0001, Zheng Wang	ODOR: a microresonator-based high-performance low-cost router for optical networks-on-Chip.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	microresonator, low power, network on chip, optical interconnect, router architecture, loss
35	Mingsong Lv, Ying Guo, Nan Guan, Qingxu Deng	RTNoC: A Simulation Tool for Real-Time Communication Scheduling on Networks-on-Chips.	CSSE (4)	2008	DBLP DOI BibTeX RDF
35	Everton Carara, Aline Mello 0001, Fernando Moraes 0001	Communication Models in Networks-on-Chip.	IEEE International Workshop on Rapid System Prototyping	2007	DBLP DOI BibTeX RDF
35	Vassos Soteriou, Hangsheng Wang, Li-Shiuan Peh	A Statistical Traffic Model for On-Chip Interconnection Networks.	MASCOTS	2006	DBLP DOI BibTeX RDF
35	Chris Bartels, Jos Huisken, Kees Goossens, Patrick Groeneveld, Jef L. van Meerbergen	Comparison of An Æthereal Network on Chip and A Traditional Interconnect for A Multi-Processor DVB-T System on Chip.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
35	Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo	Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
35	Luca Benini	Application specific NoC design.	DATE	2006	DBLP DOI BibTeX RDF	application-specific integrated systems, systems on chip, networks on chip, design methodologies
35	Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo	Designing application-specific networks on chips with floorplan information.	ICCAD	2006	DBLP DOI BibTeX RDF	networks on chips, topology, floorplan, deadlock-free routing
35	Srinivasan Murali, Luca Benini, Giovanni De Micheli	Mapping and physical planning of networks-on-chip architectures with quality-of-service guarantees.	ASP-DAC	2005	DBLP DOI BibTeX RDF	physical planning, QoS, optimization, systems on chips, mapping, networks on chips
35	César Albenes Zeferino, Márcio Eduardo Kreutz, Altamiro Amadeu Susin	RASoC: A Router Soft-Core for Networks-on-Chip.	DATE	2004	DBLP DOI BibTeX RDF	FPGA, Systems-on-Chip, On-Chip Networks
35	Catherine H. Gebotys, Robert J. Gebotys	A Framework for Security on NoC Technologies.	ISVLSI	2003	DBLP DOI BibTeX RDF
35	César Albenes Zeferino, Altamiro Amadeu Susin	SoCIN: A Parametric and Scalable Network-on-Chip.	SBCCI	2003	DBLP DOI BibTeX RDF	FPGA, Embedded Systems, Systems-on-Chip
35	Tajana Simunic, Stephen P. Boyd	Managing Power Consumption in Networks on Chip.	DATE	2002	DBLP DOI BibTeX RDF
33	Tushar Krishna, John Kim, Sergi Abadal, Joshua San Miguel (eds.)	NOCS '21: International Symposium on Networks-on-Chip, Virtual Event, October 14-15, 2021	NOCS	2021	DBLP DOI BibTeX RDF
33	Hana Krichene, Jean-Marc Philippe	Analysis of on-chip communication properties in accelerator architectures for deep neural networks.	NOCS	2021	DBLP DOI BibTeX RDF
33	Ahmed Shalaby 0001, Yaswanth Tavva, Trevor E. Carlson, Li-Shiuan Peh	Sentry-NoC: a statically-scheduled NoC for secure SoCs.	NOCS	2021	DBLP DOI BibTeX RDF
33	Francisco Muñoz-Martínez, José L. Abellán, Manuel E. Acacio, Tushar Krishna	A novel network fabric for efficient spatio-temporal reduction in flexible DNN accelerators.	NOCS	2021	DBLP DOI BibTeX RDF
33	Alireza Monemi, Iván Pérez 0004, Neiel Leyva, Enrique Vallejo 0001, Ramón Beivide, Miquel Moretó	PIugSMART: a pluggable open-source module to implement multihop bypass in networks-on-chip.	NOCS	2021	DBLP DOI BibTeX RDF