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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 553 occurrences of 240 keywords
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Results
Found 1244 publication records. Showing 1244 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
61 | José Flich, Samuel Rodrigo, José Duato |
An Efficient Implementation of Distributed Routing Algorithms for NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Second International Symposium on Networks-on-Chips, NOCS 2008, 5-6 April 2008, Newcastle University, UK. Proceedings, pp. 87-96, 2008, IEEE Computer Society, 978-0-7695-3098-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
routing implementation, router architecture |
58 | Andrew B. Kahng, Bill Lin 0001, Kambiz Samadi, Rohit Sunkam Ramanujam |
Trace-driven optimization of networks-on-chip configurations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 437-442, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
networks-on-chip, virtual channel, greedy heuristics |
58 | Avinoam Kolodny |
Networks on chips: keeping up with Rent's rule and Moore's law. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Ninth International Workshop on System-Level Interconnect Prediction (SLIP 2007), Austin, Texas, USA, March 17-18, 2007, Proceedings, pp. 55-56, 2007, ACM, 978-1-59593-622-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
routing, timing, interconnect, power, on-chip network, wires |
58 | Aline Mello 0001, Leonel Tedesco, Ney Calazans, Fernando Moraes 0001 |
Virtual channels in networks on chip: implementation and evaluation on hermes NoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2005, Florianolpolis, Brazil, September 4-7, 2005, pp. 178-183, 2005, ACM. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
performance, network-on-chip, virtual channel |
57 | Michihiro Koibuchi, Hiroki Matsutani, Hideharu Amano, Timothy Mark Pinkston |
A Lightweight Fault-Tolerant Mechanism for Network-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Second International Symposium on Networks-on-Chips, NOCS 2008, 5-6 April 2008, Newcastle University, UK. Proceedings, pp. 13-22, 2008, IEEE Computer Society, 978-0-7695-3098-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
fault tolerance, reliability, Network-on-Chip, routing algorithm, deadlock avoidance, on-chip network |
57 | Giovanni De Micheli |
Design Technologies for Networks on Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: First International Symposium on Networks-on-Chips, NOCS 2007, 7-9 May 2007, Princeton, New Jersey, USA, Proceedings, pp. 149, 2007, IEEE Computer Society, 978-0-7695-2773-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
57 | Antonio Pullini, Federico Angiolini, Paolo Meloni, David Atienza, Srinivasan Murali, Luigi Raffo, Giovanni De Micheli, Luca Benini |
NoC Design and Implementation in 65nm Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: First International Symposium on Networks-on-Chips, NOCS 2007, 7-9 May 2007, Princeton, New Jersey, USA, Proceedings, pp. 273-282, 2007, IEEE Computer Society, 978-0-7695-2773-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
53 | Jason Lee, Lesley Shannon |
Predicting the performance of application-specific NoCs implemented on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010, pp. 23-32, 2010, ACM, 978-1-60558-911-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
performance, FPGAs, topologies, heterogeneous, NoCs, homogeneous, application-specific, routability |
53 | Akbar Sharifi, Hamid Sarbazi-Azad |
Power Consumption and Performance Analysis of 3D NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings, pp. 209-219, 2007, Springer, 978-3-540-74308-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
3D VLSI, 3D NoCs, Performance evaluation, Power consumption |
51 | Rafael Tornero, Juan Manuel Orduña, Andres Mejia, José Flich, José Duato |
CART: Communication-Aware Routing Technique for Application-Specific NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2008, Parma, Italy, September 3-5, 2008, pp. 26-31, 2008, IEEE Computer Society, 978-0-7695-3277-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
51 | Rafael Tornero, Juan M. Orduña, Maurizio Palesi, José Duato |
A Communication-Aware Topological Mapping Technique for NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2008 - Parallel Processing, 14th International Euro-Par Conference, Las Palmas de Gran Canaria, Spain, August 26-29, 2008, Proceedings, pp. 910-919, 2008, Springer, 978-3-540-85450-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
51 | Crispín Gómez Requena, María Engracia Gómez, Pedro Juan López Rodríguez, José Duato |
An Efficient Switching Technique for NoCs with Reduced Buffer Requirements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 14th International Conference on Parallel and Distributed Systems, ICPADS 2008, Melbourne, Victoria, Australia, December 8-10, 2008, pp. 713-720, 2008, IEEE Computer Society, 978-0-7695-3434-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
51 | Praveen Bhojwani, Jason D. Lee, Rabi N. Mahapatra |
SAPP: scalable and adaptable peak power management in nocs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007, Portland, OR, USA, August 27-29, 2007, pp. 340-345, 2007, ACM, 978-1-59593-709-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
network-on-chip, NoC, peak power |
51 | Anthony Leroy, Paul Marchal, Adelina Shickova, Francky Catthoor, Frédéric Robert, Diederik Verkest |
Spatial division multiplexing: a novel approach for guaranteed throughput on NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2005, Jersey City, NJ, USA, September 19-21, 2005, pp. 81-86, 2005, ACM, 1-59593-161-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
spatial division multiplexing, network-on-chip |
51 | César A. M. Marcon, Márcio Eduardo Kreutz, Altamiro Amadeu Susin, Ney Laert Vilar Calazans |
Models for Embedded Application Mapping onto NoCs: Timing Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 8-10 June 2005, Montreal, Canada, pp. 17-23, 2005, IEEE Computer Society, 0-7695-2361-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
49 | Srikant Bharadwaj, Shomit Das, Yasuko Eckert, Mark Oskin, Tushar Krishna |
DUB: dynamic underclocking and bypassing in nocs for heterogeneous GPU workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: NOCS '21: International Symposium on Networks-on-Chip, Virtual Event, October 14-15, 2021, pp. 49-54, 2021, ACM, 978-1-4503-9083-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
49 | Dai Cheol Jung, Scott Davidson 0004, Chun Zhao, Dustin Richmond, Michael Bedford Taylor |
Ruche Networks: Wire-Maximal, No-Fuss NoCs : Special Session Paper. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: 14th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2020, Hamburg, Germany, September 24-25, 2020, pp. 1-8, 2020, IEEE, 978-1-7281-8847-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
49 | Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Ishan G. Thakkar |
PROTEUS: Rule-Based Self-Adaptation in Photonic NoCs for Loss-Aware Co-Management of Laser Power and Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: 14th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2020, Hamburg, Germany, September 24-25, 2020, pp. 1-8, 2020, IEEE, 978-1-7281-8847-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
49 | Chen Chen, Zirui Tao, Joshua San Miguel |
Bufferless NoCs with Scheduled Deflection Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: 14th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2020, Hamburg, Germany, September 24-25, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-8847-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
49 | Hyojun Son, Hanjoon Kim, Hao Wang 0011, Nam Sung Kim, John Kim |
Ghost routers: energy-efficient asymmetric multicore processors with symmetric NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2019, New York, NY, USA, October 17-18, 2019, pp. 2:1-2:7, 2019, ACM, 978-1-4503-6700-4. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
49 | Michael Vonbun, Adrian Schiechel, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf |
APEC: improved acknowledgement prioritization through erasure coding in bufferless NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2019, New York, NY, USA, October 17-18, 2019, pp. 6:1-6:8, 2019, ACM, 978-1-4503-6700-4. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
49 | Max Koenen, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf |
Channel mapping strategies for effective protection switching in fail-operational hard real-time NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2019, New York, NY, USA, October 17-18, 2019, pp. 20:1-20:2, 2019, ACM, 978-1-4503-6700-4. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
49 | Vasil Pano, Ragh Kuttappa, Baris Taskin |
3D NoCs with active interposer for multi-die systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2019, New York, NY, USA, October 17-18, 2019, pp. 14:1-14:8, 2019, ACM, 978-1-4503-6700-4. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
49 | Giovanni De Micheli |
Keynote Talk: NoCs: A Short History of Success and a Long Future. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Twelfth IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018, Torino, Italy, October 4-5, 2018, pp. 1-2, 2018, IEEE, 978-1-5386-4893-3. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
49 | Travis H. Boraten, Avinash Karanth Kodi |
Securing NoCs Against Timing Attacks with Non-Interference Based Adaptive Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Twelfth IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018, Torino, Italy, October 4-5, 2018, pp. 14:1-14:8, 2018, IEEE, 978-1-5386-4893-3. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
49 | Sebastian Werner 0002, Pouya Fotouhi, Roberto Proietti, Xian Xiao, S. J. Ben Yoo |
Towards Energy-Efficient High-Throughput Photonic NoCs for 2.5D Integrated Systems: A Case for AWGRs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Twelfth IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018, Torino, Italy, October 4-5, 2018, pp. 5:1-5:8, 2018, IEEE, 978-1-5386-4893-3. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
49 | Ihsan El Masri, Pierre-Marie Martin, Hemanta Kumar Mondal, Rozenn Allanic, Thierry Le Gouguec, Cédric Quendo, Christian Roland, Jean-Philippe Diguet |
Accurate Channel Models for Realistic Design Space Exploration of Future Wireless NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Twelfth IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018, Torino, Italy, October 4-5, 2018, pp. 19:1-19:8, 2018, IEEE, 978-1-5386-4893-3. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
49 | Hiroshi Nakahara, Ng. Anh Vu Doan, Ryota Yasudo, Hideharu Amano |
XYZ-Randomization using TSVs for Low-Latency Energy Efficient 3D-NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2017, Seoul, Republic of Korea, October 19 - 20, 2017, pp. 17:1-17:8, 2017, ACM, 978-1-4503-4984-0. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
49 | Kshitij Bhardwaj, Weiwei Jiang 0002, Steven M. Nowick |
Achieving Lightweight Multicast in Asynchronous NoCs Using a Continuous-Time Multi-Way Read Buffer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2017, Seoul, Republic of Korea, October 19 - 20, 2017, pp. 6:1-6:8, 2017, ACM, 978-1-4503-4984-0. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
49 | Hyoukjun Kwon, Ananda Samajdar, Tushar Krishna |
Rethinking NoCs for Spatial Neural Network Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2017, Seoul, Republic of Korea, October 19 - 20, 2017, pp. 19:1-19:8, 2017, ACM, 978-1-4503-4984-0. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
49 | Ahmed Hemani, Syed Mohammad Asad Hassan Jafri, Shayesteh Masoumian |
Synchoricity and NOCs could make Billion Gate Custom Hardware Centric SOCs Affordable. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2017, Seoul, Republic of Korea, October 19 - 20, 2017, pp. 8:1-8:10, 2017, ACM, 978-1-4503-4984-0. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
49 | Ishan G. Thakkar, Sai Vineel Reddy Chittamuru, Sudeep Pasricha |
Run-time laser power management in photonic NoCs with on-chip semiconductor optical amplifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Tenth IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2016, Nara, Japan, August 31 - September 2, 2016, pp. 1-4, 2016, IEEE, 978-1-4673-9030-9. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
49 | Elena Kakoulli, Vassos Soteriou, Charalambos Koutsides, Kyriacos Kalli |
Designing High-Performance, Power-Efficient NoCs With Embedded Silicon-in-Silica Nanophotonics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Proceedings of the 9th International Symposium on Networks-on-Chip, NOCS 2015, Vancouver, BC, Canada, September 28-30, 2015, pp. 30:1-30:2, 2015, ACM, 978-1-4503-3396-2. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
49 | Robert Hesse, Natalie D. Enright Jerger |
Improving DVFS in NoCs with Coherence Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Proceedings of the 9th International Symposium on Networks-on-Chip, NOCS 2015, Vancouver, BC, Canada, September 28-30, 2015, pp. 24:1-24:8, 2015, ACM, 978-1-4503-3396-2. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
49 | Wen Zong, Michael Opoku Agyeman, Xiaohang Wang 0001, Terrence S. T. Mak |
Unbiased Regional Congestion Aware Selection Function for NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Proceedings of the 9th International Symposium on Networks-on-Chip, NOCS 2015, Vancouver, BC, Canada, September 28-30, 2015, pp. 19:1-19:8, 2015, ACM, 978-1-4503-3396-2. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
49 | Hans-Joachim Wunderlich, Martin Radetzki |
Multi-Layer Test and Diagnosis for Dependable NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Proceedings of the 9th International Symposium on Networks-on-Chip, NOCS 2015, Vancouver, BC, Canada, September 28-30, 2015, pp. 5:1-5:8, 2015, ACM, 978-1-4503-3396-2. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
49 | Shaoteng Liu, Zhonghai Lu, Axel Jantsch |
Highway in TDM NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Proceedings of the 9th International Symposium on Networks-on-Chip, NOCS 2015, Vancouver, BC, Canada, September 28-30, 2015, pp. 15:1-15:8, 2015, ACM, 978-1-4503-3396-2. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
49 | Manoj Kumar 0001, Vijay Laxmi, Manoj Singh Gaur, Masoud Daneshtalab, Pankaj Kumar Srivastava, Seok-Bum Ko, Mark Zwolinski |
A novel non-minimal/minimal turn model for highly adaptive routing in 2D NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Eighth IEEE/ACM International Symposium on Networks-on-Chip, NoCS 2014, Ferrara, Italy, September 17-19, 2014, pp. 184-185, 2014, IEEE, 978-1-4799-5347-9. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
49 | Prasanna Venkatesh Rengasamy, Madhu Mutyam |
Using packet information for efficient communication in NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Eighth IEEE/ACM International Symposium on Networks-on-Chip, NoCS 2014, Ferrara, Italy, September 17-19, 2014, pp. 143-150, 2014, IEEE, 978-1-4799-5347-9. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
49 | I. Kotleas, D. Humphreys, Rasmus Bo Sørensen, Evangelia Kasapaki, Florian Brandner, Jens Sparsø |
A loosely synchronizing asynchronous router for TDM-scheduled NOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Eighth IEEE/ACM International Symposium on Networks-on-Chip, NoCS 2014, Ferrara, Italy, September 17-19, 2014, pp. 151-158, 2014, IEEE, 978-1-4799-5347-9. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
49 | Gaoming Du, Miao Li, Zhonghai Lu, Minglun Gao, Chunhua Wang |
An analytical model for worst-case reorder buffer size of multi-path minimal routing NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Eighth IEEE/ACM International Symposium on Networks-on-Chip, NoCS 2014, Ferrara, Italy, September 17-19, 2014, pp. 49-56, 2014, IEEE, 978-1-4799-5347-9. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
49 | Chao Chen 0003, Tiansheng Zhang, Pietro Contu, Jonathan Klamkin, Ayse K. Coskun, Ajay Joshi |
Sharing and placement of on-chip laser sources in silicon-photonic NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Eighth IEEE/ACM International Symposium on Networks-on-Chip, NoCS 2014, Ferrara, Italy, September 17-19, 2014, pp. 88-95, 2014, IEEE, 978-1-4799-5347-9. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
49 | Jinho Lee, Kiyoung Choi |
A deadlock-free routing algorithm requiring no virtual channel on 3D-NoCs with partial vertical connections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), Tempe, AZ, USA, April 21-24, 2013, pp. 1-2, 2013, IEEE, 978-1-4673-6491-1. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
49 | Li Zhou, Avinash Karanth Kodi |
PROBE: Prediction-based optical bandwidth scaling for energy-efficient NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), Tempe, AZ, USA, April 21-24, 2013, pp. 1-8, 2013, IEEE, 978-1-4673-6491-1. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
49 | Amit Verma, Pritpal S. Multani, Daniel Mueller-Gritschneder, Vladimir Todorov, Ulf Schlichtmann |
A greedy approach for latency-bounded deadlock-free routing path allocation for application-specific NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), Tempe, AZ, USA, April 21-24, 2013, pp. 1-7, 2013, IEEE, 978-1-4673-6491-1. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
49 | Syed Minhaj Hassan, Sudhakar Yalamanchili |
Centralized buffer router: A low latency, low power router for high radix NOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), Tempe, AZ, USA, April 21-24, 2013, pp. 1-8, 2013, IEEE, 978-1-4673-6491-1. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
49 | Bo Zhao 0007, Youtao Zhang, Jun Yang 0002 |
A speculative arbiter design to enable high-frequency many-VC router in NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), Tempe, AZ, USA, April 21-24, 2013, pp. 1-8, 2013, IEEE, 978-1-4673-6491-1. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
49 | Dominic DiTomaso, Avinash Karanth Kodi, David W. Matolak, Savas Kaya, Soumyasanta Laha, William Rayess |
Energy-efficient adaptive wireless NoCs architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), Tempe, AZ, USA, April 21-24, 2013, pp. 1-8, 2013, IEEE, 978-1-4673-6491-1. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
49 | Ran Manevich, Israel Cidon, Avinoam Kolodny |
Dynamic traffic distribution among hierarchy levels in hierarchical Networks-on-Chip (NoCs). ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), Tempe, AZ, USA, April 21-24, 2013, pp. 1-8, 2013, IEEE, 978-1-4673-6491-1. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
49 | Ahmed Abousamra, Rami G. Melhem, Alex K. Jones |
Déjà Vu Switching for Multiplane NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: 2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), Copenhagen, Denmark, 9-11 May, 2012, pp. 11-18, 2012, IEEE Computer Society, 978-0-7695-4677-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
49 | Yaniv Ben-Itzhak, Eitan Zahavi, Israel Cidon, Avinoam Kolodny |
NoCs simulation framework for OMNeT++. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: NOCS 2011, Fifth ACM/IEEE International Symposium on Networks-on-Chip, Pittsburgh, Pennsylvania, USA, May 1-4, 2011, pp. 265-266, 2011, ACM/IEEE Computer Society, 978-1-4503-0720-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
49 | Daniel Gebhardt, JunBok You, Kenneth S. Stevens |
Comparing Energy and Latency of Asynchronous and Synchronous NoCs for Embedded SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: NOCS 2010, Fourth ACM/IEEE International Symposium on Networks-on-Chip, Grenoble, France, May 3-6, 2010, pp. 115-122, 2010, IEEE Computer Society, 978-0-7695-4053-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
network, CAD, SoC, topology, asynchronous, floorplan, router, EDA, NoC, GALS |
49 | Chia-Hsin Owen Chen, Niket Agarwal, Tushar Krishna, Kyung-Hoae Koo, Li-Shiuan Peh, Krishna Saraswat |
Physical vs. Virtual Express Topologies with Low-Swing Links for Future Many-Core NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: NOCS 2010, Fourth ACM/IEEE International Symposium on Networks-on-Chip, Grenoble, France, May 3-6, 2010, pp. 173-180, 2010, IEEE Computer Society, 978-0-7695-4053-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
49 | Carles Hernández 0001, Antoni Roca 0001, Federico Silla, José Flich, José Duato |
Improving the Performance of GALS-Based NoCs in the Presence of Process Variation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: NOCS 2010, Fourth ACM/IEEE International Symposium on Networks-on-Chip, Grenoble, France, May 3-6, 2010, pp. 35-42, 2010, IEEE Computer Society, 978-0-7695-4053-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
49 | Tushar N. K. Jain, Paul V. Gratz, Alexander Sprintson, Gwan Choi |
Asynchronous Bypass Channels: Improving Performance for Multi-synchronous NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: NOCS 2010, Fourth ACM/IEEE International Symposium on Networks-on-Chip, Grenoble, France, May 3-6, 2010, pp. 51-58, 2010, IEEE Computer Society, 978-0-7695-4053-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
asynchronous interconnect, NoC, GALS, on-chip networks |
49 | Ruizhe Wu, Yi Wang 0007, Dan Zhao 0001 |
A Low-Cost Deadlock-Free Design of Minimal-Table Rerouted XY-Routing for Irregular Wireless NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: NOCS 2010, Fourth ACM/IEEE International Symposium on Networks-on-Chip, Grenoble, France, May 3-6, 2010, pp. 199-206, 2010, IEEE Computer Society, 978-0-7695-4053-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Wireless Network-on-Chip, Segmented XY-Routing, Turn Classes-based Deadlock Avoidance |
49 | Ivo Bolsens |
NoCs: It is about the memory and the programming model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Third International Symposium on Networks-on-Chips, NOCS 2009, May 10-13 2009, La Jolla, CA, USA. Proceedings, pp. 1, 2009, IEEE Computer Society, 978-1-4244-4142-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
49 | Marcos Hervé, Érika F. Cota, Fernanda Lima Kastensmidt, Marcelo Lubaszewski |
Diagnosis of interconnect shorts in mesh NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Third International Symposium on Networks-on-Chips, NOCS 2009, May 10-13 2009, La Jolla, CA, USA. Proceedings, pp. 256-265, 2009, IEEE Computer Society, 978-1-4244-4142-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
49 | Evgeni Krimer, Mattan Erez, Isaac Keslassy, Avinoam Kolodny, Isask'har Walter |
Packet-level static timing analysis for NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Third International Symposium on Networks-on-Chips, NOCS 2009, May 10-13 2009, La Jolla, CA, USA. Proceedings, pp. 88, 2009, IEEE Computer Society, 978-1-4244-4142-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
49 | Tarik Ono-Tesfaye, Mark R. Greenstreet |
A modular synchronizing FIFO for NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Third International Symposium on Networks-on-Chips, NOCS 2009, May 10-13 2009, La Jolla, CA, USA. Proceedings, pp. 224-233, 2009, IEEE Computer Society, 978-1-4244-4142-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
49 | Isask'har Walter, Israel Cidon, Ran Ginosar, Avinoam Kolodny |
Access Regulation to Hot-Modules in Wormhole NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: First International Symposium on Networks-on-Chips, NOCS 2007, 7-9 May 2007, Princeton, New Jersey, USA, Proceedings, pp. 137-148, 2007, IEEE Computer Society, 978-0-7695-2773-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
SoC, resource management, Network on-Chip, hotspot, wormhole |
47 | Asit K. Mishra, Reetuparna Das, Soumya Eachempati, Ravishankar R. Iyer 0001, Narayanan Vijaykrishnan, Chita R. Das |
A case for dynamic frequency tuning in on-chip networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA, pp. 292-303, 2009, ACM, 978-1-60558-798-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
47 | Srinivasan Murali, Ciprian Seiculescu, Luca Benini, Giovanni De Micheli |
Synthesis of networks on chips for 3D systems on chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 242-247, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
topology synthesis, networks on chip, 3D, application-specific |
47 | Tomas Henriksson, Pieter van der Wolf |
TTL Hardware Interface: A High-Level Interface for Streaming Multiprocessor Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESTIMedia ![In: Proceedings of the 2006 4th Workshop on Embedded Systems for Real-Time Multimedia, ESTIMedia 2006, October 26-27, 2006, Seoul, Korea, conjunction with CODES+ISSS 2006, pp. 107-112, 2006, IEEE Computer Society, 0-7803-9783-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
47 | Stergios Stergiou, Federico Angiolini, Salvatore Carta, Luigi Raffo, Davide Bertozzi, Giovanni De Micheli |
xpipes Lite: A Synthesis Oriented Design Library For Networks on Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 1188-1193, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
45 | Xuan-Tu Tran, Yvain Thonnart, Jean Durupt, Vincent Beroulle, Chantal Robach |
A Design-for-Test Implementation of an Asynchronous Network-on-Chip Architecture and its Associated Test Pattern Generation and Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Second International Symposium on Networks-on-Chips, NOCS 2008, 5-6 April 2008, Newcastle University, UK. Proceedings, pp. 149-158, 2008, IEEE Computer Society, 978-0-7695-3098-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
NoC testing, QDI asynchronous logic, Network-on-Chip, DfT, testability, NoC, Design-for-Test, GALS, SoC testing, testing methodology, on-chip communication, Globally Asynchronous - Locally Synchronous |
45 | Francisco Gilabert Villamón, Simone Medardoni, Davide Bertozzi, Luca Benini, María Engracia Gómez, Pedro López 0001, José Duato |
Exploring High-Dimensional Topologies for NoC Design Through an Integrated Analysis and Synthesis Framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Second International Symposium on Networks-on-Chips, NOCS 2008, 5-6 April 2008, Newcastle University, UK. Proceedings, pp. 107-116, 2008, IEEE Computer Society, 978-0-7695-3098-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Interconnection networks, networks on chip, topologies, chip design |
45 | George Michelogiannakis, Dionisios N. Pnevmatikatos, Manolis Katevenis |
Approaching Ideal NoC Latency with Pre-Configured Routes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: First International Symposium on Networks-on-Chips, NOCS 2007, 7-9 May 2007, Princeton, New Jersey, USA, Proceedings, pp. 153-162, 2007, IEEE Computer Society, 978-0-7695-2773-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
45 | Sheng Xu, Ibis Benito, Wayne P. Burleson |
Thermal Impacts on NoC Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: First International Symposium on Networks-on-Chips, NOCS 2007, 7-9 May 2007, Princeton, New Jersey, USA, Proceedings, pp. 220, 2007, IEEE Computer Society, 978-0-7695-2773-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
45 | Cristian Grecu, André Ivanov, Partha Pratim Pande, Axel Jantsch, Erno Salminen, Ümit Y. Ogras, Radu Marculescu |
Towards Open Network-on-Chip Benchmarks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: First International Symposium on Networks-on-Chips, NOCS 2007, 7-9 May 2007, Princeton, New Jersey, USA, Proceedings, pp. 205, 2007, IEEE Computer Society, 978-0-7695-2773-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
performance evaluation, metrics, benchmarks, networks-on-chip |
45 | José Flich, Andres Mejia, Pedro López 0001, José Duato |
Region-Based Routing: An Efficient Routing Mechanism to Tackle Unreliable Hardware in Network on Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: First International Symposium on Networks-on-Chips, NOCS 2007, 7-9 May 2007, Princeton, New Jersey, USA, Proceedings, pp. 183-194, 2007, IEEE Computer Society, 978-0-7695-2773-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
41 | Anelise Kologeski, Caroline Concatto, Luigi Carro, Fernanda Lima Kastensmidt |
Improving Reliability in NoCs by Application-Specific Mapping Combined with Adaptive Fault-Tolerant Method in the Links. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 16th European Test Symposium, ETS 2011, Trondheim, Norway, May 23-27, 2011, pp. 123-128, 2011, IEEE Computer Society, 978-0-7695-4433-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
Data Splitting, Fault Tolerance, Mapping, Adaptive Routing, Links, NoCs |
41 | Akbar Sharifi, Reza Sabbaghi-Nadooshan, Hamid Sarbazi-Azad |
The Shuffle-Exchange Mesh Topology for 3D NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 9th International Symposium on Parallel Architectures, Algorithms, and Networks, ISPAN 2008, 7-9 May 2008, Sydney, NSW, Australia, pp. 275-280, 2008, IEEE Computer Society, 978-0-7695-3125-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
3D VLSI, 3D NoCs, Performance evaluation, SoC, Power consumption, Shuffle-Exchange |
39 | Igor Loi, Federico Angiolini, Luca Benini |
Developing Mesochronous Synchronizers to Enable 3D NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 1414-1419, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
39 | Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny |
Routing table minimization for irregular mesh NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 942-947, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
39 | Leonel Tedesco, Aline Mello 0001, Leonardo Giacomet, Ney Calazans, Fernando Gehm Moraes |
Application driven traffic modeling for NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2006, Ouro Preto, MG, Brazil, August 28 - September 1, 2006, pp. 62-67, 2006, ACM. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
QoS, applications, networks on chip, traffic modeling |
39 | Jirí Jaros, Milos Ohlídal, Václav Dvorák |
Complexity of Collective Communications on NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 127-133, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
39 | Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen |
Evaluation and design trade-offs between circuit-switched and packet-switched NOCs for application-specific SOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 143-148, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
application-specific designs, low-power, NOC, SOC |
39 | José Carlos S. Palma, César A. M. Marcon, Fernando Gehm Moraes, Ney Laert Vilar Calazans, Ricardo A. L. Reis, Altamiro Amadeu Susin |
Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2005, Florianolpolis, Brazil, September 4-7, 2005, pp. 196-201, 2005, ACM. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
traffic effect, networks-on-chip, energy estimation, application mapping |
39 | Leonel Tedesco, Aline Mello 0001, Diego Garibotti, Ney Calazans, Fernando Moraes 0001 |
Traffic generation and performance evaluation for mesh-based NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2005, Florianolpolis, Brazil, September 4-7, 2005, pp. 184-189, 2005, ACM. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
performance evaluation, networks on chip, traffic modeling |
39 | Srinivasan Murali, Giovanni De Micheli |
SUNMAP: a tool for automatic topology selection and generation for NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 914-919, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
systems on chip, mapping, networks on chip, topology, SystemC |
35 | Anthony Leroy, Dragomir Milojevic, Diederik Verkest, Frédéric Robert, Francky Catthoor |
Concepts and Implementation of Spatial Division Multiplexing for Guaranteed Throughput in Networks-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 57(9), pp. 1182-1195, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
35 | Huaxi Gu, Jiang Xu 0001, Zheng Wang |
ODOR: a microresonator-based high-performance low-cost router for optical networks-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 203-208, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
microresonator, low power, network on chip, optical interconnect, router architecture, loss |
35 | Mingsong Lv, Ying Guo, Nan Guan, Qingxu Deng |
RTNoC: A Simulation Tool for Real-Time Communication Scheduling on Networks-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSSE (4) ![In: International Conference on Computer Science and Software Engineering, CSSE 2008, Volume 4: Embedded Programming / Database Technology / Neural Networks and Applications / Other Applications, December 12-14, 2008, Wuhan, China, pp. 102-105, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
35 | Everton Carara, Aline Mello 0001, Fernando Moraes 0001 |
Communication Models in Networks-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 28-30 May 2007, Porto Alegre, RS, Brazil, pp. 57-60, 2007, IEEE Computer Society, 978-0-7695-2834-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
35 | Vassos Soteriou, Hangsheng Wang, Li-Shiuan Peh |
A Statistical Traffic Model for On-Chip Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: 14th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS 2006), 11-14 September 2006, Monterey, California, USA, pp. 104-116, 2006, IEEE Computer Society, 0-7695-2573-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | Chris Bartels, Jos Huisken, Kees Goossens, Patrick Groeneveld, Jef L. van Meerbergen |
Comparison of An Æthereal Network on Chip and A Traditional Interconnect for A Multi-Processor DVB-T System on Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006, pp. 80-85, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo |
Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006, pp. 158-163, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | Luca Benini |
Application specific NoC design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 491-495, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
application-specific integrated systems, systems on chip, networks on chip, design methodologies |
35 | Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo |
Designing application-specific networks on chips with floorplan information. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 355-362, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
networks on chips, topology, floorplan, deadlock-free routing |
35 | Srinivasan Murali, Luca Benini, Giovanni De Micheli |
Mapping and physical planning of networks-on-chip architectures with quality-of-service guarantees. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 27-32, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
physical planning, QoS, optimization, systems on chips, mapping, networks on chips |
35 | César Albenes Zeferino, Márcio Eduardo Kreutz, Altamiro Amadeu Susin |
RASoC: A Router Soft-Core for Networks-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 198-205, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
FPGA, Systems-on-Chip, On-Chip Networks |
35 | Catherine H. Gebotys, Robert J. Gebotys |
A Framework for Security on NoC Technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), New Trends and Technologies for VLSI Systems Design, 20-21 February 2003, Tampa, FL, USA, pp. 113-120, 2003, IEEE Computer Society, 0-7695-1904-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
35 | César Albenes Zeferino, Altamiro Amadeu Susin |
SoCIN: A Parametric and Scalable Network-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2003, Sao Paulo, Brazil, September 8-11, 2003, pp. 169-, 2003, IEEE Computer Society, 0-7695-2009-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
FPGA, Embedded Systems, Systems-on-Chip |
35 | Tajana Simunic, Stephen P. Boyd |
Managing Power Consumption in Networks on Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France, pp. 110-116, 2002, IEEE Computer Society, 0-7695-1471-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
33 | Tushar Krishna, John Kim, Sergi Abadal, Joshua San Miguel (eds.) |
NOCS '21: International Symposium on Networks-on-Chip, Virtual Event, October 14-15, 2021 ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![ACM, 978-1-4503-9083-5 The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
33 | Hana Krichene, Jean-Marc Philippe |
Analysis of on-chip communication properties in accelerator architectures for deep neural networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: NOCS '21: International Symposium on Networks-on-Chip, Virtual Event, October 14-15, 2021, pp. 9-14, 2021, ACM, 978-1-4503-9083-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
33 | Ahmed Shalaby 0001, Yaswanth Tavva, Trevor E. Carlson, Li-Shiuan Peh |
Sentry-NoC: a statically-scheduled NoC for secure SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: NOCS '21: International Symposium on Networks-on-Chip, Virtual Event, October 14-15, 2021, pp. 67-74, 2021, ACM, 978-1-4503-9083-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
33 | Francisco Muñoz-Martínez, José L. Abellán, Manuel E. Acacio, Tushar Krishna |
A novel network fabric for efficient spatio-temporal reduction in flexible DNN accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: NOCS '21: International Symposium on Networks-on-Chip, Virtual Event, October 14-15, 2021, pp. 1-8, 2021, ACM, 978-1-4503-9083-5. The full citation details ...](Pics/full.jpeg) |
2021 |
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33 | Alireza Monemi, Iván Pérez 0004, Neiel Leyva, Enrique Vallejo 0001, Ramón Beivide, Miquel Moretó |
PIugSMART: a pluggable open-source module to implement multihop bypass in networks-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: NOCS '21: International Symposium on Networks-on-Chip, Virtual Event, October 14-15, 2021, pp. 41-48, 2021, ACM, 978-1-4503-9083-5. The full citation details ...](Pics/full.jpeg) |
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