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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 6 occurrences of 6 keywords
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Results
Found 12 publication records. Showing 12 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
107 | Pengyuan Yu, Patrick Schaumont |
Executing Hardware as Parallel Software for Picoblaze Networks. |
FPL |
2006 |
DBLP DOI BibTeX RDF |
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96 | Pavel Zaykov |
MIMD implementation with PicoBlaze microprocessor using MPI functions. |
CompSysTech |
2007 |
DBLP DOI BibTeX RDF |
MPI functions, PicoBlaze, FPGA, system-on-chip, VHDL, MIMD, parallel computer architecture, message passing system |
94 | Xu Guo 0001, Patrick Schaumont |
Optimizing the Control Hierarchy of an ECC Coprocessor Design on an FPGA Based SoC Platform. |
ARC |
2009 |
DBLP DOI BibTeX RDF |
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47 | Jiri Kadlec, Roman Bartosinski, Martin Danek |
Accelerating Microblaze Floating Point Operations. |
FPL |
2007 |
DBLP DOI BibTeX RDF |
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36 | Vladimir Ivanov 0004 |
A program for an automatic PicoBlaze type embedded system generation. |
CompSysTech |
2013 |
DBLP DOI BibTeX RDF |
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36 | Mohamed N. Hassan, Mohammed Benaissa |
A scalable hardware/software co-design for elliptic curve cryptography on PicoBlaze microcontroller. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
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36 | D. Antonio-Torres, D. Villanueva-Perez, E. Sanchez-Canepa, N. Segura-Meraz, D. Garcia-Garcia, David Conchouso-Gonzalez, J. A. Miranda-Vergara, J. A. Gonzalez-Herrera, A. L. Riquer-Martinez de Ita, B. Hernandez-Rodriguez, R. Castaneda-Espinosa de los Monteros, F. Garcia-Chavez, V. Tellez-Rojas, A. Bautista-Hernandez |
A PicoBlaze-Based Embedded System for Monitoring Applications. |
CONIELECOMP |
2009 |
DBLP DOI BibTeX RDF |
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36 | Zbynek Krivka, Ota Jirák |
Design and implementation of back-end for Picoblaze C compiler. |
IADIS AC (2) |
2009 |
DBLP BibTeX RDF |
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23 | Diego Pedro Morales, Antonio García 0001, Alberto J. Palma, Miguel A. Carvajal, Encarnación Castillo, Luis F. Capitán-Vallvey |
Enhancing ADC resolution through Field Programmable Analog Array dynamic reconfiguration. |
FPL |
2008 |
DBLP DOI BibTeX RDF |
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23 | Gerald Hempel, Christian Hochberger |
A resource optimized Processor Core for FPGA based SoCs. |
DSD |
2007 |
DBLP DOI BibTeX RDF |
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23 | Alexandros C. Dimopoulos, Christos Pavlatos, Ioannis Panagopoulos, George K. Papakonstantinou |
An Efficient Hardware Implementation for AI Applications. |
SETN |
2006 |
DBLP DOI BibTeX RDF |
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23 | Janusz A. Starzyk, Yongtao Guo, Zhineng Zhu |
Dynamically Reconfigurable Neuron Architecture for the Implementation of Self-Organizing Learning Array. |
IPDPS |
2004 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #12 of 12 (100 per page; Change: )
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