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Found 1 publication records. Showing 1 according to the selection in the facets
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Authors |
Title |
Venue |
Year |
Link |
Author keywords |
69 | Manjit Borah, Mary Jane Irwin, Robert Michael Owens |
Minimizing power consumption of static CMOS circuits by transistor sizing and input reordering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India, pp. 294-298, 1995, IEEE Computer Society, 0-8186-6905-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
power consumption minimisation, static CMOS circuits, input reordering, high fan-out gates, power constrained module generator, PowerSizer, logic CAD, circuit layout CAD, CMOS logic circuits, logic circuits, minimisation, arithmetic circuits, circuit optimisation, integrated circuit layout, transistor sizing |
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