Search results for "Prefetch-buffer"

Found 12 publication records. Showing 12 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
82	Thomas Alexander, Gershon Kedem	Distributed Prefetch-buffer/Cache Design for High-Performance Memory Systems.	HPCA	1996	DBLP DOI BibTeX RDF	Prefetch-buffer, cache, prediction, memory
54	Shih-Chang Lai, Shih-Lien Lu	Hardware-based Pointer Data Prefetcher.	ICCD	2003	DBLP DOI BibTeX RDF
43	Chi-Hung Chi, Jun-Li Yuan	Load-Balancing Branch Target Cache and Prefetch Buffer.	ICCD	1999	DBLP DOI BibTeX RDF	branch target cache, load-balancing, Memory, prefetching, instruction cache
37	Yin-Fu Huang, Jhao-Min Hsu	Mining Web Logs to Improve Hit Ratios of Prefetching and Caching.	Web Intelligence	2005	DBLP DOI BibTeX RDF
29	Mounir A. Tantaoui, Kien A. Hua, Simon Sheu	Interaction with broadcast video.	ACM Multimedia	2002	DBLP DOI BibTeX RDF	fast reverse, latency, video on demand, periodic broadcast, fast forward
25	Fei Gao, Hanyu Cui, Suleyman Sair	Two-level ata prefetching.	ICCD	2007	DBLP DOI BibTeX RDF
25	Robert Cooksey, Dennis Colarelli, Dirk Grunwald	Content-Based Prefetching: Initial Results.	Intelligent Memory Systems	2000	DBLP DOI BibTeX RDF
25	Li-San Li, Huang-Zhen Chun	Lookahead Cache with Instruction Processing Unit for Filling Memory Gap.	EUROMICRO	1999	DBLP DOI BibTeX RDF	Memory Gap, Lookahead Cache, Instruction Processing Unit
15	Adrian Sterca	Choosing the Level of Stream Adaptation in TCP-Friendly Congestion Controlled Video Streaming Servers.	ISM	2008	DBLP DOI BibTeX RDF
15	Leyla Nazhandali, Michael Minuth, Bo Zhai, Javin Olson, Todd M. Austin, David T. Blaauw	A second-generation sensor network processor with application-driven memory optimizations and out-of-order execution.	CASES	2005	DBLP DOI BibTeX RDF	sensor network, energy efficiency, microprocessor, memory organization
15	Christopher Batten, Ronny Krashinsky, Steve Gerding, Krste Asanovic	Cache Refill/Access Decoupling for Vector Machines.	MICRO	2004	DBLP DOI BibTeX RDF
15	Nam Sung Kim, Trevor N. Mudge	The microarchitecture of a low power register file.	ISLPED	2003	DBLP DOI BibTeX RDF	write queue, low power, instruction level parallelism, register file, out-of-order processor

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