Search results for "UltraSPARC-I"

Found 9 publication records. Showing 9 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
67	Alexander Dalal, Lavi Lev, Sundari Mitra	Design of an efficient power distribution network for the UltraSPARC-I microprocessor.	ICCD	1995	DBLP DOI BibTeX RDF	computer power supplies, UltraSPARC-I, simulation method, exact layout locations, excessive voltage drop, floorplanning constraints, power interconnections, reduced time-to-market, circuit analysis computing, circuit layout CAD, microprocessor chips, electromigration, CAD tools, power distribution network
27	Marc Tremblay, J. Michael O'Connor	UltraSparc I: a four-issue processor supporting multimedia.	IEEE Micro	1996	DBLP DOI BibTeX RDF
27	Marc Tremblay, Dale Greenley, Kevin Normoyle	The design of the microarchitecture of UltraSPARC-I.	Proc. IEEE	1995	DBLP DOI BibTeX RDF
27	James Gateley, Miriam Blatt, Dennis Chen, Scott Cooke, Piyush Desai, Manjunath Doreswamy, Mark Elgood, Gary Feierbach, Tim Goldsbury, Dale Greenley, Raju Joshi, Mike Khosraviani, Robert Kwong, Manish Motwani, Chitresh Narasimhaiah, Sam J. Nicolino Jr., Tooru Ozeki, Gary Peterson, Chris Salzmann, Nasser Shayesteh, Jeffrey Whitman, Pak Wong	UltraSPARC-I Emulation.	DAC	1995	DBLP DOI BibTeX RDF
27	Lawrence Yang, David Gao 0001, Jamshid Mostoufi, Raju Joshi, Paul Loewenstein	System Design Methodology of UltraSPARC-I.	DAC	1995	DBLP DOI BibTeX RDF
27	A. Cao, A. Adalal, J. Bauman, P. Delisle, P. Dedood, P. Donehue, M. Dell'OcaKhouja, T. Doan, Manjunath Doreswamy, Philip A. Ferolito, O. Geva, D. Greenhill, S. Gopaladhine, J. Irwin, L. Lev, J. MacDonald, M. Ma, Samir Mitra, P. Patel, A. Prabhu, R. Puranik, S. Rozanski, N. Ross, P. Saggurti, Slobodan Simovich, R. Sunder, B. Sur, W. Vercruysse, Michelle Wong, P. Yip, Robert K. Yu, J. Zhou, Gregory B. Zyner	CAD Methodology for the Design of UltraSPARC-I Microprocessor at Sun Microsystems Inc.	DAC	1995	DBLP DOI BibTeX RDF
27	Marc Tremblay, Guillermo Maturana, Atsushi Inoue, Leslie Kohn	A Fast and Flexible Performance Simulator for Micro-Architecture Trade-off Analysis on UltraSPARC-I.	DAC	1995	DBLP DOI BibTeX RDF
14	C.-J. Richard Shi, Sheldon X.-D. Tan	Compact representation and efficient generation of s-expandedsymbolic network functions for computer-aided analog circuit design.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
14	Andrea C. Arpaci-Dusseau, David E. Culler, Alan M. Mainwaring	Scheduling with Implicit Information in Distributed Systems.	SIGMETRICS	1998	DBLP DOI BibTeX RDF