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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 9 occurrences of 9 keywords
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Results
Found 32 publication records. Showing 32 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
153 | Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers |
MPEG-Compliant Entropy Decoding on FPGA-Augmented TriMedia/CPU64. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 22-24 April 2002, Napa, CA, USA, Proceedings, pp. 261-, 2002, IEEE Computer Society, 0-7695-1801-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
124 | Yanmei Qu, Shunliang Mei, Yun He |
A Cost-effective VLD Architecture for MPEG-2 and AVS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 52(1), pp. 95-109, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
CA-2D-VLC, VLD, inverse quantisation, MPEG-2, AVS, VLC |
114 | Tao Sheng, Mudar Sarem, Jingli Zhou |
Memory Efficient and Low Complexity Variable Length Decoding for MPEG-4 Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP Workshops ![In: 2007 International Conference on Parallel Processing Workshops (ICPP Workshops 2007), 10-14 September 2007, Xi-An, China, pp. 38, 2007, IEEE Computer Society, 978-0-7695-2934-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
90 | Yanmei Qu, Yun He, Shunliang Mei |
A Novel Cost-Effective and Programmable VLSI Architecture of CAVLC Decoder for H.264/AVC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 50(1), pp. 41-51, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
group-based VLD, VLSI, H.264/AVC, CAVLC |
76 | Zhidong Li, Evan Tan, J. Chen, Thanes Wassantachat |
On Traffic Density Estimation with a Boosted SVM Classifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DICTA ![In: Proceedings of the International Conference on Digital Image Computing: Techniques and Applications, DICTA 2008, Canberra, ACT, Australia, 1-3 December 2008, pp. 117-123, 2008, IEEE Computer Society, 978-0-7695-3456-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
76 | Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers |
A Reconfigurable Functional Unit for TriMedia/CPU64. A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Embedded Processor Design Challenges ![In: Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS, pp. 224-241, 2002, Springer, 3-540-43322-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
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57 | Thanes Wassantachat, Zhidong Li, Jing Chen, Yang Wang 0002, Evan Tan |
Traffic Density Estimation with On-line SVM Classifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AVSS ![In: Sixth IEEE International Conference on Advanced Video and Signal Based Surveillance, AVSS 2009, 2-4 September 2009, Genova, Italy, pp. 13-18, 2009, IEEE Computer Society, 978-0-7695-3718-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
57 | Yong Ho Moon, Il Kyu Eom, Suk Woon Ha |
An improved coeff_token variable length decoding mehod for low power design of H.264/AVC CAVLC decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP ![In: Proceedings of the International Conference on Image Processing, ICIP 2008, October 12-15, 2008, San Diego, California, USA, pp. 2840-2843, 2008, IEEE, 978-1-4244-1765-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
57 | Mihai Sima, Sorin Dan Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers |
Pel reconstruction on FPGA-augmented TriMedia. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 12(6), pp. 622-635, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
52 | Wei Liu, Yong-en Chen |
VLD Design for AVS Video Decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WKDD ![In: Proceedings of the Second International Workshop on Knowledge Discovery and Data Mining, WKDD 2009, Moscow, Russia, 23-25 January 2009, pp. 648-651, 2009, IEEE Computer Society, 978-0-7695-3543-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
52 | Yanmei Qu, Yu Li, Shunliang Mei |
A Cost-Effective VLSI Architecture of VLD for MPEG-2 and AVS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICME ![In: Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, ICME 2007, July 2-5, 2007, Beijing, China, pp. 1619-1622, 2007, IEEE Computer Society, 1-4244-1017-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
38 | Chih-Da Chien, Keng-Po Lu, Yu-Min Chen, Jiun-In Guo, Yuan-Sun Chu, Ching-Lung Su |
An Area-Efficient Variable Length Decoder IP Core Design for MPEG-1/2/4 Video Coding Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. Video Technol. ![In: IEEE Trans. Circuits Syst. Video Technol. 16(9), pp. 1172-1178, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
38 | Mohanarajah Sinnathamby, Subramania Sudharsanan, Naraig Manjikian |
Enhanced Architectural Support for Variable-Length Decoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICME ![In: Proceedings of the 2006 IEEE International Conference on Multimedia and Expo, ICME 2006, July 9-12 2006, Toronto, Ontario, Canada, pp. 2045-2048, 2006, IEEE Computer Society, 1-4244-0367-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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38 | Xiaoming Bao, See-Kiong Ng, Eng-Huat Chua, Wei-Khing For |
Virtual Lab Dashboard: Ubiquitous Monitoring and Control in a Smart Bio-laboratory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCSA (2) ![In: Computational Science and Its Applications - ICCSA 2005, International Conference, Singapore, May 9-12, 2005, Proceedings, Part II, pp. 1167-1176, 2005, Springer, 3-540-25861-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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38 | Jari Nikara, Stamatis Vassiliadis, Jarmo Takala, Petri Liuha |
Multiple-symbol parallel decoding for variable length codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 12(7), pp. 676-685, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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38 | Matjaz Verderber, Andrej Zemva, Damjan Lampret |
HW/SW Partitioned Optimization and VLSI-FPGA Implementation of the MPEG-2 Video Decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 20238-20243, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
38 | Matjaz Verderber, Andrej Zemva, Andrej Trost |
HW/SW Codesign of the MPEG-2 Video Decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings, pp. 179, 2003, IEEE Computer Society, 0-7695-1926-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
38 | Jari Nikara, Stamatis Vassiliadis, Jarmo Takala, Mihai Sima, Petri Liuha |
Parallel Multiple-Symbol Variable-Length Decoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 20th International Conference on Computer Design (ICCD 2002), VLSI in Computers and Processors, 16-18 September 2002, Freiburg, Germany, Proceedings, pp. 126-131, 2002, IEEE Computer Society, 0-7695-1700-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
38 | Edgar Holmann, Toyohiko Yoshida, Akira Yamada 0005, Shin-ichi Uramoto |
Single Chip Dual-Issue RISC Processor for Real-Time MPEG-2 Software Decoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 18(2), pp. 155-165, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
33 | Shuo Yang, Chunjuan Bo, Junxing Zhang, Pengxiang Gao, Yujie Li 0001, Seiichi Serikawa |
VLD-45: A Big Dataset for Vehicle Logo Recognition and Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Intell. Transp. Syst. ![In: IEEE Trans. Intell. Transp. Syst. 23(12), pp. 25567-25573, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
33 | Xiong Wang, Linghe Kong, Tianpeng Wei, Liang He 0002, Guihai Chen, Jiangtao Wang 0001, Chenren Xu |
VLD: Smartphone-assisted Vertical Location Detection for Vehicles in Urban Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPSN ![In: 19th ACM/IEEE International Conference on Information Processing in Sensor Networks, IPSN 2020, Sydney, Australia, April 21-24, 2020, pp. 25-36, 2020, IEEE, 978-1-7281-5497-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
33 | Jun Liu, Xiaojun Jing, Songlin Sun, Zifeng Lian |
Variable length dominant Gabor local binary pattern (VLD-GLBP) for face recognition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VCIP ![In: 2014 IEEE Visual Communications and Image Processing Conference, VCIP 2014, Valletta, Malta, December 7-10, 2014, pp. 89-92, 2014, IEEE, 978-1-4799-6139-9. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
33 | Yutong Liu, Zhenqiang Yang, Huizhu Jia, Don Xie |
A high speed and efficient architecture of VLD for AVS HD video decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PCS ![In: 2012 Picture Coding Symposium, PCS 2012, Krakow, Poland, May 7-9, 2012, pp. 377-380, 2012, IEEE, 978-1-4577-2047-5. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
33 | Cesare Ronsisvalle, Vincenzo Enea |
Improvement of high-voltage junction termination extension (JTE) by an optimized profile of lateral doping (VLD). ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 50(9-11), pp. 1773-1777, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
33 | Liang-Hao Wang, Dongxiao Li, Ming Zhang 0001 |
SoC Design of VLD in Multi-standard Video Decoder for Wearable Multimedia Players. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APWCS ![In: 2010 Asia-Pacific Conference on Wearable Computing Systems, APWCS 2010, Shenzhen, China , 17-18 April 2010, pp. 194-197, 2010, IEEE Computer Society, 978-0-7695-4003-0. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
multi-standard, video, SoC, wearable system |
33 | Bin Sheng, Wen Gao 0001, Don Xie, Di Wu 0022 |
An efficient VLSI architecture of VLD for AVS HDTV decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Consumer Electron. ![In: IEEE Trans. Consumer Electron. 52(2), pp. 696-701, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
33 | Cheng-Hung Liu, Bai-Jue Shieh, Chen-Yi Lee |
A low-power group-based VLD design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 337-340, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
19 | Jianjun Li, Dandan Ding, Christophe Lucarz, Samuel Keller, Marco Mattavelli |
Efficient data flow variable length decoding implementation for the MPEG reconfigurable video coding framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SiPS ![In: Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2008, October 8-10, 2008, Washington, D.C. Metro Area, USA, pp. 188-193, 2008, IEEE, 978-1-4244-2924-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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19 | Lei Yang 0050, Xiaowei Song 0001, Chunping Hou, Jufeng Dai |
A Scheme for MPEG-2 to H.264 Transcoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: Proceedings of the Canadian Conference on Electrical and Computer Engineering, CCECE 2006, May 7-10, 2006, Ottawa Congress Centre, Ottawa, Canada, pp. 310-313, 2006, IEEE, 1-4244-0038-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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19 | Ganesh Yadav, R. K. Singh, Vipin Chaudhary |
On Implementation of MPEG-2 Like Real-Time Parallel Media Applications on MDSP SoC Cradle Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing, International Conference EUC 2004, Aizu-Wakamatsu City, Japan, August 25-27, 2004, Proceedings, pp. 281-290, 2004, Springer, 3-540-22906-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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19 | Lingfeng Li, Danian Gong, Yun He |
A single-chip real-time programmable video signal processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 129-132, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
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19 | Seong-Hwan Cho, Thucydides Xanthopoulos, Anantha P. Chandrakasan |
A low power variable length decoder for MPEG-2 based on nonuniform fine-grain table partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 7(2), pp. 249-257, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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