Search results for "VSIPL"

Found 14 publication records. Showing 14 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
89	Vijay P. Shah, Anthony Skjellum, Nicolas H. Younan, Torey Alford, D. Whitcomb, A. Watkins	inAspect™: interfacing Java and VSIPL.	Java Grande	2002	DBLP DOI BibTeX RDF	VSIPL, embedded Java, image processing, signal processing, high-performance, linear algebra, fixed-point arithmetic, multi-platform, JNI
83	Yuriy Sheynin, Anna Novoselova	Object-Orientation in Parallel VSIPL Architecture.	ISORC	2001	DBLP DOI BibTeX RDF
70	James R. Geraci, Erek R. Speed	Improving program productivity, performance and portability through a high level language for graphics and game development.	SIGGRAPH Posters	2010	DBLP DOI BibTeX RDF
53	Randall S. Janka, Linda M. Wills	A novel codesign methodology for real-time embedded COTS multiprocessor-based signal processing systems.	CODES	2000	DBLP DOI BibTeX RDF	MPI/RT, VSIPL, specification and design methodology, middleware, MPI, embedded, COTS, multiprocessing, MAGIC
36	Stefan Seefeld, Faheem Sheikh, Brooks Moses	A MATLAB-to-target development workflow using Sourcery VSIPL++.	HPEC	2012	DBLP DOI BibTeX RDF
36	Torey Alford, Vijay P. Shah, Anthony Skjellum, Nicolas H. Younan, Clayborne D. Taylor	inAspect: interfacing Java and VSIPL applications.	Concurr. Pract. Exp.	2005	DBLP DOI BibTeX RDF
36	James M. Lebak, Jeremy Kepner, Henry Hoffmann, Edward Rutledge	Parallel VSIPL++: An Open Standard Software Library for High-Performance Parallel Signal Processing.	Proc. IEEE	2005	DBLP DOI BibTeX RDF
36	Randall Janka, Randall Judd, James M. Lebak, Mark A. Richards, Dan Campbell	VSIPL: an object-based open standard API for vector, signal, and image processing.	ICASSP	2001	DBLP DOI BibTeX RDF
29	Vijay P. Shah, Nicolas H. Younan, Torey Alford, Anthony Skjellum	An advanced signal processing toolkit for JAVA applications.	PPPJ	2003	DBLP DOI BibTeX RDF	VSIPL, Java, algorithms, signal processing
29	Randall S. Janka, Linda M. Wills	Specification and synthesis of real-time embedded distributed and parallel multiprocessor-based signal processing systems.	CASES	2000	DBLP DOI BibTeX RDF	MPI/RT, VCC, VSIPL, specification and design methodology, virtual component co-design, real-time, middleware, parallel processing, MPI, embedded, COTS, multiprocessing, MAGIC
23	Nicholas Moore, Albert Conti, Miriam Leeser, Laurie A. Smith King	Vforce: An Extensible Framework for Reconfigurable Supercomputing.	Computer	2007	DBLP DOI BibTeX RDF	Vforce framework, reconfigurable computing, Supercomputing
23	Nicholas Moore, Albert Conti, Miriam Leeser, Laurie A. Smith King	Writing Portable Applications that Dynamically Bind at Run Time to Reconfigurable Hardware.	FCCM	2007	DBLP DOI BibTeX RDF
23	Randall S. Janka, Linda M. Wills	A Novel Specification and Design Methodology of Embedded Multiprocessor Signal Processing Systems Using High-Performance Middleware.	IPDPS Workshops	2000	DBLP DOI BibTeX RDF
23	Randall S. Janka, Linda M. Wills	Combining Virtual Benchmarking with Rapid System Prototyping for Real-Time Embedded Multiprocessor Signal Processing System Codesign.	IEEE International Workshop on Rapid System Prototyping	2000	DBLP DOI BibTeX RDF	signal processor, specification and design methodology, middleware, multiprocessor, embedded, rapid prototyping, codesign